Package Engineering (PEPkg) Engineer

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Key Responsibilities Package Development & Engineering Support package feasibility studies, architecture evaluations, design optimization, and technical risk assessments. Apply mechanical, electrical, materials, thermal, and manufacturing fundamentals to package-engineering problems. Support development activities for memory and semiconductor package technologies from concept through qualification and manufacturing readiness. Analyze engineering data, identify risks, document findings, and recommend technically sound actions. Contribute to design-for-manufacturing, design-for-reliability, design quality, and first-pass qualification objectives . Design, CAD & EDA Create, review, or analyze package layouts, substrate structures, stack-ups, drawings, design inputs, and engineering deliverables. Use CAD/EDA tools

The AI Enablement Engineer helps teams across Topgolf, technical and non-technical alike, get real value from AI by removing the friction that blocks adoption and building the reusable archetypes, skills, and governed integrations that let business teams build safe, working applications through Topgolf’s AI-SDLC pipeline. This role acts as the technical backstop, reviewing AI-generated code and specs for correctness, security, and adherence to engineering standards before anything ships. Partner with teams across Topgolf, technical and non-technical, to unblock AI adoption by configuring agent access, resolving friction, and showing teams how to get real value from available AI tools Design and build archetypes and skills (e.g., SKILL.md files, intake questionnaires, spec templates, code scaffolds) that package engineering standards and governance into reusable building blocks for the AI-SDLC pipeline Connect agents to internal systems, data sources, and tools through governed connectors and MCP-style integrations Monitor archetypes and agents for model drift, prompt bloat, and other degradation as underlying models and usage evolve, and keep code scaffolds and prompts current with secure coding practices and platform engineering standards Review AI agent-produced code, specs, and gate results for correctness, security, scope adherence, and good development practice before production Test archetypes and agents against adversarial prompting (prompt injection, jailbreak attempts) and implement guardrail hooks to enforce scope, safety, and policy compliance Build documentation, examples, and light training (office hours, walkthroughs, guides) to raise teams' baseline capability with AI Retire, merge, or extend archetypes based on usage and escalation patterns, and triage escalations to security, data owners, or app stewards, partnering with platform engineering so new archetypes and integra

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Integrate AI-assisted tool and insights into daily work to improve efficiency, quality or effectiveness. Contribute to a culture of continuous improvement by identifying , testing and sharing AI-enablement enhancement within one scope of work. Driving New Product Introduction process through NPI Phase Gate Review. Coordinating new product start- up to achieve first pass qualification. Understand new product start-up datelines, product applications and customer requirements; and communicate this information to the new product start-up team Working with process / equipment / manufacturing / planning area owners to bring new product and packag

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Key responsibilities and task:- To lead and manage the NPI activities as a Product Owner, working together with cross functional teams to accomplish organizational and business objectives by: Driving New Product Introduction process through NPI Phase Gate Review. Coordinating new product start-up and to achieve first pass qualification. Understand new product start-up datelines, product applications and customer requirements; and communicate this information to the new product start-up team Working with process / equipment / manufacturing / planning area owners to bring new product and package into volume production; Providing timely support of First silicon, Engineering samples, Qual samples and meeting expectation on Engineering Hot lots cycle time as per PDT schedule. Regular monitoring the product yield trend; QDR and reliability to ensure that assembly operation is in control and initiate early attention if necessary; Owning the entire Product Life Cycle, from NPI to EOL. Understanding new product challenges and collaborate with Process / Equipment/Development owners to develop new technology capabilities ahead of market Acting as a point of contact to TPM on product related matters. Requirements: Bachelor's degree in an Engineering (Mechanical, Material, Chemical, Electrical ). Passionate in backend engineering process or package development. Eager to learn technical knowledge in com

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. As an PDE Yield Enhancement (YE) Engineer within Package Development Engineering (PDE), you will be responsible for yield monitoring, excursion management, and yield stabilization during High Bandwidth Memory (HBM) New Product Introduction (NPI) . This role is critical to ensuring robust yield performance from first silicon through NPI ramp and early HVM , working closely with Process Integration (PI), MRDA, Process Engineering (PE), Assembly/Test Manufacturing, and Quality teams. You will act as a hands‑on yield owner during NPI builds, driving fast learning cycles, early risk detection, and disciplined yield recovery. Job Responsibilities: Integrates AI-assisted tools and insights into daily work to improve efficiency, quality, or effectiveness,exercising sound judgment and complying with organizational standards and legal requirements. Contributes to a culture of continuous improvement by identifying, testing, and sharing AI-enabled enhancements within one’s scope of work. Yield Loss Accounted For Account for HBM NPI builds across Post Wafer Finishing (PWF), Assembly, and

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. The PDE Process Integration (PI) Engineer is responsible for driving process integration excellence for High Bandwidth (HBM) products during New Product Introduction (NPI) . This role ensures robust process readiness, yield ramp, and cross‑module integration across Post Wafer Finishing PWF, assembly, and test , enabling successful execution of HBM technology roadmaps. The PI Engineer works cross‑functionally with Fab, Assembly, Test, Yield, Quality, and central engineering teams to identify risks early, resolve complex integration issues, and deliver NPI milestones on time. Job Responsibilities Integrates AI-assisted tools and insights into daily work to improve efficiency, quality, or effectiveness, exercising sound judgment and complying with organizational standards and legal requirements. Contributes to a culture of continuous improvement by identifying, testing, and sharing AI-enabled enhancements within one’s scope of work. NPI Execution & Support Execute assigned HBM NPI PI tasks following defined procedures and phase‑gate requirements Support NPI builds through lot tracking, data collection, and