PR Manager Taiwan

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities and Tasks General Expectations: Contribute to group objectives and drive projects with limited supervision. Continuously evaluate and refine approaches and goals. Implement and transfer processes across teams and sites. AI adaptation such as u sing Artificial Intelligence, applying Artificial Intelligence to daily tasks and create Intelligence agents to aid projects Specific Expectations: Define reticle specifications in collaboration with MTC for each node series. Ensure fracture teams apply best-known methods and correct misuse of techniques. Support tapeout teams in implementing new data preparation flows. Evaluate long-running fracture jobs that do not meet performance goals. Fulfill internal reticle material requests using standard production flows. Troubleshoot CD Metrology issues prior to OPC production handoff. Resolve integration issues using OPC procedures and identify recipe/process interactions. Provide feedback to OPC management for innovative improvements. Mentor peers by sharing hands-on knowledge beyond standard training. Deliver quality, timely results for significant projects with high impact. Foster positive interactions with team members, other departments, and suppliers. Ownership and Continuous Improvement: Evaluate issues and implement improvements in toolsets or pr

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Specific Responsibilities: 1. Drive HBM process development and yield improvement in PHOTO process. 2. Assist advanced package technology (chip stacking, 2.5D or 3D) research and development 4. Support project on-site execution and make decisions as technical consultant 5. Troubleshoot a variety of complex problems. Perform root cause analysis and resolve process engineering issues 6. Generate internal and external documentation for presentations and technical reports Technology Development 1. Understand department and organizational goals and objectives to ensure daily tasks align with Technology Development needs. 2. Engage in process development projects with cross-team interaction, providing expert contribution in materials characterization. 3. Coordinate mechanical characterization and testing for advanced packaging development efforts globally including US, Japan, and Singapore site. 4. Provide recommendations for test structure and test vehicle design for material property evaluation. 5. Review, summarize, and present data with recommendations of materials and lead discussions with packaging material suppliers to meet technical specifications and roadmaps. Qualifications: 1. 3-7 years PHOTO experience in semiconductor related industry 2. Degree/Major: Master above (PhD. is plus) major in Chemistry, Physic, Material, engineering science related fields 3. Solid understanding of photolithography fundamentals - PR coati

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Responsibilities: As an Engineer, TSE Probe Integration at Micron, you will play a crucial role in our ambitious and world-class team. Your responsibilities will include: Supporting the evaluation, fixing, installation, and deployment of Probe FOAK TOR equipment across manufacturing sites. Deploying best-known methods across all sites, addressing TOR procedure gaps and equipment deficiencies, and building and implementing improvements. Partnering with Probe HVM site equipment teams to develop and support new process and technology implementations. Monitoring process efficiency and OEE to identify improvement opportunities and recommend corrective actions. Supporting TOR equipment operating software and software release activities. Evaluating new technologies and FOAK equipment to improve current toolsets and operating methods. Completing assigned projects and tasks independently with a hardworking approach. Traveling domestically or internationally as needed to support business-critical projects and deployments. Adjusting to functional rotations according to business requirements. Bringing to bear AI skills to improve workability and adopting AI-related skills into the work. Leverage AI-enabled tools and data analytics to improve equipment performance, troubleshooting efficiency, and process optimization. Utilize AI and automation solutions to streamline engineering workflows, accelerate pr

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Responsibilities: As an Engineer, TSE Probe Integration at Micron, you will play a crucial role in our ambitious and world-class team. Your responsibilities will include: Supporting the evaluation, fixing, installation, and deployment of Probe FOAK TOR equipment across manufacturing sites. Deploying best-known methods across all sites, addressing TOR procedure gaps and equipment deficiencies, and building and implementing improvements. Partnering with Probe HVM site equipment teams to develop and support new process and technology implementations. Monitoring process efficiency and OEE to identify improvement opportunities and recommend corrective actions. Supporting TOR equipment operating software and software release activities. Evaluating new technologies and FOAK equipment to improve current toolsets and operating methods. Completing assigned projects and tasks independently with a hardworking approach. Traveling domestically or internationally as needed to support business-critical projects and deployments. Adjusting to functional rotations according to business requirements. Bringing to bear AI skills to improve workability and adopting AI-related skills into the work. Leverage AI-enabled tools and data analytics to improve equipment performance, troubleshooting efficiency, and process optimization. Utilize AI and automation solutions to streamline engineering workflows, accelerate pr

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people. Today, we’re tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what’s never been done before takes vision, innovation, and the world’s best talent. As an NVIDIAN, you’ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world. With the continuous improvement of chip technology, design scale and performance/power ratio, the physical design of digital chips is facing outstanding challenges in high frequency, low power consumption and multiple applications. High efficiency, high quality of the implementation of the construction chip is the guarantee of the company's competitiveness. As an ASIC-PD intern at NVIDIA, you'll learn and work on the tasks from RTL frozen to tape out, include synthesis, formal verification, constraints definition, timing closure/sign off, study on the timing impact of process and related methodology work. What you'll be doing: Chip integration and netlist generation, cross-team collaboration to implement chip partitioning and floorplan Synthesis, RTL/netlist quality check, formal verification, function eco creation Constraints creation and validation, timing budget, work with ASIC team to analyze/resolve function timing issues, achieve all special timing closure, such as io, test, clock, async etc. Work in conjunction with PR engineers for chip implementation to achieve full chip timing closue Develop and improve entire timing closure flow from frontend (pre-layou