Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Welcome to Micron's Advanced NAND Process Pathfinding Team — where the next generation of memory technology is developed. We operate at the groundbreaking forefront of semiconductor innovation, engineering world-class memory solutions built for uncompromising performance. If you're ready to redefine what's possible in NAND process technology, we'd love you on this journey with us. As a Principal Engineer / Member of Technical Staff (MTS) – Thin Films, you'll spearhead groundbreaking initiatives alongside some of the industry's most accomplished technologists. Your mission: architect and deploy next-generation thin film fabrication methods that keep Micron ahead of the global competition. This is a role for a technical leader who thrives on solving the toughest challenges in materials, deposition, and device integration. Responsibilities: Advance thin film process development to meet demanding structural, electrical, and reliability targets across the NAND roadmap. Lead the creation of thin films for next-generation NAND cells, including dielectric, conductive, interface, and charge-storage layers. Explore new materials, precursor chemistries, and deposition techniques to unlock future sca
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Role overview
Job description
Our vision is to transform how the world uses information to enrich life for all.
Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing.
Responsibilities
- Own package architecture and execution from feasibility through tape-out, qualification, and production readiness, ensuring design intent is translated into manufacturable, reliable, and scalable solutions.
- Serve as the technical authority for complex package issues, leading cross-functional reviews, trade-off decisions, and risk closure across product, silicon, technology, assembly, quality, supplier, and OSAT teams. Balance performance, reliability, manufacturability, cost, quality, and schedule to deliver production-ready solutions while mentoring engineers through difficult technical decisions.
- Advance design rules, methodologies, automation workflows, and technology roadmaps for future products.
- Represent the packaging team in Silicon–package–board co-design by integrating floorplan, interface, interconnect, power, signal, thermal, and mechanical requirements, and resolve cost and manufacturing trade-offs to achieve a balanced package solution.
- Ability to apply baseline digital fluency and role-appropriate AI literacy to use AI-enabled tools responsibly and effectively for research, analysis, content creation, problem-solving, operational tasks, and achieving business outcome.
Requirements
- Master’s degree in Electrical Engineering, Mechanical Engineering, Materials Engineering, or a related discipline; PhD candidates are welcome to apply.
- Minimum 10 years of relevant experience with deep expertise in package architecture and silicon–package co-design, including feasibility, stack-up, I/O and interconnect planning, substrate layout, routing, power delivery, signal return paths, and design verification.
- Hands-on experience with multiple relevant package technologies and strong knowledge of manufacturability, assembly processes, substrates, materials, reliability, and failure mechanisms.
- Proven ownership of complex package designs from feasibility and trade-off studies through NPI tape-out, qualification, and manufacturing handoff.
- Advanced proficiency with Cadence Allegro Package Designer / SiP Layout or equivalent package-design tools, including design-rule and review workflows.
- Strong technical leadership, mentoring, and stakeholder communication skills, with influence without direct authority; MTS candidates must demonstrate organization-wide impact on roadmaps, standards, or investment decisions.
- Integrates AI-assisted tools and insights into daily work to improve efficiency, quality, or effectiveness, exercising sound judgment and complying with organizational standards and legal requirements.
- Contributes to a culture of continuous improvement by identifying, testing, and sharing AI-enabled enhancements within one’s scope of work
About Micron Technology, Inc.
We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all. With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high-performance DRAM, NAND, and NOR memory and storage products through our Micron® and Crucial® brands. Every day, the innovations that our people create fuel the data economy, enabling advances in artificial intelligence and 5G applications that unleash opportunities — from the data center to the intelligent edge and across the client and mobile user experience.
To learn more, please visit micron.com/careers
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status.
To request assistance with the application process and/or for reasonable accommodations, please contact hrsupport_sg@micron.com
Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards.
Micron does not charge candidates any recruitment fees or unlawfully collect any other payment from candidates as consideration for their employment with Micron.
AI alert: Candidates are encouraged to use AI tools to enhance their resume and/or application materials. However, all information provided must be accurate and reflect the candidate's true skills and experiences. Misuse of AI to fabricate or misrepresent qualifications will result in immediate disqualification.
Fraud alert: Micron advises job seekers to be cautious of unsolicited job offers and to verify the authenticity of any communication claiming to be from Micron by checking the official Micron careers website in the About Micron Technology, Inc.
What they are looking for
Skills & requirements
Qualification
Master’s degree in Electrical Engineering, Mechanical Engineering, Materials Engineering, or a related discipline; PhD candidates are welcome to apply; Minimum 10 years of relevant experience with deep expertise in package architecture and silicon–package co-design, including feasibility, stack-up, I/O and interconnect planning, substrate layout, routing, power delivery, signal return paths, and design verification; Proven ownership of complex package designs from feasibility and trade-off studies through NPI tape-out, qualification, and manufacturing handoff
Hiring company
Micron
Micron is a global leader in memory and storage, powering AI and compute-intensive applications from cloud to edge with innovative semiconductor solutions.
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