Signal & Power Integrity Team Lead

About the job Shape the power-delivery architecture behind Graphcore’s high-performance AI compute systems, from voltage regulation through package, PCB and silicon. As Staff Power Integrity Engineer, you will provide technical leadership on Graphcore’s most complex power-delivery challenges. Your analysis and judgement will directly influence architecture and product decisions. You will define modelling strategies, optimise decoupling and analyse PDN impedance, voltage droop, transient response and regulator interactions. You will turn complex results into clear engineering decisions, requirements and sign-off approaches. You will lead significant PI issues through resolution and create alignment across silicon, package, board, power, systems and validation teams. You will also develop reusable methods and mentor engineers, raising power-integrity capability across Graphcore. The team and culture The Signal and Power Integrity team sits at the centre of Graphcore’s hardware development. We work across disciplines to understand electrical behaviour and guide consequential architecture decisions. You will own complex PI problems and drive them through to resolution. Decisions are grounded in modelling, first-principles reasoning, hardware evidence and clear assessment of uncertainty. You will challenge assumptions, communicate risk clearly and help teams make pragmatic trade-offs. Technical influence matters more than reporting lines. What we’re looking for Deep practical expertise in power integrity and complex power-delivery network design. Strong understanding of PDN impedance, transient behaviour, voltage droop, resonance, stability and decoupling across high-current digital systems. Ability to reason across silicon, package, PCB, voltage regulation and system boundaries. Strong capability in electromagnetic modelling, circuit simulation, model extraction and selecting appropriate abstraction methods. Engineering judgement to assess model validity, uncertainty an

About the job Shape the power delivery foundations behind advanced AI compute systems built for real-world reliability. As a Power Integrity Engineer, you will deliver robust power integrity solutions across Graphcore silicon and system designs. Your work will help advanced compute platforms operate reliably across complex packages, PCBs and hardware systems. You will develop and analyse power delivery networks across silicon, package and PCB designs. You will use simulation, measurement and lab correlation to turn power behaviour into clear design improvements. This role gives you ownership across the full system path. You will influence decoupling strategy, stack-up decisions, bring-up debug and best practice for future platforms. The team and culture You will join the Signal and Power Integrity team within Systems Engineering Hardware Motherboard. The team works across chip, package, board and system engineering to solve problems end to end. Work moves through modelling, simulation, validation and lab evidence. You will collaborate closely with hardware teams and third parties to improve power and signal performance. You will be trusted to guide technical decisions, review peer work and speak up when designs need challenge. Ownership sits close to the engineering detail. What we’re looking for · Strong understanding of power integrity principles, including PDN design and analysis · Proficiency with PI simulation tools such as PowerDC, PowerSI, HFSS/SiWave, Simplis, Spice, ADS or similar · Experience working across chip, package or board-level design · Ability to interpret simulation results and translate them into design improvements · Knowledge of electromagnetic simulation techniques and lab measurement using equipment such as VNAs and oscilloscopes · Strong analytical skills, clear communication and the ability to work cross-functionally While we have outlined a set of requirements, we value transferable skills and diverse experiences. If you meet most of our

About the job Design the high-speed signal paths that let advanced AI compute systems perform at datacentre scale. As a Signal Integrity Engineer, you will shape the electrical performance of Graphcore hardware platforms. Your work will help 112Gbps and 224Gbps SERDES, DDR and processor interfaces operate within demanding system budgets. You will develop, extract and simulate PCB structures across production systems and test boards. You will define launches, via structures, transmission lines, stack-ups and low-loss materials for future designs. This role spans simulation, lab validation and practical design influence. You will work from concept through prototype bring-up, debug, validation and support for manufacture. The team and culture You will join the Hardware Engineering team, working closely with PCB, package substrate, system architecture and supplier teams. Work moves through simulation, design review, lab evidence and practical trade-offs. You will be expected to own signal integrity decisions across complex board and package interfaces. The team values careful analysis, pace and clear communication when problems need action. Decisions are made close to the engineering detail. You will challenge designs, guide constraints and help teams reach the best performance possible. What we’re looking for · Strong experience in high-speed digital circuit development, with deep signal and power integrity knowledge · Experience with high-frequency SERDES design and validation, including tens of GHz operation · Expertise using tools such as ANSYS SIWave, HFSS, Mentor HyperLynx or similar · Ability to design BGA and connector launches, via structures and transmission lines for GHz signals · Hands-on lab experience using VNAs, high-speed oscilloscopes and signal generators · Rigorous approach to design, debug and validation, with strong ownership and communication skills While we have outlined a set of requirements, we value transferable skills and diverse experiences.

About the job Design the high-speed signal paths that let advanced AI compute systems perform at datacentre scale. As a Signal Integrity Engineer, you will shape the electrical performance of Graphcore hardware platforms. Your work will help 112Gbps and 224Gbps SERDES, DDR and processor interfaces operate within demanding system budgets. You will develop, extract and simulate PCB structures across production systems and test boards. You will define launches, via structures, transmission lines, stack-ups and low-loss materials for future designs. This role spans simulation, lab validation and practical design influence. You will work from concept through prototype bring-up, debug, validation and support for manufacture. The team and culture You will join the Hardware Engineering team, working closely with PCB, package substrate, system architecture and supplier teams. Work moves through simulation, design review, lab evidence and practical trade-offs. You will be expected to own signal integrity decisions across complex board and package interfaces. The team values careful analysis, pace and clear communication when problems need action. Decisions are made close to the engineering detail. You will challenge designs, guide constraints and help teams reach the best performance possible. What we’re looking for · Strong experience in high-speed digital circuit development, with deep signal and power integrity knowledge · Experience with high-frequency SERDES design and validation, including tens of GHz operation · Expertise using tools such as ANSYS SIWave, HFSS, Mentor HyperLynx or similar · Ability to design BGA and connector launches, via structures and transmission lines for GHz signals · Hands-on lab experience using VNAs, high-speed oscilloscopes and signal generators · Rigorous approach to design, debug and validation, with strong ownership and communication skills While we have outlined a set of requirements, we value transferable skills and diverse experiences.

About the job Validate the memory and system interfaces that keep advanced AI compute reliable under real product conditions. As a Validation and Debug Engineer, you will help prove Graphcore silicon and platforms work across the conditions our customers need. You will build deep understanding of our devices, boards and system behaviour. You will create and execute validation and debug plans for new hardware platforms. Your focus will include LPDDR5-9600, slow-speed interfaces, PCB issues, power behaviour and signal integrity. This is hands-on lab work with real ownership. You will investigate failures, tune memory subsystems and turn complex findings into clear actions across hardware and firmware. The team and culture You will work with Architecture, Silicon Engineering, Hardware Engineering, Firmware, PCB design, power and signal integrity teams. Progress comes through lab evidence, practical judgement and clear debug reports. The team moves quickly because the problems are real and often complex. You will own bring-up activity, drive root cause analysis and keep issues moving across teams. Decisions are made close to the data. You will be expected to speak up, challenge assumptions and help teams choose the right corrective action. What we’re looking for · Strong hands-on hardware debug experience, including board bring-up and subsystem debug · Experience validating and tuning LPDDR memory subsystems, ideally including LPDDR5 · Ability to debug PCB, power, signal integrity and interface issues through to root cause · Knowledge of DDR training, timing optimisation, margin analysis, eye diagrams and stability validation · Confident use of lab instrumentation, including high-bandwidth oscilloscopes, BERT systems and VNA/TDR equipment · Ability to work independently, take responsibility and drive issue resolution across hardware and firmware teams While we have outlined a set of requirements, we value transferable skills and diverse experiences. If you meet most of

About the job Debug the high-speed interfaces that decide whether advanced AI systems perform in the real world. As a Validation and Debug Engineer, you will help prove Graphcore silicon and platforms work across real product conditions. You will build deep knowledge of our devices, boards and system behaviour. You will own hands-on validation and debug in the lab, focused on SerDes, PCIe Root Complex and Ethernet. Your work will help resolve complex issues across silicon, hardware, firmware and architecture teams. This role is for someone who enjoys getting close to the hardware. You will tune links, investigate failures and turn difficult lab findings into clear engineering decisions. The team and culture You will work closely with Architecture, Silicon Engineering, Hardware Engineering and Firmware. Progress comes through practical evidence, clear communication and fast problem solving. The team expects ownership without daily oversight. You will drive bring-up, debug issues and help teams reach decisions based on data. You will be trusted to speak up when something is unclear or risky. The best ideas can come from anyone close to the problem. What we’re looking for · Strong hands-on hardware validation experience, including board bring-up and subsystem debug · Experience validating and debugging Ethernet, PCIe Root Complex and SerDes systems · Confident use of lab instrumentation, including oscilloscopes, BERT systems, VNA/TDR equipment and PCIe protocol analysers · Ability to debug signal integrity, protocol-level and interface issues through to root cause · Experience with PCIe bring-up, LTSSM analysis, link training, equalization tuning and interoperability testing · Ability to work independently, take responsibility and drive issue resolution across teams While we have outlined a set of requirements, we value transferable skills and diverse experiences. If you meet most of our essential criteria, we encourage you to submit an application and showcase how you