Staff Engineer - ASIC DV

Silicon Verification Engineer Multiple roles across different levels Graphcore is a globally recognised leader in Artificial Intelligence computing systems. The company designs advanced semiconductors and data centre hardware that provide the specialised processing power needed to drive AI innovation, while delivering the efficiency required to support its broader adoption. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. We are opening a new AI Engineering Campus in Bengaluru which will play a central role in Graphcore's work building the future of AI computing. The verification team sits within the Silicon design team and is responsible for ensuring that the RTL created by the logical design team and used by the physical design team matches the architecture specification for Graphcore silicon. The silicon verification engineer is responsible for verification activities within Graphcore, helping the team meet the company objectives for quality silicon delivery. Responsibilities Verification planning, specification and closure of functional coverage Providing feedback to architects Test generation and failure diagnosis/triage Contributing to shared verification infrastructure Ensuring good communication between sites Essential skills: • Verification experience in relevant industry • Proven leadership and planning skills • Highly motivated, a self starter, and a team player • Ability to work across teams and programming languages to find root causes of deep and complex issues • Experience of the verification process applied in CPU and/or ASIC environments • System Verilog, Python, C++, Linux Desirable skills: • UVM • SVA • Assembly languages • LLVM, GCC • DVCS e.g. Git • SGE or other DRMS • XML and XPath/XSLT • Web programming – HTML/DOM, Javascript, SQL Benefits: In addition to a competitive salary, Graphcore offers a competitive benefit

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. ASIC IP STA Engineer (6-10 Years) | DDR PHY / ONFI PHY / IO Expander Location: Bengaluru, India Experience: 6-10 Years Enducational Qualification : BE/B-Tech/M-Tech (EEE, ECE, Micron Electronics, VLSI) Key Requirements Member of the AMS IP Physical Design team , responsible for post-layout STA signoff and timing closure of high-speed interface IPs, with close collaboration across IP Design, SoC Synthesis, and SoC Physical Design teams throughout IP development and SoC integration. 6-10 years of experience in Static Timing Analysis (STA) with a proven track record of 4 &#43; successful tapeouts . Strong hands-on expertise with Cadence Tempus (preferred). In-depth experience in MMMC timing analysis and closure across functional, scan, MBIST, and other DFT modes. Experience working on high-speed Memory Interface IPs such as DDR PHY, ONFI PHY, IO Expander (IOE) , or similar high-performance interface designs. Strong understanding of timing constraints development, validation, and debug , including clocks, generated clocks, timing exceptions, and mode-specific constraints. Experience in Liberty (.lib) and ETM timing model generation, validation, correlation, and quality assessment . <span

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. What Makes This Opportunity Unique At Micron, we're not just offering a job; we're presenting a chance to be part of a team that develops the future of memory and storage solutions. As a Staff Engineer, ASIC STA in our Bengaluru office, you will have the opportunity to work with powerful technology and contribute to highly innovative projects. Your work will help us deliver flawless results and uphold our world-class standards! Job Responsibilities Proficient at Synthesis, Static Timing Analysis (STA), and Logic Equivalence Checking (LEC) Ability to understand and integrate new mixed signal complex IPs Expertise in developing constraints and timing models Manage synthesis to timing closure, ensuring all checks for silicon success Experience with hierarchical designs involving high-frequency clocks Proficient with scripting, automation, and EDA tools Proficiency with AI and AI-enabled workflows Solid understanding of low power builds involving multiple power domains Identify and meet requirements for critical paths of multi-GHz builds Collaborate effectively in multi-functional and globally dispersed teams Requirements M.S./M.Tech, BS/BE in Electronics or related field Minimum of 6&#43; years of relevant experience Proven ability to successfully implement complex builds Ambitious and determined to compete at a global level <

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are looking for a highly skilled and motivated Senior Design Verification Engineer to join our team. In this role, you will be responsible for the end-to-end verification of our IOMMU (Input/Output Memory Management Unit) IP. You will play a critical role in ensuring the functional correctness and performance of the design, taking ownership of the verification process right from the initial specification understanding down to final coverage closure. This role is hybrid, based out of Bangalore, India. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are You have hands-on experience in ASIC or SoC verification using SystemVerilog and UVM. You enjoy debugging complex design and verification issues and working closely with cross-functional teams. You’re comfortable building verification environments from scratch and driving coverage closure. You have familiarity with standard bus protocols and modern verification tools. What We Need Experience owning block or subsystem-level verification from test planning to sign-off. Strong understanding of constrained-random verification, coverage analysis, and regression debugging. Familiarity with proto

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Description Key Responsibilities: Lead first‑silicon bring‑up, board validation, and early silicon debug. Develop and complete detailed electrical characterization plans covering DC, AC, parametric, and functional measurements. Characterize high‑speed interfaces such as DDR/LPDDR, SerDes, MIPI, UFS, or custom Micron PHYs. Perform post‑silicon electrical characterization of ASIC/SoC/Memory products across process, voltage, and temperature (PVT) corners. Conduct lab measurements using equipment such as Oscilloscopes, BERTs, VNAs, Spectrum analyzers, Waveform generators, and support tools. Involve in Board design activities with team to gather and place custom requirements as per Chaz. Perform signal integrity (SI), power integrity (PI), Jitter, Eye‑diagram, and compliance testing. Debug silicon issues related to timing, noise, stability, margin loss, and functional failures. Analyze failures and recommend design, firmware, or test fixes. Develop Python/MATLAB-based automation for measurements, data collection, and analysis. Process large volumes of lab and silicon data to extract trends, margins, and correlations. Generate concise characterization reports with clear conclusions and recommendations. Work closely with design, pre‑silicon verification, product engineering, firmware, test, and systems teams. Correlate post‑silicon results with simulation and pre‑silicon expectations to identify root cau

Who we are About Stripe Stripe is a financial infrastructure platform for businesses. Millions of companies—from the world’s largest enterprises to the most ambitious startups—use Stripe to accept payments, grow their revenue, and accelerate new business opportunities. Our mission is to increase the GDP of the internet, and we have a staggering amount of work ahead. That means you have an unprecedented opportunity to put the global economy within everyone’s reach while doing the most important work of your career. About the team The Commercial Experiences Engineering team is part of the Commerce Systems organization at Stripe. We focus on ensuring that our users, both internal and external, have a best-in-class experience with billing at Stripe. This includes working on the systems and processes needed to bill our largest and most complex customers, as well as designing and delivering experiences to help guide users through their billing, from fee explainability to deep diving on product usage optimization. We are a cross-functional technical team that seeks to bring clarity to a complex space. The team is at the crux of all Stripe products and builds user-facing as well as internal infrastructure. We build platforms and services to define and manage pricing, calculate and collect Stripe's revenue, and empower Stripe and our users to understand and manage revenue and costs. We work on customer-facing experiences, internal platforms, and data pipelines to empower Accounting, Finance, Strategy, Sales, and Stripe's Products to drive business value across the entire user and product lifecycle. What you’ll do We are seeking an experienced technical leader to join our India-based team and drive the technical roadmap for Commercial Experiences Engineering, collaborating deeply with partner teams across Commerce Systems in the US, EMEA, and India. In this role, you will work closely with engineering managers, senior engineers, and cross-functional partners to help design ar