Staff Engineer, TPG IE Budgeting

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Department Intro: The Advanced Packaging Technology Development (APTD) team at Micron leads the creation of powerful memory and storage solutions that power the AI era. We work hands-on with global R&D groups, suppliers, and manufacturing teams to turn breakthrough ideas into real, production-ready technologies. We thrive on innovation and collaboration! Position Overview: This role will be part of a highly collaborative and innovative Advanced Packaging Wafer Edge Trim, Backgrind & Thinning R&D team, responsible for developing and scaling critical mechanical wafer processing modules. This role offers broad opportunities for technical innovation, early stage pathfinding, and ownership of process solutions that enable next generation advanced packaging technologies. You will work closely with process integration and adjacent process areas including Bonding/De-bonding, CMP, Wet Etch, Lithography, Assembly, and Test, while driving process readiness to meet bold program, performance, and yield targets. Responsibilities: Develop and optimize wafer edge trim, backgrind, and thinning processes to meet the mechanical, electrical, and reliability requirements of Micron’s advanced memory products. Improve process capability, yield, cost efficiency, and wafer integrity through data‑driven optimization and equipment or consumable innovation. Conduct root‑cause and failure‑mode analyses to understand wafer damage mechanisms such as edge chipping, micro‑cracks, subsurface damage,

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron is seeking a highly experienced Staff Engineer for Design Enablement and Layout in Advanced Packaging Technology Development. This role involves coordinating cross-functional engineering teams across geographies to develop and optimize design rules, requirements, design, and layout from early development through manufacturing! Job Description: Responsibilities will include, but are not limited to: Develop and refine Design Rules, Requirements, and Test Structures for advanced packaging. Create layout and DBR test vehicle and product designs to support technology development. Ensure robust Design Rule Checks (DRC) and appropriate responses to deviations. Analyze large datasets to extract meaningful insights and drive data-driven decision-making. Leverage of artificial intelligence to reduce development time. Manage structure evaluation to support development and quantify process margins. Strategically partner with teams to resolve process issues related to layout and prioritize solutions. Document and communicate complex problem resolutions and drive cross-node design rule alignment. Maintain effective communication across Process Integration, Product Engineering, Design, and Advanced Mask teams. Minimum Qualifications: BS/MS/PhD in Electrical Engineering, Microelectronics, Physics, or related field. 5+ years of experience in semiconductor industry in areas such as Process Integration, Yiel

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron Idaho Semiconductor Manufacturing (Triton) LLC Responsible for shaping long range fab strategy by owning wafer loading models, enabling scenario based capacity decisions, managing business plan governance, coordinating capital and equipment needs, and integrating data, modeling, and crossfunctional alignment to support TD and HVM technology/business roadmaps in F4. Develop and maintain long-range planning models for equipment, capital, space, and layout, providing impacts for leadership reviews. Complete scenario capacity analyses, communicating site impacts, and preparing artifacts with baseline volumes, forces for change, and capital projections. Manage and maintain key technology and construction achievements for all US manufacturing sites. Provide dynamic plan analytics to enable informed decision-making on strategic wafer loading plans by executives and global partners. Perform comprehensive Fab-wide capacity analysis for US Expansion sites, ensuring accurate modeling inputs and collaborating with collaborators. Employer will accept a Master’s degree in Industrial Engineering, Operations Research, Economics or a related field and 4 years of experience in the job offered or related occupation. Position requires: 1. Model development for manufacturing production planning; 2. Developing centralized wafer loading and S&OP planning processes; 3. Capital project evaluation; 4. Cash flow, payback, and ROI analysis; 5. Tableau and Python; 6. Statistical analysis and methods

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Staff Engineer in Micron’s HBM Product Engineering Component Validation team, you will be an individual contributor responsible for the validation of advanced High Bandwidth Memory (HBM) products. You will use proven knowledge in dynamic random-access memory and high-bandwidth memory architecture to compose validation coverage, implement and analyze validation runs, lead product debug and failure analysis toward a zero-escape validation goal across test modes and product achievements. You will also adopt AI-enabled ways of working, using enterprise AI tools to accelerate your engineering tasks and improve efficiency, work within Micron’s global validation organization and collaborate with groups at different locations. Responsibilities: Translate DRAM/HBM develop intent and architecture into effective verification scope and test cases. Contribute to validation of new and high-risk product features, working with Design Validation, and Systems Engineering. Review design specifications, schematics, and datasheets, provide design feedback and represent the Product Engineering perspective in Design and Verification reviews. Read, analyze, and debug circuit blueprints to detect design-related failure mechanisms, and recommend approaches for verification and fault diagnosis. Perform root-cause analysis and examination of electrical failures (debug) of validation findings, distinguishing developed marginality from process and test-related issues. Apply automation and modern tooling (including

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are part of Micron’s DRAM Technology Development organization, advancing dry etch technology for future memory generations. Our team works at the intersection of plasma science, device integration, and manufacturing, developing processes that directly influence performance, yield, and scalability. We collaborate closely across process areas to solve challenging technical problems and accelerate technology learning! As a DRAM Dry Etch Engineer, you will develop and optimize plasma etch processes that enable next-generation memory devices. You will work in a research and development environment, taking concepts from early development through manufacturing implementation. This role offers broad technical ownership, hands-on experimentation, and opportunities to shape future technology roadmaps. Responsibilities: Develop and optimize dry etch processes to meet structural and electrical requirements Collaborate with integration and process teams to solve complex device and process challenges Perform root cause analysis and drive yield, defect, and process improvements Analyze data to improve process capability, stability, and manufacturing readiness Support process transfer, project execution, and production issue resolution Minimum Qualifications: MS or PhD with 3–5 years of relevant experience, or BS with 5–10 years of semiconductor experience Experience in dry etch process dev

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Department Intro: The Advanced Packaging Technology Development (APTD) team at Micron leads the creation of powerful memory and storage solutions that power the AI era. We work hands-on with global R&D groups, suppliers, and manufacturing teams to turn breakthrough ideas into real, production-ready technologies. We thrive on innovation and collaboration! Position Overview: This role will be part of a highly collaborative and innovative Advanced Packaging Wafer Edge Trim, Backgrind & Thinning R&D team, responsible for developing and scaling critical mechanical wafer processing modules. This role offers broad opportunities for technical innovation, early stage pathfinding, and ownership of process solutions that enable next generation advanced packaging technologies. You will work closely with process integration and adjacent process areas including Bonding/De-bonding, CMP, Wet Etch, Lithography, Assembly, and Test, while driving process readiness to meet bold program, performance, and yield targets. Responsibilities: Develop and optimize wafer edge trim, backgrind, and thinning processes to meet the mechanical, electrical, and reliability requirements of Micron’s advanced memory products. Improve process capability, yield, cost efficiency, and wafer integrity through data‑driven optimization and equipment or consumable innovation. Conduct root‑cause and failure‑mode analyses to understand wafer damage mechanisms such as edge chipping,