Analog Circuit Design Engineer in Jalisco

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a DRAM Design Engineering Group at Micron Technology, Inc. you will be responsible for translating schematics into layout used for the creation of fabrication reticules. You will be required to meet all engineering and process related criteria needed for an assigned DRAM product. You will organize and prioritize logistics and resource allocations to meet scheduled deadlines, and proactively develop methodologies for issue resolution. In this role you will work with Design and other engineering groups to apply multiple layout techniques for the design and verification of digital and analog circuits. You will be expected to understand various circuit design protocols, different fab processes, mask generation techniques, and tapeout processes and procedures. Responsibilities: Responsible for Design and development of IP layouts used in DRAM chips. Perform layout verification like LVS/DRC/EM, quality check and documentation. Responsible for on-time delivery of block-level layouts with acceptable quality. Demonstrate leadership skill in planning, area/time estimation, scheduling, delegation and execution to meet project schedule/breakthroughs in multiple project environment. Contribute to effective project-management. Plan and detail your layout, presenting material for global teams to review Optimally connect with engineering teams in India, Japan the US, and other global teams to ensure the success of the layout project. Minimum Qualifica

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. For more than 43 years, Micron Technology, Inc. has redefined innovation with the world’s most advanced memory and semiconductor technologies. We’re an international team of visionaries and scientists, developing groundbreaking technologies that are transforming how the world uses information to enrich life. As a DRAM Design Engineering Group at Micron Technology, Inc. you will be responsible for translating schematics into layout used for the creation of fabrication reticules. You will be required to meet all engineering and process related criteria needed for an assigned Dram product. You will organize and prioritize logistics and resource allocations to meet scheduled deadlines, and proactively develop methodologies for issue resolution. In this role you will work with Design and other engineering groups to apply multiple layout techniques for the design and verification of digital and analog circuits. You will be expected to understand various circuit design protocols, different fab processes, mask generation techniques, and tapeout processes and procedures. Responsibilities: Responsible for Design and development of IP layouts used in DRAM chips. Perform layout verification like LVS/DRC/EM, quality check and documentation. Responsible for on-time delivery of block-level layouts with acceptable quality. Demonstrate leadership skill in planning, area/time estimation, scheduling, delegation and execution to meet project schedule/breakthroughs in multiple project environment. G

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. At Micron, we innovate to transform how the world uses information to enrich life. For more than 40 years, we have developed advanced memory and semiconductor technologies that power innovation across industries worldwide. As a DRAM Engineering Group (DEG) Layout Designer at Micron Technology, Inc. you will be responsible for translating schematics into layout used for the creation of fabrication reticules. You will be required to meet all engineering and process related criteria needed for an assigned Dram product. You will organize and prioritize logistics and resource allocations to meet scheduled deadlines and proactively develop methodologies for issue resolution. In this role you will work with Design and other engineering groups to apply multiple layout techniques for the design and verification of digital and analog circuits. You will be expected to understand various circuit design protocols, different fab processes, mask generation techniques, and tape out processes and procedures. Our team vision is a continuing desire to develop your skills working in a Team across worldwide geographies! Enabling the creative career path you deserve with a collaborative environment and groundbreaking technology and growing upon your imagination and creativity. Responsibilities: Develop and optimize IP layouts for DRAM products while ensuring compliance with design, process, and reliability requirements. Perform physical verification activities including DRC, LVS, EM, quality reviews, and documentation

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. SUMMARY: At Micron, we focus on developing groundbreaking silicon-to-systems solutions. We handle technology development, advanced memory builds, product development, system development, and validation to create world-class memory solutions. In this position, you will collaborate with Micron’s global design, layout, and verification teams to develop high-quality physical layouts for cutting-edge DRAM products. You will gain hands-on experience in semiconductor layout building, physical verification, and industry-standard Electronic Compose Automation (EDA) tools. RESPONSABILITIES: Design and Verify All Levels of Analog and Digital Layout Use computer aided design software (i.e. Cadence, Calibre, etc.) Work with Design Engineers to floor plan and design layout Understand and follow verification protocols Apply custom and/or automated layout techniques to design pitch, array, and peripheral layout for digital and analog circuits. Collaborate with build engineering to understand layout methodology. Possess basic understanding of circuit design and electronics. Minimum Qualifications: Student pursuing a bachelor's degree (last 2 semesters preferred) in Electrical Engineering, Electronics Engineering, Mechatronics, Robotics, Nanotechnology, Computer Engineering, or a related field. Completed coursework or academic projects related to microelectronics, semiconductor devices, VLSI, or integrated circuit design.

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Description We develop advanced memory technologies that transform how the world uses information to enrich life for all. As a Design Engineer, you will craft and optimize digital, analog, and memory circuits while collaborating with global design and verification teams. You will build solutions that improve quality, reliability, manufacturability, and product performance while continuing to learn and innovate in a global engineering environment! Responsibilities Design, develop, and optimize memory, logic, and analog circuits for new memory products. Perform circuit validation, parasitic modeling, reticle experiments, and tape-out revisions to drive performance and manufacturing efficiency . Lead layout activities including floorplanning, placement, routing, verification, modeling, and simulation using industry-standard tools. Collaborate across Product Engineering, Test, Probe, Process Integration, Assembly, and Marketing to solve technical challenges and support successful product execution. Drive innovation in future memory technologies while building design quality and standardization across global engineering teams. Minimum Qualifications Bachelor’s degree or equivalent experience in Electrical Engineering, Electronic Engineering, or a related field, with 10+ years of relevant industry experience; or a master’s degree with 7+ years; or a Ph.D. with 5+ years of relevant industry experienc

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. For more than 47 years, Micron Technology, Inc. has redefined innovation with the world’s most advanced memory and semiconductor technologies. We’re an international team of visionaries and scientists, developing groundbreaking technologies that are transforming how the world uses information to enrich life for all. Become an Engineer CAD at Micron Technology in Guadalajara. Chip in to innovative memory designs impacting HBM, DRAM, and new technologies. Responsibilities: Provide day-to-day support for CAD tools, flows, and collateral, ensuring they meet the needs of HBM design teams at the Guadalajara Design Center. Collaborate closely with HBM design, layout, and verification methodology teams to propose and co-develop sophisticated capabilities, ensuring the deployment of outstanding practices and methodologies. Support all aspects of mixed-signal, transistor-level custom IC design, including logical design, custom layout, parameterized cells, automated place and route tools, physical design verification, ERC, Layout Parasitic Extraction, pre and post layout netlisting and simulation, digital and analog circuit simulation, timing and power analysis, reliability simulation and analysis, tape out, and mask generation. Minimum Qualifications: Bachelor’s or preferably a Master’s/PhD in Computer Engineering, Computer Science, or Electrical Engineering. 5+ years of direct CAD or Design experience in mixed-signal, custom IC design flows. Proven experience w

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Key Responsibilities Design layout for leaf cells, standard cells (Stdcell), or sub-blocks. Apply a systematic, meticulous, and methodical approach to IC layout design. Interpret DRC/LVS and other physical verification checks to ensure design accuracy. Demonstrate ownership and proactively plan work to meet project timelines. Collaborate effectively with internal teams to ensure successful layout project execution. Minimum Qualifications Bachelor’s, Master’s, or PhD in Electronics, Mechatronics, Robotics Engineering, Nanotechnology, or related fields. Graduation within the last 2 years (Bachelor’s, Master’s, or PhD). Strong knowledge of electronic circuit concepts. Experience using circuit simulation and design tools. Effective interpersonal and problem-solving skills. English communication skills (conversational level required). Self-motivated, enthusiastic, and collaborative standout colleague. Passion for technology and willingness to grow in the semiconductor industry. Preferred Qualifications Internship or academic project experience in pre-silicon circuit design. Understanding of pre-silicon development areas such as analog circuits and physical design. Basic knowledge of MOS concepts, semiconductor fabrication, and analog layout fundamentals. Strong interpersonal skills and goal-oriented perspective. Experience with programming or script

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Description For more than 47 years, Micron Technology, Inc. has redefined innovation with the world’s most advanced memory and semiconductor technologies. We’re an international team of visionaries and scientists, developing groundbreaking technologies that are transforming how the world uses information to enrich life for all. Become an Engineer CAD at Micron Technology in Guadalajara. Contribute to innovative memory designs impacting HBM, DRAM, and new technologies. Responsibilities: Provide day-to-day support for CAD tools, flows, and collateral, ensuring they meet the needs of HBM design teams at the Guadalajara Design Center. Collaborate closely with HBM design, layout, and verification methodology teams to propose and co-develop advanced capabilities, ensuring the deployment of outstanding practices and methodologies. Support all aspects of mixed-signal, transistor-level custom IC design, including logical design, custom layout, parameterized cells, automated place and route tools, physical design verification, ERC, Layout Parasitic Extraction, pre and post layout netlisting and simulation, digital and analog circuit simulation, timing and power analysis, reliability simulation and analysis, tape out, and mask generation. applying Artificial Intelligence Minimum Qualifications: Bachelor’s or preferably a Master’s/PhD in Computer Engineering, Computer Science, or Electrical Engineering. 5+ years of direct CAD or Design experience in mixed

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Lead Principal Engineer, Layout Design at Micron, you will be at the forefront of developing groundbreaking memory solutions! This role is an outstanding opportunity to lead the physical implementation of modern DRAM and mixed-signal circuits, turning schematics and specifications into flawless, manufacturable layouts. You will collaborate with a world-class team of Circuit Designers, Verification Engineers, CAD/Methodology experts, Process Integrators, Product Engineers, Test/Probe specialists, Assembly professionals, and Marketing strategists. Together, we will drive cost, quality, reliability, time-to-market, and customer happiness through outstanding layout and build. Key Responsibilities Lead the layout build and physical realization of new memory products. Interpret device and circuit specifications to implement custom layout solutions meeting PPA (power, performance, area) and reliability targets. Develop hierarchical layouts for analog, digital, and memory-array-related circuitry using industry-standard EDA tools. Build block and top-level floorplans optimizing placement, routing resources, signal integrity, power delivery, and manufacturability. Optimize layout for critical metrics such as die size/area efficiency, matching, coupling/noise, and timing. Produce layout collateral and documentation for cross-team integration. Physical Verification and Tapeout Signoff Run and debug physical verification flows and ensure closure using indust

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. SUMMARY: As a Design Engineer at Micron Technology, Inc., you will be responsible for designing and analyzing digital and analog circuits used in the development of memory products. We are engaged in developing groundbreaking silicon-to-systems solutions – right from technology development and advanced memory designs to product development, systems design and validation resulting in world class memory solutions. In this position, you will collaborate with Micron’s various design and verification teams all over the world and support the efforts of groups such as Product Engineering, Test, Probe, Process Integration, Assembly and Marketing to proactively design products that optimize all manufacturing functions and assure the best cost, quality, reliability, time-to-market, and customer satisfaction. Responsibilities: Contributing to the development of new product opportunities by assisting with the overall design, layout, and optimization of Memory/Logic/Analog circuits. Parasitic modeling and assisting in design validation, reticle experiments and required tape-out revisions. Overseeing and managing the layout process including floor-planning, placement, and routing. Performing verification processes with modeling and simulation using industry standard simulators. Contributing to cross group communication to work towards standardization and group success. Working with Marketing, Probe, Assembly, Test, Pro

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. For more than 45 years, Micron Technology, Inc. has been at the forefront of innovation, delivering the world’s most advanced memory and semiconductor technologies. Our distributed team of engineers, scientists, and visionaries is developing groundbreaking solutions that redefine how the world uses information to enrich life for all. We are seeking a Layout Design Engineering Manager to join Micron’s High Bandwidth Memory (HBM) organization in Guadalajara, Mexico. In this leadership role, you will guide a distributed team focused on developing complex analog, mixed‑signal, and custom layouts powering next‑generation AI and high‑performance computing solutions. Responsibilities Manage a team responsible for crafting and developing critical layouts for analog circuits, mixed-signal components, and custom blocks, including support for full-chip-level integration. Oversee layout verification activities, including LVS, DRC, Antenna checks, documentation, and quality reviews. Ensure timely and high‑quality delivery of block‑level layouts that meet all project requirements. Coordinate planning, area/time estimation, scheduling, task delegation, and execution for multiple concurrent projects. Mentor and guide layout engineers of all levels. Perform detailed reviews of sub‑block‑level layouts. Collaborate with global engineering teams to drive successful project execution and alignment across Micron’s worldwide footprint. </

Analog Design Engineer — Jalisco, Mexico. Apply via Workday.

ANALOG/AMS VERIFICATION ENGINEER - HBM — Jalisco, Mexico. Apply via Workday.

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. For more than 45 years, Micron Technology, Inc. has transformed innovation with the world’s most advanced memory and semiconductor technologies. We’re an international team of visionaries and scientists, developing groundbreaking technologies that are redefining how the world uses information to enrich life. We are looking for Layout Build engineer at our Micron Technology’s DRAM Team in Guadalajara, Mexico. As a Layout Design engineer, you will be working for intensive applications such as artificial intelligence and high performance computing solution, High Bandwidth Memory. As a Layout Design Engineer you will be collaborating with peer teams crossing Micron global footprint, in a multiple projects-based environment. Responsibilities: Build and development of analog, mixed-signal, custom digital block and full chip level integration support. Perform layout verification like LVS/DRC/Antenna, quality check and documentation. Responsible for timely delivery of block-level layouts with acceptable quality. Will bee leading planning, area/time estimation, scheduling, delegation and execution to meet project schedule/achievements in multiple project environment. Optimally copresentingith Global engineering teams to assure the success of layout project. Minimum Qualification: Around 5 years of experience in analog/custom layout design in sophisticated CMOS process, in various technology nodes (Planar, FinFET). <

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. For more than 45 years, Micron Technology, Inc. has been at the forefront of innovation, delivering the world’s most advanced memory and semiconductor technologies. Our distributed team of engineers, scientists, and visionaries is developing groundbreaking solutions that redefine how the world uses information to enrich life for all. We are seeking a Layout Design Engineering Led to join Micron's organization in Guadalajara, Mexico. In this leadership role, you will guide a distributed team focused on developing complex analog, mixed‑signal, and custom layouts powering next‑generation AI and high‑performance computing solutions. Responsibilities Lead a team designing and developing critical analog, mixed‑signal, and custom block layouts, including support for full‑chip-level integration. Oversee layout verification activities, including LVS, DRC, Antenna checks, documentation, and quality reviews. Ensure timely and high‑quality delivery of block‑level layouts that meet all project requirements. Coordinate planning, area/time estimation, scheduling, task delegation, and execution for multiple concurrent projects. Mentor and guide layout engineers of all levels. Perform detailed reviews of sub‑block‑level layouts. Collaborate with global engineering teams to drive successful project execution and alignment across Micron’s worldwide footprint. Minimum Qualificatio