Cloud Infrastructure Engineer Jobs

Job Description Digital Experience (DX) ( https://www.adobe.com/experience-cloud.html ) is a USD 4B+ business serving the needs of enterprise businesses including 95%+ of fortune 500 organizations. Adobe Marketo Engage, within Adobe DX is the world’s largest marketing automation platform, is a singular solution that lets enterprises attract, segment and nurture customers — from discovery to biggest fan. It lets enterprises do effective engagement through various surfaces and touchpoints. We seek dedicated and enthusiastic engineers to join our team as we expand the business by developing the next generation products and contributing to our current offerings. If you’re passionate about innovative technology, then we would be excited to talk to you! What you'll do Be an inspiring leader in building next generation Multi-cloud services. Deliver high-performance services that are adaptable to multifaceted business needs, influence ideation & outstanding problem solving Build secure cloud services which provides very high availability, reliability and security to our customers and their assets. Lead the technical design, vision, and implementation strategy Define and apply best-practices to build maintainable and modular solutions with high quality Partner with global product management, UX, engineering and operations teams to help shape technical product architecture & practices, roadmap and release plans Develop and evolve engineering processes and teamwork models, applying creative problem solving to optimize team efficiency Create technical specifications, prototypes and presentations to communicate your ideas. Mentor and guide high performing engin

EnCharge AI is a leader in advanced AI hardware and software systems for edge-to-cloud computing. EnCharge’s robust and scalable next-generation in-memory computing technology provides orders-of-magnitude higher compute efficiency and density compared to today’s best-in-class solutions. The high-performance architecture is coupled with seamless software integration and will enable the immense potential of AI to be accessible in power, energy, and space constrained applications. EnCharge AI launched in 2022 and is led by veteran technologists with backgrounds in semiconductor design and AI systems. About the Role EnCharge AI is looking for a highly motivated and experienced Staff Physical Design Engineer to drive the physical implementation of our next-generation semiconductor chips. In this role, you will play a critical part in translating complex microarchitectures into high-performance, power-efficient silicon. Working closely with cross-functional teams, you will own block-level and top-level implementation using industry-standard EDA tools, tackle complex timing closure and power challenges, and guide designs all the way from netlist to successful foundry tapeout. Key Responsibilities Drive block-level and top-level physical design, including floor-planning, placement, clock tree synthesis (CTS), and routing. Achieve aggressive timing, power, and area (PPA) targets through advanced timing closure techniques. Perform power grid verification and manage electromigration and IR drop (EM/IR) analysis and resolution. Develop and maintain automation scripts (Tcl/Python) to streamline design flows and methodologies. Collaborate with physical verification and foundry teams to ensure design rule compliance and successful tapeout execution. Qualifications and Requirements Bachelor's or Master’s degree in Electrical Engineering, Computer Engineering, or a related field. 10–15 years of dedicated experience in physical design. Strong understanding of EDA implementation flows

About Us The Rubrik Security Apps team helps customers secure their data on the cloud. Cloud data is growing at an ever growing pace and so are the risks with cyber attacks targeted towards cloud data. We make it easy for businesses to protect, search, analyze all of their cloud data simply and scalably. Security Apps is one of the fastest growing businesses and teams within Rubrik. We consider ourselves a startup inside a startup! Join us in this journey where there are ever widening avenues to explore, opportunities to innovate, deep engineering problems to tackle. We believe in fostering a culture with strong engineering values and teamwork as the key to building a great company and product. When you become part of our dynamic and innovative team, you'll contribute to the development of cutting-edge products within a fast-growing company that prides itself on an exceptional culture and a dynamic work environment. About the Role We're looking for a Senior Backend Engineer to join our R&D team. You will work closely with our product team to build our unique product offering. As a Senior Backend Engineer, you will be responsible for building complex backend designs that are both scalable and fault-tolerant, developing our data ingestion pipeline and introducing new analysis engines. What You'll Be Doing Design, develop, test, deploy, maintain and improve the software. You’ll have your domain of expertise in which you'll assist the product team with future directions, lead the technology and cooperate with other engineers. You’ll develop backend services that integrate with and ingest data from various cloud providers that store sensitive data. You’ll build pipelines that analyze, classify, correlate and process this data. You’ll build systems that detect anomalies in the ingested data for alerting the customer, that automatically resolve issues and that generate sophisticated yet easily consumable insights arising from the processed dat

EnCharge AI is a leader in advanced AI hardware and software systems for edge-to-cloud computing. EnCharge’s robust and scalable next-generation in-memory computing technology provides orders-of-magnitude higher compute efficiency and density compared to today’s best-in-class solutions. The high-performance architecture is coupled with seamless software integration and will enable the immense potential of AI to be accessible in power, energy, and space constrained applications. EnCharge AI launched in 2022 and is led by veteran technologists with backgrounds in semiconductor design and AI systems. About the Role EnCharge AI is looking for a highly experienced, hands-on Principal Solutions Engineer to lead customer and partner solution development, architecture, and deployment for our next-generation AI acceleration platform. This is a senior technical leadership role that combines customer-facing engagement, solution architecture, AI software optimization, and technical mentorship. This role will partner with strategic customers throughout their development lifecycle—from initial technical discovery, architectural evaluation, and proof-of-concepts through production deployment and scaling. Bridging the gap between AI hardware, software, systems, and customers, helping them successfully build, optimize, and scale cutting-edge AI workloads and agentic workflows on EnCharge technology. Serving as the voice of the customer, directly influencing product roadmaps, software features, and developer experience. Responsibilities Serve as the primary technical interface and trusted advisor for strategic customers and partners evaluating and deploying AI workloads on EnCharge platforms. Lead end-to-end customer engagements from technical discovery through proof-of-concept (PoC), design-in, performance benchmarking, system-level tuning, and production deployment. Support technical pre-sales efforts by clearly articulating solution value propositions, architectural differentiator

EnCharge AI is a leader in advanced AI hardware and software systems for edge-to-cloud computing. EnCharge’s robust and scalable next-generation in-memory computing technology provides orders-of-magnitude higher compute efficiency and density compared to today’s best-in-class solutions. The high-performance architecture is coupled with seamless software integration and will enable the immense potential of AI to be accessible in power, energy, and space constrained applications. EnCharge AI launched in 2022 and is led by veteran technologists with backgrounds in semiconductor design and AI systems. Lead DFT Engineer Job Description: Developing silicon for edge-to-cloud computing isn't just about speed; it’s about balancing high-performance data processing with extreme power efficiency and reliability in remote environments. As the Design for Test (DFT) Lead, you will be the architect of our testing strategy, ensuring our data center chips are flawlessly manufacturable and resilient enough for edge deployment. Key Responsibilities: Architectural Leadership: Define and implement the end-to-end DFT architecture for complex SoCs, including Hierarchical DFT, Scan compression, Boundary Scan and MBIST. Edge-Specific Reliability: Develop strategies for In-System Test (IST) and power-on self-test (POST) to ensure chip health in remote edge data centers. Implementation & Flow: Oversee scan insertion, ATPG (Stuck-at, Transition, Path Delay), and Memory /Logic BIST. Cross-Functional Synergy: Collaborate with Design, Physical Design, and Yield teams to ensure high test coverage while minimizing area overhead and power impact as well as timing analysis . Post-Silicon Validation: Lead the bring-up and debug phase on ATE (Automated Test Equipment) to root-cause silicon failures and optimize test time. Technical Requirements: Experience: 12+ years in DFT, with at least 2 years in a leadership or principal role. Bachelor’s degree in a related field. Tools:

For over 20 years, Smartsheet has empowered teams to manage work seamlessly and scale solutions smarter. Now, in our most ambitious chapter yet, we are uniting human teams with AI agents. By orchestrating the work agents do best, automating manual tasks and uncovering insights at scale, we create the space for people to focus on what truly matters: judgment, creativity, and big thinking. That is magic at work, and it’s what we show up for every day. Smartsheet's expansion into Asia-Pacific government markets depends on mastering two critical compliance frameworks: Australia's Information Security Registered Assessors Program (IRAP) and Japan's Information System Security Management and Assessment Program (ISMAP). Both are essential gatekeepers for federal/national government adoption in their respective markets. We're seeking a Sr. Security Engineer II to own both programs end-to-end—managing IRAP assessments and continuous assurance in Australia, and ISMAP registration and compliance in Japan. This is a specialized, high-impact role for someone with deep expertise in both frameworks and comfort operating within government compliance ecosystems across two distinct cultures and regulatory environments. You'll be the authority on APAC government security standards at Smartsheet, the trusted interface with assessors and government agencies, and the architect of compliance processes that keep us ahead of evolving requirements. This role is critical for capturing high-value government business across the Asia-Pacific region. You will: Own IRAP (Australia) program strategy and execution: Lead the overall roadmap for obtaining and maintaining IRAP authorizations, including assessment coordination, remediation, and authorization maintenance. Own ISMAP (Japan) program strategy and execution: Lead registration and compliance for Japan's government cloud certification program, managing the certification assessment process and maintaining registry status. Coordinate with region

EnCharge AI is a leader in advanced AI hardware and software systems for edge-to-cloud computing. EnCharge’s robust and scalable next-generation in-memory computing technology provides orders-of-magnitude higher compute efficiency and density compared to today’s best-in-class solutions. The high-performance architecture is coupled with seamless software integration and will enable the immense potential of AI to be accessible in power, energy, and space constrained applications. EnCharge AI launched in 2022 and is led by veteran technologists with backgrounds in semiconductor design and AI systems. Staff Engineer: STA Methodology & Sign-off Lead We are seeking a high-caliber Staff or Senior Staff Engineer to architect and lead our SOC Static Timing Analysis (STA) Methodology along with execution responsibilities to eliminate the bottle-necks in STA and build bridges. This is a critical role for a forward-thinking engineer who excels at defining the frameworks and flows required to navigate the complexities of modern, large-scale SOC designs. Engineer will have scope to bridge Architecture, CAD, RTL, and Physical Design to establish a predictable, high-performance, and scalable path to tape-out. The Role As the lead for STA Methodology, you will own the sign-off architecture and the timing convergence strategy. Rather than just executing runs, you will build the "engine" that enables execution—defining flows, qualifying tools, establishing margin strategies (AOCV/LVF/POCV), and driving cross-functional alignment to meet aggressive Power, Performance, and Area (PPA) targets. Key Responsibilities Sign-off Methodology & Architecture: Define and own full-chip SOC timing sign-off criteria, including Multi-Mode Multi-Corner (MMMC) definitions, derate strategies, and operating condition mapping for functional, shift, and capture modes. Flow Development & Left-Shift Automation: Architect, deploy, and maintain adva

Celonis is the trusted platform to industrialize Enterprise AI. At our core is the Celonis Context Model — which combines process data, business knowledge, and intelligence into a living digital twin of the enterprise that AI can actually understand, turning AI's operational blind spots into operational clarity. World's leading companies trust Celonis and its global ecosystem of partners to make their AI agents, people, systems, and processes work together, achieving transformational outcomes. We believe there's a massive opportunity to unlock global productivity and sustainability by giving AI the context to understand how every business process really works. Join our mission to make processes work for people, companies, and the planet. The Team: As a Staff Backend Engineer, you will bring your general software engineering expertise to our innovative projects and continuously evolving concepts. The Role: You will have the opportunity to work with cutting-edge cloud technology, stay on top of trends, and drive projects with an ever-increasing degree of independence. This is a unique opportunity for talented engineers to push their boundaries and think big. The work you’ll do: Innovate beyond our existing products and bring new ideas to life for Celonis. Ownership of implementation and delivery of assigned projects. Demonstrate technical leadership in our engineering team. Ensure high quality and continuously improve procedures and practices. Work closely with your fellow engineers, project managers, and designers to create cohesive and efficient solutions. Collaborate with adjacent teams to drive a holistic project success spread across multiple geographies Learn and grow, not only in technical expertise but also in any other necessary aspects of making our projects reality. Brainstorm with the entire Celonis Labs team, research potential solutions, and ultimately bring them to life. The qualifications you need: Bachelor's or master's degree in

EnCharge AI is a leader in advanced AI hardware and software systems for edge-to-cloud computing. EnCharge’s robust and scalable next-generation in-memory computing technology provides orders-of-magnitude higher compute efficiency and density compared to today’s best-in-class solutions. The high-performance architecture is coupled with seamless software integration and will enable the immense potential of AI to be accessible in power, energy, and space constrained applications. EnCharge AI launched in 2022 and is led by veteran technologists with backgrounds in semiconductor design and AI systems. The Role We are seeking a thorough SOC Physical Verification & Integration Specialist to drive the physical assembly and signoff of our next-generation SOCs. In this role, you will own the physical integration strategy from the floorplan stage through to tapeout, ensuring seamless assembly of massive multi-hierarchical blocks. You will act as the critical bridge between block-level implementation, top-level integration, and final foundry signoff, ensuring that complex physical bottlenecks are resolved without compromising power, performance, or area (PPA). Key Responsibilities Top-Level Physical Integration: Drive the full-chip physical assembly of very large-scale SOCs (e.g., multi-billion transistor designs). Manage top-level floorplanning, bump planning, global power grid (PG) integration, and top-level clock/routing integration. Hierarchical Verification Methodology: Architect and deploy highly efficient, hierarchical physical verification (PV) flows. Define the boundary conditions, abstraction models, and interface rules required to assemble heavily partitioned, massive-scale designs. Signoff Execution & Debugging: Own full-chip DRC, LVS, ERC, Antenna, ESD, and Latch-up signoff using industry-standard tools (e.g., Siemens Calibre) at advanced process nodes (5nm, 3nm, or below). Cross-Functional Collaboration: Partner tightly with the Physical Design (PD

EnCharge AI is a leader in advanced AI hardware and software systems for edge-to-cloud computing. EnCharge’s robust and scalable next-generation in-memory computing technology provides orders-of-magnitude higher compute efficiency and density compared to today’s best-in-class solutions. The high-performance architecture is coupled with seamless software integration and will enable the immense potential of AI to be accessible in power, energy, and space constrained applications. EnCharge AI launched in 2022 and is led by veteran technologists with backgrounds in semiconductor design and AI systems. We are an ambitious AI hardware startup building next-generation accelerators with massive compute density. To achieve aggressive Power, Performance, and Area (PPA) targets on accelerated tapeout schedules, we require a robust, highly automated, and heavily optimized physical implementation and signoff flow. The Role As a Staff / Senior Staff CAD & Methodology Engineer, you will be the resident expert in Innovus and Tempus, responsible for developing, debugging, and continually accelerating our RTL-to-GDSII and timing signoff flows. You will work closely with Physical Design and STA leads to eliminate bottlenecks, automate manual tasks, and push the limits of EDA capabilities at advanced process nodes. Key Responsibilities Flow Architecture & Automation: Architect, develop, and maintain a highly automated, robust, and scalable physical design and signoff flow from synthesis through GDSII, optimized for AI accelerator architectures. Innovus Methodology: Drive advanced physical design methodologies in Cadence Innovus. Optimize recipes for floorplanning, placement, Clock Tree Synthesis (CTS), routing, and power grid implementation to squeeze out maximum PPA. Tempus Signoff Integration: Own the STA and timing signoff methodology using Cadence Tempus. Implement and optimize Distributed Multi-Scenario Analysis (DMSA), advanced OCV methodologies, and automat

EnCharge AI is a leader in advanced AI hardware and software systems for edge-to-cloud computing. EnCharge’s robust and scalable next-generation in-memory computing technology provides orders-of-magnitude higher compute efficiency and density compared to today’s best-in-class solutions. The high-performance architecture is coupled with seamless software integration and will enable the immense potential of AI to be accessible in power, energy, and space constrained applications. EnCharge AI launched in 2022 and is led by veteran technologists with backgrounds in semiconductor design and AI systems. About the Role EnCharge AI is seeking a highly skilled and experienced AI Compiler Engineer to spearhead the efforts in developing and optimizing graph compilers tailored to cutting-edge AI and ML workloads. You will collaborate with hardware architects, and AI researchers to enhance performance, optimize computation graphs, and enable efficient model deployment on EnCharge’s Inference Accelerators. Responsibilities Architect, design, and implement optimizations for AI model execution on graph compilers to improve performance, reduce latency, and maximize hardware utilization. Work closely with ML researchers, hardware engineers, and software developers to design and deploy AI models, understanding and addressing hardware-specific challenges. Work on performance optimizations for neural network models, such as layer fusion, operator fusion, and graph-level transformations. Develop compiler optimizations and passes that convert high-level AI models (e.g., from TensorFlow, PyTorch) into intermediate representations (IR). Implement parsing, semantic analysis, and IR generation for deep learning frameworks. Research and integrate the latest advancements in compiler design, ML model optimizations, and hardware acceleration into graph compilers. Provide leadership, mentorship, and technical guidance to a team of engineers focused on graph compiler optimizations. Qual

About Backblaze Backblaze provides reliable, high-availability cloud storage trusted by consumers, SMBs, enterprises, and developers in over 150 countries. Backblaze B2 Cloud Storage supports data-intensive workloads including backup, media, analytics, and modern AI pipelines. Our teams focus on building secure, durable, scalable systems with a strong emphasis on application security from day one and protecting customers to keep them safe. While there is a lot to celebrate in our past, there are greater opportunities ahead of us. About the Role We are seeking a Back-End Engineer for our Computer Backup Team. This team focuses on the services supporting our Computer Backup product. In this role, you will build and maintain systems to back up and restore exabytes of data. We are looking for an engineer who is excited to learn to develop high-performance, highly multithreaded architectures. We value versatility and are looking for someone comfortable designing and working across any technology as our needs evolve. Responsibilities Design and develop highly scalable, performant services and APIs in a Java ecosystem. Integrate AI coding agents and frameworks into your workflow to accelerate development, refactor legacy components, and improve code quality. Collaborate on the full technical lifecycle, including estimation, design, development, and delivery. Collaborate across the organization to ensure project success. You will often engage with QA, Data Centers, Marketing, Product Management, Support, Legal/Compliance, and Security to gather necessary context and requirements to implement solutions correctly, help customers, and solve problems. Diagnose complex issues and maintain the stability of large-scale production systems. Collaborate across functional teams and provide technical leadership to foster engineering excellence. Required Qualifications A broad track record of project deliveries and successfully shipping software systems. 3+ years of experience with Java

About Backblaze Backblaze provides reliable, high-availability cloud storage trusted by consumers, SMBs, enterprises, and developers in over 150 countries. Backblaze B2 Cloud Storage supports data-intensive workloads including backup, media, analytics, and modern AI pipelines. Our teams focus on building secure, durable, scalable systems with a strong emphasis on application security from day one and protecting customers to keep them safe. But while there is a lot to celebrate in our past, there is almost as much opportunity ahead of us. About the Role We are seeking an Application Security Engineer to improve application security across the software used to enable Backblaze B2 Cloud Storage and Computer Backup. The primary role is to build security into how the product is used, how data is stored and how customers can use it. This role will require development skills and application security knowledge to build security into the product and new features. Leveraging AI is key. This is a hands-on role that requires application development knowledge. This role is expected to know and use the latest AI to help with both development and security. The primary requirements include; development in common web languages, application security and AI tool usage. Leverage AI tools and software for Building new and maintaining existing software security features Meeting evolving software security needs in existing software Developing new components as needed Perform security assessments and code reviews on internal and external customer-facing applications Work closely with engineers to remediate security vulnerabilities using AI tools Develop security automation and tooling to improve security Support bug bounty program and vulnerability handling Investigate newly reported vulnerabilities Determine ways to remediate them Provide guidance to engineering based on known vulnerabilities found in existing applications Understanding cryptography and secure authentication Knowled

EnCharge AI is a leader in advanced AI hardware and software systems for edge-to-cloud computing. EnCharge’s robust and scalable next-generation in-memory computing technology provides orders-of-magnitude higher compute efficiency and density compared to today’s best-in-class solutions. The high-performance architecture is coupled with seamless software integration and will enable the immense potential of AI to be accessible in power, energy, and space constrained applications. EnCharge AI launched in 2022 and is led by veteran technologists with backgrounds in semiconductor design and AI systems. Senior Emulation Engineer Location: India - Remote Job Description: At EnCharge AI, we are building the next generation of AI compute silicon — purpose-built for high-performance, low-power, and scalable AI inference. As an Emulation Engineer, you will play a critical role in validating complex AI accelerator architectures on emulation platforms before tape-out. This position is ideal for someone passionate about bridging the gap between hardware and software in fast-paced, deep tech environments. Responsibilities: • Set up and maintain Siemens Veloce emulation and prototyping platforms • Adapt SoC designs for Emulation and Prototyping • Develop and debug emulation testbenches and system-level environments • Support pre-silicon validation, power/performance analysis, and early software bring-up. Participate in silicon bring-up and validation. • Collaborate with design and verification teams to isolate design issues and accelerate debug. • Optimize performance of the emulation workloads and reduce turnaround time. • Work with firmware/software teams to enable use of emulators for OS and driver testing. Required Background: • BS/MS/Ph.D. in EE, CS, or related field with 7+ years of SoC design experience. • Experience with emulation platforms (Veloce, Palladium, or ZeBu) and FPGA-based prototyping systems (proFPGA, HAPS, or Protium) • Experience with emula

EnCharge AI is a leader in advanced AI hardware and software systems for edge-to-cloud computing. EnCharge’s robust and scalable next-generation in-memory computing technology provides orders-of-magnitude higher compute efficiency and density compared to today’s best-in-class solutions. The high-performance architecture is coupled with seamless software integration and will enable the immense potential of AI to be accessible in power, energy, and space constrained applications. EnCharge AI launched in 2022 and is led by veteran technologists with backgrounds in semiconductor design and AI systems. Physical Design Engineer (2-4 Years Experience) We are looking for a high-caliber Physical Design Engineer to join our fast-paced startup team. This role is designed for "top 1%" talent—engineers from tier-1 universities (IIT/NIT/BITS or equivalent) who possess a relentless "go-getter" attitude and the critical thinking skills required to solve complex, next-generation silicon challenges. If you are eager to move beyond standard digital flows into the future of AI-driven automation , this is your playground. Key Responsibilities End-to-End Ownership: Drive RTL-to-GDSII implementation, including floorplanning, placement, CTS, routing, and physical verification (LVS/DRC/ERC). Performance Optimization: Execute high-performance design closure focusing on PPA (Power, Performance, Area) targets in advanced process nodes ( 3nm or below) Static Timing Analysis (STA): Perform comprehensive timing closure, including signal integrity, crosstalk analysis, and CPPR (Common Path Pessimism Removal) optimization. Power Integrity: Conduct IR-drop analysis (Static/Dynamic) and EM (Electromigration) checks to ensure robust power delivery. Innovation: Develop and integrate AI/ML-based automation scripts to optimize the physical design flow and reduce turnaround time. Qualifications &am