Dram Design Development Quality Engineer Jobs

Semiconductor Design Engineer, DRAM: Senior, Staff, or Principal — Boise, ID - Main Site. Apply via Workday.

Staff Verification Design Engineer, DRAM — Boise, ID - Main Site. Apply via Workday.

Senior Circuit Design Engineer, DRAM — Boise, ID - Main Site. Apply via Workday.

New College Grad - Semiconductor Design Engineer, DRAM Products Group — Boise, ID - Main Site. Apply via Workday.

New College Grad - Design Engineer, DRAM Technology and Products — Boise, ID - Main Site. Apply via Workday.

Intern - Digital IP Design Engineer, DRAM — Boise, ID - Main Site. Apply via Workday.

New College Grad - Design Engineer, DRAM Technology and Products — Boise, ID - Main Site. Apply via Workday.

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron is expanding its semiconductor manufacturing operations in Boise through a historic $15 billion investment that will support next-generation DRAM production and advanced manufacturing capabilities. This growth creates exciting opportunities for students to contribute to the future of semiconductor technology while working in a highly collaborative, data-driven manufacturing environment. The High Volume Manufacturing Process Engineer Intern supports process optimization, yield improvement, throughput enhancement, cost reduction, and issue resolution within a manufacturing area. This role partners closely with equipment engineering, operations teams, process owners, and cross-functional stakeholders to improve process performance and achieve key manufacturing objectives. Responsibilities Drive process optimization and manufacturing efficiency initiatives by monitoring process performance, analyzing data, and supporting area throughput and wafer output goals. Identify, troubleshoot, and resolve process issues that could result in yield loss, defects, equipment restrictions, excursions, or production impacts, escalating concerns when necessary. Apply SPC, FDC, Design of Experiments (DOE), and structured problem-solving methodologies, including 8D, to improve process capability and equipment performance. Partner with process owners, operations teams, and engineering stakeholders to address chronic process issues and support continuous improvement initiatives. Leverage Artificial Intelligence and data a

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Staff Engineer in Micron’s HBM Product Engineering Component Validation team, you will be an individual contributor responsible for the validation of advanced High Bandwidth Memory (HBM) products. You will use proven knowledge in dynamic random-access memory and high-bandwidth memory architecture to compose validation coverage, implement and analyze validation runs, lead product debug and failure analysis toward a zero-escape validation goal across test modes and product achievements. You will also adopt AI-enabled ways of working, using enterprise AI tools to accelerate your engineering tasks and improve efficiency, work within Micron’s global validation organization and collaborate with groups at different locations. Responsibilities: Translate DRAM/HBM develop intent and architecture into effective verification scope and test cases. Contribute to validation of new and high-risk product features, working with Design Validation, and Systems Engineering. Review design specifications, schematics, and datasheets, provide design feedback and represent the Product Engineering perspective in Design and Verification reviews. Read, analyze, and debug circuit blueprints to detect design-related failure mechanisms, and recommend approaches for verification and fault diagnosis. Perform root-cause analysis and examination of electrical failures (debug) of validation findings, distinguishing developed marginality from process and test-related issues. Apply automation and modern tooling (including

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Principal Engineer at Micron’s HBM New Product Validation team in Boise, ID you will be a senior technical guide responsible for validation strategy and readiness for future-generation High Bandwidth Memory (HBM) products. You will apply deep expertise in complex RAM and high-bandwidth memory architecture and building to establish architecture validation strategies. You will impact decisions that improve validation observability and debug efficiency . You will lead investigations of complex architecture, building , and silicon issues from pre-silicon simulation through post-silicon characterization. You will partner across Design Engineering, Design Validation, Product Engineering, Systems teams, and will develop and promote AI-enabled validation methodologies that improve efficiency, quality, and scalability. Responsibilities: Define architecture-aware validation strategies and coverage direction for future-generation HBM products. Drive validation readiness for next-generation products by preparing strategies, test environments, and execution plans before first silicon, reducing risk, accelerating issue resolution, and preventing late-stage surprises. Evaluate new DRAM/HBM architectural features and define validation requirements and testability needs before DBR. <span style="color:#

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron’s Boise site is undergoing a historic $15 billion investment in semiconductor manufacturing, with DRAM production planned for the second half of the decade. As part of Micron’s global $150 billion expansion, our High Volume Manufacturing team drives innovation and operational excellence to deliver world-class memory solutions. As an ID1 High Volume Manufacturing Process Engineer Intern , you will work on process optimization, yield improvement, and cost reduction initiatives. This role involves collaborating with equipment teams, operations leaders, and multi-functional collaborators to ensure area critical metrics are met and wafer output is optimized. Responsibilities Finish the required safety training and adhere to safety policies and laws. Ensure proper tool documentation and update reaction mechanisms as needed. Supervise and resolve issues impacting yield, excursions, defects, or output loss. Apply SPC, FDC, and 8D methodologies to optimize processes and improve tool availability. Analyze data using engineering knowledge and visualization tools to make critical process decisions. Perform project work to optimize wafer processing and increase wafer outs. Update or create procedures to align with area and global practices. Minimum Qualifications Current student in an engineering or related degree program; graduation date not before September 2027. Understanding of SPC and Design of Experiments. Prof

DRAM Product Engineer - AI — Boise, ID - Main Site. Apply via Workday.

DRAM Device Engineer ID1 — Taichung - Fab 16, Taiwan. Apply via Workday.

DRAM Systems Architecture — 2 Locations. Apply via Workday.

DRAM Device Engineer Lead — Taichung - Fab 16, Taiwan. Apply via Workday.