Dram Layout Engineer Jobs

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Summary Micron Technology is seeking a Principal RTL Design Engineer to lead the development of high-quality DRAM digital and mixed-signal IP. In this role, you will be responsible for the full RTL design lifecycle—from architecture and implementation through signoff—while delivering designs that meet aggressive power, performance, and area (PPA) targets. This position is in Boise, Idaho, offering strong opportunities for technical leadership, innovation, and collaboration across global teams. Responsibilities Own and drive RTL design for DRAM digital and mixed-signal IP from specification through silicon-ready signoff. Architect and deliver high-performance, power- and area-efficient RTL designs aligned with product requirements. Perform and sign off front-end quality checks, including lint, CDC/RDC, synthesis, UPF, and timing QoR. Collaborate closely with physical design, verification, and architecture teams to achieve timing closure and PPA goals. Improve design quality and efficiency by refining methodologies, driving automation, and enhancing RTL design flows. Minimum Qualifications Master’s degree in Electrical Engineering with 8+ years of experience, or Bachelor’s degree with 10+ years of pre-silicon RTL design experience. Proven ownership of complex RTL/IP development from micro-architecture definition through handoff to physical design. Strong experience with ASIC low-power design methodologies, including UPF-based power inten

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Summary At Micron Technology, we are looking for a Senior RTL Engineer to build and develop DRAM digital and mixed-signal blocks for advanced memory products. In this role, you will support the RTL lifecycle from specification and implementation to signoff. You will collaborate with multi-functional teams to develop high-quality builds that meet power, performance, and area (PPA) targets. This position is based in Boise, Idaho, within a collaborative and innovative engineering environment. Responsibilities Contribute to RTL build of digital and mixed-signal components for DRAM using RTL-to-GDS flows. Implement and document high-performance, power- and area-efficient RTL designs meeting product specifications. Perform front-end quality checks including lint, CDC/RDC, synthesis, UPF, and timing QoR. Collaborate closely with physical design and implementation teams to achieve timing closure and PPA goals. Apply power-, clock-, and implementation-aware RTL design practices to minimize silicon risk. Minimum Qualifications Master’s degree in Electrical Engineering with 4+ years of experience, or Bachelor’s degree with 5+ years of pre-silicon RTL design experience. Demonstrated experience developing RTL for complex digital IP from specification through implementation handoff. Hands-on experience with ASIC low-power design methodologies, including UPF-based power intent and CDC/RDC analysis. Strong knowledge of ASIC design flows, including RTL design, logi

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Description: As a Mixed-Signal Design Engineer in Micron’s Pathfinding Design Team, you will play a key role in crafting next-generation memory technologies. This position involves contributing to defining, developing, and analyzing high-speed logics to operate the memory. These paths span from the memory array to the interface block for memory technologies, including DRAM and emerging memories. You will work on novel concept development, circuit simulation, optimization, and floor planning to enable groundbreaking memory solutions! Responsibilities: Provide technical direction and design implementation for a memory control circuits (both of digital and analog) from the memory array to the interface block. Collaborate closely with physical design teams to ensure timing closure, CDC robustness, and power intent alignment. Demonstrated experience working with custom mixed-signal IC build and development for volatile or nonvolatile memory technology. Experience with modeling and simulation of ICs using HSPICE/finesim. Minimum Qualifications: Bachelor’s or master’s degree in electrical engineering, Computer Engineering, or related field. 7&#43; years of experience in custom mixed-signal circuit design. Proficiency with UNIX and CADENCE design environment (Simulation, Schematic entry, SPF extraction) </

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Description Summary The role requires a Member Technical Staff who has broad experience and innovative thinking. This person will lead the improvement of Diffusion, Thin Film Deposition (PECVD/PVD), and Wet Etch processes in advanced DRAM technology nodes. This role is critical to enabling manufacturing requirement memory products. It requires strong process integration expertise , strategic vision, and leadership capabilities. You will drive innovation, lead technical initiatives, define technology roadmaps, and mentor engineering talent. The focus is on improving process capability and accelerating yield ramp . Key Responsibilities Coordinate all activities related to the characterization, and refinement of Diffusion, PECVD/PVD thin film deposition, and Wet Etch processes for advanced DRAM applications. Collaborate cross-functionally with Integra

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. As a Process Integration Module Engineer in the Central Process Integration department, you will be responsible for coordinating improvements in Yield, Quality, and Output for DRAM/NAND process and production line. Day-to-day responsibilities include but not limit to collaborating with network PI/YE/PQA/PEE teams to craft and analyze process experiments, to achieve best-in-class (BIC) yield and quality to establish documented best-known methods (BKMs) Responsibilities and Tasks Collaborate with multi-functional network teams from PIE, Process & Equipment Engineering, WLR, TD to improve product yields and reliability within your assigned process loop. May require travel to global Micron sites to foster collaboration and drive execution. Communicate module related issues to the Fab engineering and leadership teams. Design, execute, and analyze experiments to improve fab process, yield, and quality. Collect and interpret complex data to optimize Fab processes and increase yields. Engage and/or lead cross-area engineering teams to tackle process issues. Work closely with global partners to stay ahead of on module related topics and process alignment projects. Collaborate with oth

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Summary This position supports Micron’s DRAM Tester Solutions group, focusing on physical design implementation for processors, controller architectures, and ASICs. The role is responsible for full‑chip and block‑level physical design closure, low‑power implementation, timing, power, and signal integrity signoff, and successful tape‑out across advanced technology nodes. Responsibilities: Lead block‑level and full‑chip physical design including floorplanning, placement, CTS, routing, and tape‑out. Drive timing closure across multiple modes and corners using industry‑standard STA tools. Perform power integrity, IR/EM, and power grid closure to meet signoff requirements. Develop and optimize APR flows, scripts, and methodologies for PPA improvements. Own subsystem or full-chip closure work while coordinating with cross-functional teams. Minimum Qualifications: Bachelor’s degree or Master’s degree or equivalent experience in Electrical Engineering, Electronics, or Computer Architecture. Minimum of 15 years of hands‑on ASIC physical design implementation experience. Proven experience with multiple production tape‑outs in advanced process nodes. Strong expertise in low‑power design techniques including UPF/CPF and multi‑voltage systems. Proficiency in scripting languages such as Tcl, Perl, or Python for flow automation. Preferred Qualifications: Experience with Synopsys and Cadence physical design and ti

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. As a Process Integration Module Engineer in the Central Process Integration department, you will be responsible for coordinating improvements in Yield, Quality, and Output for DRAM/NAND process and production line. Day-to-day responsibilities include but not limit to collaborating with network PI/YE/PQA/PEE teams to craft and analyze process experiments, to achieve best-in-class (BIC) yield and quality to establish documented best-known methods (BKMs) Responsibilities and Tasks Collaborate with multi-functional network teams from PIE, Process & Equipment Engineering, WLR, TD to improve product yields and reliability within your assigned process loop. May require travel to global Micron sites to foster collaboration and drive execution. Communicate module related issues to the Fab engineering and leadership teams. Design, execute, and analyze experiments to improve fab process, yield, and quality. Collect and interpret complex data to optimize Fab processes and increase yields. Engage and/or lead cross-area engineering teams to tackle process issues. Work closely with global partners to stay ahead of on module related topics and process alignment projects. Collaborate with oth

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The Frontend Central Product Integration Engineering (PIE) team delivers best‑in‑class yield, quality, and cycle time through innovation and strong cross‑functional teamwork. Supporting diverse DRAM and NAND technologies across global development and manufacturing sites (Boise, Japan, and fabs in the U.S., Taiwan, Japan, and Singapore), the team identifies, aligns, and deploys best‑known methods across the network. As a Frontend Central Process Integration Senior Engineer, you will develop and optimize processes to drive rapid product maturity. Join us today and make a difference! Responsibilities and Tasks Drive rapid product maturity, improving yield (bits per wafer), repair density, and DPM through fast learning cycles. Apply deep process integration knowledge across FEOL, MOL, CELL, and BEOL to identify optimal solutions; design and circuit knowledge is a plus. Partner with Yield Engineering, Device, RDA, and Metrology teams to resolve key yield issues and build strong inline visibility for fast ramp and excursion prevention. Identify and standardize best‑known methods and business processes across DRAM and NAND sites. Travel to Micron sites as needed for onsite collaboration. Minimum Qualifications Bachelor’s degree in Engineering or a related field 5&#43; years of experience in process integration, product design, or equivalent technical roles Demonstrated ability to collaborate optimally with global, cross‑functional teams Proven t

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. A thorough understanding of semiconductor device physics, process operation, DRAM product specification and product reliability. Responsibilities include but are not limited to the following: rdV, UE_Row, PG, PTS yield improvement Burn dpm and module dpm improvement DL4 enhancement and shift left to probe for coverage MRB case management and postmortem for CAPA enhancement Fab deviation event disposition and hold lot release Product grade yield improvement Wafer level reliability monitoring and shift left to probe for coverage RMA management and analysis for process/probe improvement Problem solving and root cause analysis skills including developing systemic and specific CAPAs for RMA Monitors and drives the quality metrics improvements including, module production fails and RMAs. Monitor Global quality dashboard and report reliability metric not meeting spec and performance Leads the analysis of multiple data sources and ensures appropriate feedback is given to customer Working in collaboration with multiple engineering groups including Process Module Area/RDA/Manufacturing to help identify existing containment action and work towards continuous improveme

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are part of Micron’s DRAM Technology Development group, where engineers operate at the leading edge of semiconductor process and product innovation. This role sits at the intersection of process technology, product requirements, and manufacturing execution, and is critical to enabling next generation DRAM technology. As a Principal Node Development Product Engineer, you will play a technical role in driving product readiness through close engagement with process integration, device, yield, test, design, and manufacturing teams. You will own deep process‑aware product knowledge, identify node‑specific risks, and translate silicon behavior into actionable decisions that ensure robust, scalable next generation DRAM products. Responsibilities Serve as a technical contributor during development stage of next gen DRAM! Drive process‑aware product optimization, identifying sensitivities, interactions, and integration risks Analyze silicon data (electrical, parametric, yield, reliability) to identify systematic process or integration limiters Partner with design, process integration, test, and device teams to debug yield and performance issues and converge on root cause Collaborate closely with manufacturing and TD to enable smooth node readiness, learning cycles, and factory ramp Translate process changes into product impact assessments, including PPA, yield, reliability, and test coverage Guide test content and monitoring strategies to ensure early detection of process

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are part of Micron’s Technology Development Group, where we turn advanced materials into manufacturable memory technology. Our thin films teams work at the groundbreaking edge of DRAM scaling, partnering across R&D, manufacturing, and suppliers to enable future nodes. We operate in a fast paced, hands‑on environment where strong fundamentals and execution matter! As a Thin Films Engineer, you will develop and integrate deposition processes that directly enable Micron’s next-generation DRAM! This role owns thin film concepts from early development through high‑volume manufacturing, with a strong focus on EUV patterning films. You will work closely with cross‑functional teams and external partners to deliver robust, scalable processes that meet aggressive technology requirements. Responsibilities: Develop, optimize, and transfer thin film deposition processes for EUV‑enabled DRAM technology Lead process characterization, troubleshooting, and defect reduction through VME Drive thin film roadmap activities aligned to future technology nodes Collaborate with internal teams and suppliers to mature equipment, chemistries, and process solutions Analyze large physical and electrical datasets and communicate clear recommendations Minimum Qualifications: PhD or MS with 4&#43; years of semiconductor experience in materials or process development Strong foundation in materials science, chemical reaction engineering, and thin film physics H

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are part of Micron’s Technology Development Group, where we turn advanced materials into manufacturable memory technology. Our thin films teams work at the groundbreaking edge of DRAM scaling, partnering across R&D, manufacturing, and suppliers to enable future nodes. We operate in a fast paced, hands‑on environment where strong fundamentals and execution matter! As a Thin Films Engineer, you will develop and integrate deposition processes that directly enable Micron’s next-generation DRAM! This role owns thin film concepts from early development through high‑volume manufacturing, with a strong focus on EUV patterning films. You will work closely with multi-functional teams and external partners to deliver robust, scalable processes that meet aggressive technology requirements. Responsibilities: Develop, optimize, and transfer thin film deposition processes for EUV‑enabled DRAM technology Lead process characterization, troubleshooting, and defect reduction through VME Drive thin film roadmap activities aligned to future technology nodes Collaborate with internal teams and suppliers to mature equipment, chemistries, and process solutions Analyze large physical and electrical datasets and communicate clear recommendations Minimum Qualifications: PhD or MS with 4&#43; years of semiconductor experience in materials or process development Strong foundation in materials science, chemical reaction engineering, and thin film physics H

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The DRAM Technology group at Micron Technology develops and validates advanced memory solutions that enable the transformation of information into intelligence. The team operates in a collaborative, inclusive, and globally distributed environment, partnering closely with design, product, test, process, manufacturing, and quality organizations to deliver industry‑leading DRAM technologies. The Design Validation Product Engineer supports the validation of new DRAM products by focusing on real‑silicon behavior through bring‑up, characterization, and debug. This role builds a strong technical foundation in DRAM architecture, semiconductor devices, and validation methodologies while working closely with multi-functional engineering teams. Responsibilities Support DRAM design validation through silicon bring‑up, characterization, and validation testing of new memory products Analyze electrical and functional data to identify trends, marginalities, and failure mechanisms Assist with debug of validation issues using simulations, test results, and laboratory measurements Use engineering lab equipment and testers to characterize device behavior and performance Document validation results, test coverage, and observed behaviors while collaborating with design, test, manufacturing, and quality teams Minimum Qualifications Bachelor’s degree in Electrical Engineering, Computer Engineering, or a related field Strong fundamentals in digital logic,

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities and Tasks: • Establish and improve process condition and technology. • Upgrade process capability and reduce production cost. • Establish and modify process management projects. • Set up process parameters for a variety of semiconductor equipment. • Evaluation, promotion and planning of new equipment / materials. • Abnormal analysis and improvement. About Micron Technology, Inc. We are an industry leader in innovative memory and storage solutions transforming how the world uses information to enrich life for all . With a relentless focus on our customers, technology leadership, and manufacturing and operational excellence, Micron delivers a rich portfolio of high-performance DRAM, NAND, and NOR memory and storage products through our Micron® and Crucial® brands. Every day, the innovations that our people create fuel the data economy, enabling advances in artificial intelligence and 5G applications that unleash opportunities — from the data center to the intelligent edge and across the client and mobile user experience. To learn more, please visit micron.com/careers All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, veteran or disability status. To request assistance with the application process and/or for reasonable accommodations, please contact <a target="_blank" href="mailto:hrsupport_jp&#64;micron.c

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As RAM Detection (RDA and Metrology) Detection Strategy Senor Engineer/ Principal Engineer at Micron Technology, Inc., you will be collaborating with process, equipment, as well as process integration team, responsible for starting up, developing and optimizing detection to improve product yield, quality, and cost! Responsibilities include working closely with the NAND and DRAM sites, HVM and TD, and even suppliers, to achieve Inline Visibility and Inline Control for Detection enablement and improvement. This position is responsible in setting up BKM (Best Known Method) related to RAM Detection performance, RAM detection cost and RAM supplier engagement. This position also ensures BKM alignment and deployment, hence RAM Standardization across sites! What’s Encouraged Daily: Lead Detection SWAT (System Workforce Allocation Team) in identifying BKM and strategies to meet Detection goal Lead RAM network in BKM standardization across all sites Develop metrics and KPI to measure success and performance of the team Lead a team of engineers in projects, see opportunities and risks, and find solutions to clear roadblocks. Devise strategy, plans and roadmap for team for short term and long term Apply organizational skill in job assignment and task allocation Prioritize resources in the team to accomplish goals. Maintain good working relationship with partn