Electrical Engineer Jobs

About the Team OpenAI is building the infrastructure foundation for the next generation of AI. The Data Center Engineering team defines the strategy, reference architectures, technical requirements, and delivery standards for the large-scale data centers that support OpenAI research, products, and infrastructure partners. As a Data Center Controls Network Engineer, you will design, validate, and scale the controls and OT network architectures that support high-density AI data centers. You will work across controls systems, OT infrastructure, telemetry, commissioning, deployment, and operations, partnering with mechanical, electrical, IT/networking, security, and external delivery teams. About the Role We are seeking a mid to senior OT Network Engineer with a strong controls systems background to lead the design and operation of resilient, secure, and scalable OT network architectures for high-density AI data centers. This role translates compute, power, cooling, and operational requirements into practical OT network designs, evaluates vendor solutions, and drives technical decisions across controls infrastructure, telemetry, commissioning, and operations. The ideal candidate has strong hands-on experience in mission-critical OT environments, including industrial networking, virtualized infrastructure, and OT network operations, with expertise in routing, switching, segmentation, firewall policy, time synchronization, monitoring, and network lifecycle support. Key Responsibilities Define controls, automation, and OT network requirements for AI data center campuses. Develop reference architectures, engineering standards, and reusable design templates. Review and develop basis-of-design and functional design documents, including OT network diagrams, IP/VLAN schemes, telemetry architectures, data flow diagrams, and commissioning requirements. Design OT and infrastructure network architectures, including physical topology, logical topology, IP addressing, subnetting, VLA

About the Team The Consumer Products team at OpenAI builds end-to-end hardware and software systems that bring AI into the physical world. We work at the intersection of custom silicon, embedded systems, operating systems, and cloud services to deliver reliable, production-ready devices at scale. Within Consumer Products, the camera stack is a critical sensing component. The team partners closely with electrical engineering, silicon vendors, systems, and higher-level perception and product teams to bring up new hardware, stabilize capture pipelines, and ensure camera systems are robust, debuggable, and ready for real-world deployment. This work spans early prototypes through production, with a strong emphasis on correctness, repeatability, and long-term reliability. About the Role As a Camera Firmware Engineer, you will own low-level camera enablement on custom hardware—from early board bring-up through stable production capture. You will develop and maintain the firmware and software that makes camera sensors reliable, controllable, and debuggable, forming the foundation for higher-level camera pipelines and product features. This role is highly hands-on and systems-oriented. You will work close to the hardware, diagnose real-world timing and integration issues, and build tooling that accelerates iteration across the entire camera stack. This role is based in San Francisco, CA. We follow a hybrid work model with four days per week in the office and offer relocation assistance to new employees. In This Role, You Will Bring up new camera sensors and modules on prototype and production boards, including link stability, sensor control, and correct power, reset, and clock sequencing. Develop and maintain low-level camera software, including sensor drivers, board configuration, and camera subsystem integration across hardware revisions. Enable and validate core capture paths for development and production, including RAW capture for debugging, still capture, and hardware-

At Snowflake, we are powering the era of the agentic enterprise. To usher in this new era, we seek AI-native thinkers across every function who are energized by the opportunity to reinvent how they work. You don’t just use tools; you possess an innate curiosity, treating AI as a high-trust collaborator that is core to how you solve problems and accelerate your impact. We look for low-ego individuals who thrive in dynamic and fast-moving environments and move with an experimental mindset — who rapidly test emerging capabilities to discover simpler, more powerful ways to deliver results. At Snowflake, your role isn't just to execute a function, but to help redefine the future of how work gets done. WHAT WE OFFER Paid, full-time internships Post-internship career opportunities (full-time or part-time) Exposure to a fast-paced, fun, and inclusive culture A chance to work with world-class security experts on challenging, high-impact projects Opportunity to provide meaningful contributions to a real system used by customers High level of access to supervisors (manager and mentor), detailed direction without micromanagement, feedback throughout your internship, and a final evaluation Treated as a full member of the Snowflake team: company meetings and activities, flexible hours, casual dress code, swag, and much more Warsaw office perks: catered lunches, access to recreational games, happy hours, company outings, and more WHAT WE EXPECT Must be actively enrolled in an accredited college/university program during the internship period Desired majors: Computer Science, Computer Engineering, Electrical Engineering, Mathematics, or a related field Required coursework: algorithms, data structures, and operating systems Recommended coursework: information security, cryptography, cloud computing, database systems, or distributed systems Duration: 4 months + recommended Strong programming skills in Python or Java Solid knowledge of data structures and algorithms; familiarity with

Job Details: Job Description: The world is transforming - and so is Intel. Intel is a company of bold and curious inventors and problem solvers who create some of the most astounding technology advancements and experiences in the world. With a legacy of relentless innovation and a commitment to bring smart, connected devices to every person on Earth, our diverse and brilliant teams are continually searching for tomorrow's technology and revel in the challenge that changing the world for the better brings. We work every single day to design and manufacture silicon products that empower people's digital lives. Come join us and do something wonderful. Join us as a Manufacturing Failure Analysis Engineer, where you'll play a pivotal role in ensuring the quality and reliability of Intel's next-generation silicon, product, package, platforms, and board process technologies. You will identify failures, conduct root cause analyses, and develop innovative methodologies to enhance performance and yield. By leveraging your expertise, you'll contribute to driving manufacturing innovation and supporting the delivery of world-class products. The ideal candidate brings hands-on experience in probing, strong understanding of device behavior, and the ability to independently execute complex debug workflows. Business group You will be part of Intel's manufacturing organization, a cornerstone of our operations that focuses on advancing semiconductor process technologies and ensuring product excellence. This team is dedicated to delivering high-quality solutions that support Intel's broader mission to create groundbreaking technologies that power the future. Key Responsibilities: • Operate general failure analysis tools in the labs, such as TEM, SEM, optical scopes. • Perform electrical probing an

The DFP Engineer – Manufacturing role defines and implements the validation and screening of new silicon features within high‑volume manufacturing flows. You will translate product requirements into executable test methodologies, infrastructure, and detailed manufacturing test plans that ensure quality, yield, and efficiency at scale. This role sits at the intersection of multiple multi-functional teams to make manufacturing test an outstanding part of the overall codesign and DFP lifecycle. What you will be doing: Own end-to-end manufacturing test methodology across all test stages. Translate system specs and product POR into DFP requirements, test content, coverage, and flows. Define and maintain the DFP roadmap, including infrastructure and turning point planning. Partner multi-functionally to implement test content, debug hooks, and coverage improvements. Drive alignment on manufacturability, test time, binning strategies, and cost vs. coverage trade-offs. Embed testability requirements into design to enable robust screening and debug. Define data and analytics frameworks to support yield analysis and continuous improvement. Lead DFP documentation as the single source of truth and feed findings into future methodologies. What we need to see: MS in Electrical Engineering, Computer Engineering, or related field (or equivalent experience) 6&#43; years in silicon post‑silicon validation and/or high‑volume manufacturing test for complex SoCs, GPUs, CPUs, or similar. Hands‑on experience with test content bring‑up, limit setting, correlation to characterization, and yield/coverage optimization. Proficiency with scripting and data analysis (e.g., Python, MATLAB, R, SQL) for test data analytics, limit tuning, and yield/debug analysis. <

NVIDIA's GPUs and SOCs are the world leaders in power, performance and efficiency. We are continually innovating to deliver new and creative, unusual solutions to extraordinary problems in a wide range of sectors. To this purpose, we are now seeking a hard-working Senior Package Layout Engineer who is committed to making a difference in the world through their contributions! This position will collaborate with Technical Package Lead and different design teams in the design and development of sophisticated, detailed layout of IC substrates for NVIDIA products. In addition, work with design teams to plan schedules, resolve costs, manufacturing, and electrical design issues. What you'll be doing: As part of a Layout team, you will collaborate to implement high speed/density ASIC packages. Perform substrate breakout patterns for ASIC packages. Optimize package pinout incorporating system level trade-offs of pins assignment. Help perform package routing, placement, stack-up, reference plane and power distribution using Cadence APD or SiP tool suite. Propose layout design trade-offs to the Technical Package Lead for resolution and implementation. Conduct design feasibility studies to evaluate the Package design goals for size, cost, and system performance. Develop symbols and CAD library databases using Cadence APD design tools Develop methodologies to improve layout productivity What we need to see: Hold a B.S. Electrical Engineering or equivalent experience 5&#43; years experience in PCB Layout of graphics cards, motherboards, line cards or other related technology. Experience with HDI designs is a plus Proven experience in substrate layout of wire bond and flip chip packages, preferred Significant background with Cadence AP

ABOUT THE ROLE Peloton mechanical engineers architect and develop Peloton products. This individual will work collaboratively within a multi-functional team to concept, design, and manufacture the future of fitness. You will team with Program Management, Product Management, Operations, Quality, Electrical Engineering,Firmware Engineering, and Industrial Design to translate customer needs into fully vetted products. Senior mechanical engineers will join our design - built - test engineering culture to help oversee a mechanical project team or complex electro-mechanical modules within a product. Senior engineers bring experience, and technical knowledge to the organization and help to deliver fitness products. Ideal candidates will exercise problem solving skills throughout the product life cycle to drive product quality and performance. YOUR DAILY IMPACT AT PELOTON Lead Architecture/Design reviews Perform detailed design of components for fitness equipment Perform engineering analysis on your designs Help coordinate prototype builds through our in house model shop Write test plans, review test setups and analyze results Provide coaching and mentorship for team members Use data to drive decision making and milestone readiness on managed projects YOU BRING TO PELOTON Bachelor's degree in Mechanical or Product Design Engineering 10 years of experience as a mechanical engineer Sound engineering fundamentals in statics, dynamics, stress analysis and material science.Experience executing finite element analysis in the development process Proficient in one 3D MCAD Package. Solidworks preferred Ability to assemble effective reports and presentations to communicate Familiarity with PLM and an ECN process Prototype experience, selecting and sourcing appropriate prototyping methods to build engineering prototypes Experience writing test plans or developing engineering confidence tests Ability to collaborate effectively with teammates and cross functional partners Experienc

Reolink , a leader in intelligent visual technology for homes and businesses, was founded in 2009 by a group of engineers with a strong commitment to and passion for smarter security solutions. Our products are now trusted by millions of users across more than 110 countries and regions worldwide. Building on this trust, we continue expanding our presence and bringing our innovations to more markets around the globe. Reolink remains committed to delivering advanced, reliable, and user‑centric solutions that empower people to protect what matters most. AI Algorithms Engineer (PHD Holder Only) 5 Work Days Per Week Office Near Tai Seng MRT, Singapore Medical Benefits Provided Entitled to Yearly Bonus & Performance Bonus Job Requirements: PHD Holder in Computer Science, Applied Mathematics, Electrical Engineering, Pattern Recognition, Artificial Intelligence, Automatic Control, Operations Research, Biology, Physics / Quantum Computing, Neuroscience, Statistics or a related field. Familiar with common machine learning and deep learning algorithms and keeping track with the latest SOTA implementations. Strong programming skill in Python, C / C++, proficient in mathematical / statistical concepts and exceptional coding skills Hands-on experience with AI / ML frameworks be familiar such as Caffe, PyTorch, TensorFlow, MxNet etc. Have rich project experience in machine learning and deep learning, be familiar with common algorithm models, such as CNN, RNN, LSTM, Transformer, ViT, etc., and be able to improve and innovate models according to actual problems. Experience in familiar the design, parameter tuning and optimization methods of neural network models is a plus Experience in model compression and in the transplantation and optimization of deep learning forward inference on various platforms, including NPU / GPU / DSP / ARM on mobile platforms and CPU / GPU on server platforms is also a plus. Strong logical thinking and problem-solving ability, able to independen

Reolink , a leader in intelligent visual technology for homes and businesses, was founded in 2009 by a group of engineers with a strong commitment to and passion for smarter security solutions. Our products are now trusted by millions of users across more than 110 countries and regions worldwide. Building on this trust, we continue expanding our presence and bringing our innovations to more markets around the globe. Reolink remains committed to delivering advanced, reliable, and user‑centric solutions that empower people to protect what matters most. AI Algorithms Engineer (PHD / Master Degree Only) 5 Work Days Per Week Office Near to Kaki Bukit MRT, Singapore Relocate Near Tai Seng MRT in August / September 2026 Medical Benefits Provided Entitled to Yearly Bonus & Performance Bonus Job Requirements: PHD / Master Holder in Computer Science, Applied Mathematics, Electrical Engineering, Pattern Recognition, Artificial Intelligence, Automatic Control, Operations Research, Biology, Physics / Quantum Computing, Neuroscience, Statistics or a related field. Familiar with common machine learning and deep learning algorithms and keeping track with the latest SOTA implementations . Strong programming skill in Python, C / C++ , proficient in mathematical / statistical concepts and exceptional coding skills Hands-on experience with AI / ML frameworks be familiar such as Caffe, PyTorch, TensorFlow, MxNet etc. Have rich project experience in machine learning and deep learning , be familiar with common algorithm models, such as CNN, RNN, LSTM, Transformer, ViT, etc., and be able to improve and innovate models according to actual problems. Experience in familiar the design, parameter tuning and optimization methods of neural network models is a plus Experience in model compression and in the transplantation and op

1743 - This position is in Austin, Texas. Position Summary We are seeking an experienced Board-Level Hardware Validation Engineer to define and execute the validation and verification of complex electronic systems throughout the product lifecycle. This role is responsible for defining validation strategies, developing test plans, executing hands-on testing, analyzing failures, and working directly with ODM partners to ensure products meet performance, reliability, quality, and compliance requirements before mass production. The ideal candidate combines strong electrical engineering fundamentals with practical lab expertise and is comfortable personally performing validation activities while coordinating with cross-functional teams and manufacturing partners. Key Responsibilities Validation Strategy & Planning Define comprehensive board-level and inter-board validation plans based on product requirements, design specifications, and customer use cases. Develop validation methodologies covering functional, electrical, thermal, power, signal integrity, reliability, and stress testing. Establish test coverage, acceptance criteria, qualification requirements, and release gates. Review hardware architecture, schematics, component specifications, and interface topologies to identify validation risks early in the design cycle. Define incremental validation and regression coverage for component substitutions, design changes, and firmware updates. Hands-On Validation Execution Develop, automate, and execute validation tests on prototype and production-intent hardware. Perform board bring-up, functional verification, electrical characterization, and system-level integration testing. Validate communication interfaces, control signals, and timing requirements. Verify power sequencing, reset behavior, leakage current, and recovery across operating states. Execute temperature and voltage corner testing against approved operating limits. Use oscilloscopes, logic an

We are seeking software engineers to work on next-generation graphics and computing products. Our charter is to build the most stressful set of applications a GPU or high performance computing server would see in its life cycle. The best candidates will have strong C&#43;&#43; programming skills, thorough knowledge of graphics concepts and algorithms, a solid foundation of systems software with emphasis on OS fundamentals, and a deep understanding of current generation PC/hardware architecture. Excellent communication skills and a dedication to meticulous engineering practices are a requirement. As a system software engineer, you will extensively use your knowledge of operating systems, algorithms, and computer architecture to provide robust and efficient solutions to validate and test next generation processors. What you'll be doing: Working closely with architecture, hardware and driver teams through the product development lifecycle of computing and graphics processors, as well as compute products. Responsible for crafting software tools and infrastructure required for new chip development, validation, and productization. You will assess new hardware features and architect manufacturing diagnostic tests using pre-beta CUDA and OpenGL extensions. This job will require an understanding of our hardware and software architectures. What we need to see: BS or MS degree in one of the areas of Electrical Engineering, Computer Engineering, Computer Science or equivalent experience 3&#43; years experience in a related hardware/software position Strong C/C&#43;&#43; programming skills Familiarity with P

NVIDIA is looking for an excellent Senior Firmware Verification Engineer for NVIDIA FW PHY verification Group. The person will be part of FW PHY verification of NVIDIA Products. Will closely work with NVIDIA FW PHY development, architecture teams and gain deep understanding of NVIDIA's products and technologies. What you'll be doing: Own the responsibility for delivering Networking features and their verification aspects. Define, develop and maintain verification infrastructure and regression tests suites - make test suites robust, maintainable and easy portable. Work with continuous integration system, regression tools, automate builds, run test suites and analyzing results. Innovate! Bring NVIDIA product to next quality level What we need to see: B.Sc. in Computer Science / Computer Engineering / Electrical Engineering / Communication Engineering 5&#43; year of relevant experience working with established brands Experience with Verification and Automation Programming Knowledge in C and C &#43;&#43;, object-oriented OOP Knowledge in Linux Creative, motivated and value-driven person Ways to stand out from the crowd: Background with C/C&#43;&#43; as well as Git Experience with python Experience with Networking applications and protocols Background with CI methodology & tools (Gerrit, Jenkins etc.) NVIDIA is widely considered to be one of the technology world’s most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us. Are you a creative and autonomous engineer who loves a challenge? Are you ready to become the engineer you always wanted to be? Come and be part of the best chip design team

About the Team Our Robotics team is focused on unlocking general-purpose robotics and pushing towards AGI-level intelligence in dynamic, real-world settings. Working across the entire model stack, we integrate cutting-edge hardware and software to explore a broad range of robotic form factors. We strive to seamlessly blend high-level AI capabilities with the constraints of physical systems to improve peoples’ lives. About the Role We're seeking talented Robotics Software Engineers to expand our robotics data collection and evaluation program. This highly technical role involves designing, implementing, and optimizing software solutions across diverse robotics hardware. You'll work closely and collaboratively with multidisciplinary teams; including software, hardware, research, and operations - to drive advancements in our robotic systems. This role is based in San Francisco, CA, and requires in-person 4 days a week. In this role, you will: Help develop and grow our data collection labs, owning the entire integration lifecycle, from identifying and sourcing new hardware to collaborating with mechanical and electrical engineers on setup, software integration, and operational deployment. Develop innovative robot control interfaces suited to a variety of morphologies, environments, and tasks. Collaborate closely with research and engineering teams to develop automation tools and machinery that facilitate the evaluation of advanced robotic policies. Lead the design and implementation of data collection, visualization, and quality control processes. You might thrive in this role if you: Have 5+ years of professional software engineering experience developing and shipping production-quality systems in robotics or hardware-integrated environments. Have extensive experience integrating and deploying industrial automation systems, off-the-shelf robotics platforms, or custom hardware into production environments. Bring hands-on experience delivering production-quality software

Job Title Internship: Generative AI Engineer Job Description Start date: November (we are flexible) Duration: at least 3 months (with the option to extend) Type: Internship, Non-Thesis Weekly presence: 40 hours (32 hours could be an option), at least 3x week on-site Location: Eindhoven HTC Job title: Internship: Generative AI Engineer We're seeking an intern with hands-on expertise in Machine Learning, Natural Language Processing and Generative AI to join our team. In this role, you will design and build innovative and ethically responsible Generative AI solutions that effectively address real-world problems, balancing technical feasibility with user needs and business impact. Working at the intersection of natural language processing and machine learning, you will contribute to developing AI solutions that directly impact patient outcomes and Philips' growth in the healthcare sector. Your role: Design, train, and evaluate NLP and LLM-based solutions for various use cases, including retrieval-augmented generation (RAG), information retrieval & search, chatbots, structured information extraction and named entity recognition, text generation, summarization, and more Clean, preprocess, and curate data for evaluation, fine-tuning, and training Work closely with stakeholders across the organization to understand business needs, formulate problems, and deliver data-driven insights Keep up the latest advancements in generative AI research and integrate new techniques into the development process You're the right fit if: You are studying towards your Bachelor or Master's degree in Computer Science, Electrical Engineering, or a related field You have at least one year of hands-on experience developing NLP and ML/DL so

Lead RF Systems and Defense Engineer- HP IQ Description - Who We Are HP IQ is HP’s new AI innovation lab. Combining startup agility with HP’s global scale, we’re building intelligent technologies that redefine how the world works, creates, and collaborates. We’re assembling a diverse, world-class team—engineers, designers, researchers, and product minds—focused on creating an intelligent ecosystem across HP’s portfolio. Together, we’re developing intuitive, adaptive solutions that spark creativity, boost productivity, and make collaboration seamless. We create breakthrough solutions that make complex tasks feel effortless, teamwork more natural, and ideas more impactful—always with a human-centric mindset. By embedding AI advancements into every HP product and service, we’re expanding what’s possible for individuals, organisations, and the future of work. Join us as we reinvent work, so people everywhere can do their best work. About The Role HP IQ's Wireless Technology Team works cross-functionally with Electrical Engineering, Software, Mechanical Engineering, Product Design, Industrial Design, Program Management, and Operations to develop next-generation wearable and AI-connected products. As a Lead RF Systems & Desense Engineer, you will own the RF system architecture from concept through mass production. You will lead RF integration across Wi-Fi, Bluetooth, UWB, NFC and emerging wireless technologies while driving RF desense, coexistence, and wireless performance for highly integrated products. <span style=