Engineer Senior Jobs

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. In the Technology Development — Advanced Modeling & AI Solutions (AMAIS) organization, you will be part of a multidisciplinary team developing next-generation Digital Twins, predictive modeling solutions, and AI-driven technologies that accelerate advanced memory development and manufacturing excellence. You will create predictive digital representations of semiconductor processes, materials, structures, equipment, and products across DRAM, NAND, and advanced packaging technologies including HBM. Leveraging physics-based modeling, computational methods, machine learning, GenAI, large language models (LLMs), and agentic AI frameworks, you will enable technology co-optimization, design-space exploration, process optimization, yield improvement, and accelerated technology learning. Working at the intersection of engineering fundamentals, manufacturing data, and digital engineering, you will develop scalable predictive and prescriptive solutions that connect process, structure, performance, yield, reliability, and cost. This role offers the opportunity to influence critical technology decisions, drive fab-technology co-optimization , and advance Micron's leadership in data-driven semiconductor memory innovation. Qualifications: Independence – be comfortable executing activities and needs Experience in algorithm development, numerical methods, and scientific computing Solid experience with Plasma, FPM, HAR etching, and MC modeling Experience with Wet Pr

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. About our Team: Micron's Front-End Central Quality Assurance (FECTQA) team plays a critical role in ensuring product quality and reliability within our fabrication facilities. We focus on proactive risk management, containment strategies, and process excellence to support manufacturing operations and deliver world-class semiconductor products. The team partners closely with manufacturing, engineering, and quality organizations globally to drive continuous improvement, share best-known methods, and ensure consistent quality standards across the network. Position Overview: As a Senior Engineer, FE Central QA, you will be instrumental in safeguarding product integrity and driving quality improvements across ID1/Fab4 operations. This role is responsible for product containment, risk assessment, disposition of deviated products, quality system compliance, and continuous improvement in a high-volume semiconductor manufacturing environment. You will also support new product qualifications and leverage AI-enabled tools and advanced analytics to improve quality assurance effectiveness, operational efficiency, and decision-making. Responsibilities: Complete product containment, risk assessment, and disposition processes to maintain product quality, reliability, and customer protection. Develop, evaluate, and revise quality assurance methods and protocols. Apply these methods to inspect and test in-process materials, production equipment, an

Senior Engineer - SW Design (RAIL) — Hyderabad. Apply via Workday.

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. As a Senior Engineer, MCT Operations Quality at Micron Technology, Inc., you will lead and collaborate closely with Global Assembly & Test (AT) sites, Global Quality, and various cross-functional stakeholders to drive on Manual Touchpoint Reduction. You will champion a Quality-First mindset by driving manufacturing solutions and end-to-end redesign initiatives to eliminate manual steps upfront that reduce operational error, prevent customer events and enhance product quality across Global AT network. Job Responsibilities: Lead global initiatives and collaborate with AT sites and Global Quality to identify and eliminate high-risk manual touchpoints across Assembly, Test/Post E, Module/SSD, HBM/PWF areas. Conduct onsite validation of the manual touchpoints at the source, identify quality risks, and propose improvements to eliminate the touchpoints. Collaborate with subject matter experts and drive the development and deployment of scalable solutions through physical automation/robotics, system automation, and Predictive Quality & Generative AI-enabled solutions. Collaborate with subject matter experts on end-to-end redesign initiatives to eliminate manual touchpoints upfront. Lead as the central team program governance to drive strategy, ali

The Shift Engineer - Cluster - IPQA conducts in-process quality inspections during shifts, monitoring production processes and identifying quality deviations. This role records and analyzes quality data, assists in implementing corrective actions, provides training on in-process quality procedures, and supports continuous improvement initiatives to enhance process quality. Source: Adani Group | Job ID: 56134

Who Are We? Postman is the world’s leading API platform, used by more than 45 million+ developers and 500,000 organizations, including 98% of the Fortune 500. Postman is helping developers and professionals across the globe build the API-first world by simplifying each step of the API lifecycle and streamlining collaboration—enabling users to create better APIs, faster. The company is headquartered in San Francisco and has offices in Boston, New York, Austin, Tokyo, London, and Bangalore - where Postman was founded. Postman is privately held, with funding from Battery Ventures, BOND, Coatue, CRV, Insight Partners, and Nexus Venture Partners. Learn more at postman.com or connect with Postman on X via @getpostman. P.S: We highly recommend reading The "API-First World" graphic novel to understand the bigger picture and our vision at Postman. About the Team : The Identity and Access Management team is responsible for building a secure, reliable, and seamless identity platform for all Postman users. This team owns the systems behind authentication, session management, access control, service accounts, invites, and other foundational identity capabilities that power the product. Postman’s identity layer is a critical part of the product experience. It sits on the path of every authenticated request and enables users, teams, and systems to access Postman securely and collaborate effectively. The team works on a mix of core platform improvements, new product capabilities, and reliability/security investments. What You’ll Do: Design, build, and evolve backend systems that power Postman’s identity and authentication platform. Own projects end to end: clarify requirements, drive technical design, implement solutions, manage rollout, and support production. Work closely with Product, Design, and Engineering teams to scope, build, test, and launch new features and platform improvements. Improve system reliability, scalability, observability, and operational readiness for service

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Role and Responsibilities Responsible for layout design and development of critical analog, mixed-signal, custom digital block, standard cells and full chip level. Perform layout verification like LVS, DRC, Antenna, Shield, Matching, Latch up, EM IR Totem checks, quality check and documentation. Responsible for development of digital block layouts using auto placement and route tools Responsible for basic understanding of skill coding and automation Responsible for on-time delivery of block-level layouts with acceptable quality. Demonstrate leadership skill in planning, area/time estimation, scheduling, delegation and execution to meet project schedule/achievements in multiple project environment. Guide developing team members in their execution of Sub block-level layouts & review their work Contribute to effective project-management. Effectively communicating with Global engineering teams to assure the success of layout project. Responsible for the reducing the layout effort by using AI tools Qualification/Requirements 5 to 8-year experience in analog/custom layout design in advanced CMOS process. Expertise in Cadence VLE/VXL and Mentor Graphic Calibre DRC/LVS is a must. Should have hands on experience in creating layout of cr

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities will include, but are not limited to: Design, implementation and integration of complex analog circuits such as CMOS Amplifiers, Comparators, Bandgap References, LDOs, Charge Pumps, Oscillators, DLL, IO Buffers, Analog Test Mux, Process Monitor, and Temperature sensors for advanced DRAM products. Design, implementation and integration of synchronous and asynchronous custom digital block Contributing to the development of new product opportunities by assisting with the overall design, layout, and optimization of Analog/Memory/Logic circuits. Parasitic modeling and design validation, reticle experiments and required tape-out revisions. Overseeing and managing the layout process including floor-planning, placement, and routing Performing verification processes with modeling and simulation using industry standard simulators Contributing to cross group communication to work towards standardization and group success. Working with Marketing, Probe, Assembly, Test, Process Integration, and Product Engineering groups to ensure accurate manufacturability of product. Proactively solicit guidance from Standards, CAD, modeling, and verification groups to improve the design quality. Mentor and lead young designers. Strong AI proficiency, a solid understanding of agentic AI model

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities will include, but are not limited to: Design, implementation and integration of complex analog circuits such as CMOS Amplifiers, Comparators, Bandgap References, LDOs, Charge Pumps, Oscillators, DLL, IO Buffers, Analog Test Mux, Process Monitor, and Temperature sensors for advanced DRAM products. Design, implementation and integration of synchronous and asynchronous custom digital block Contributing to the development of new product opportunities by assisting with the overall design, layout, and optimization of Analog/Memory/Logic circuits. Parasitic modeling and design validation, reticle experiments and required tape-out revisions. Overseeing and managing the layout process including floor-planning, placement, and routing Performing verification processes with modeling and simulation using industry standard simulators Contributing to cross group communication to work towards standardization and group success. Working with Marketing, Probe, Assembly, Test, Process Integration, and Product Engineering groups to ensure accurate manufacturability of product. Proactively solicit guidance from Standards, CAD, modeling, and verification groups to improve the design quality. Mentor and lead young designers. Strong AI proficiency, a solid understanding of agentic AI model

To execute, monitor, and support the commissioning activities of the Coal Handling Plant (CHP) for the Korba Phase-II Thermal Power Project. The role is responsible for ensuring safe, timely, and efficient commissioning, testing, troubleshooting, and performance optimization of CHP systems in compliance with project specifications, safety standards, and operational requirements. Source: Adani Group | Job ID: 55464

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. DEVELOP AND TEST FIRMWARE SSD products: Develop firmware IP subsystems for SSD products that meet or exceed the requirements of the technical spec matrix; including, but not limited to: Performance, Endurance, Capacity, Functionality, and Quality/Reliability Firmware Quality Assurance: Develop a firmware unit and functional tests that ensures the firmware subsystem meets the quality, functional, and performance requirements required at each integration breakthrough in the product development lifecycle ARTIFICIAL INTELLIGENCE Integrates AI assisted tools and insights into daily work to improve efficiency, quality, or effectiveness, exercising sound judgment and complying with organizational standards and legal requirements. Contributes to a culture of continuous improvement by identifying, testing, and sharing AI-enabled enhancements within one’s scope of work. COMMUNICATE EFFECTIVELY Consistently provide Management, multi-functional team members, and the firmware team with detailed and accurate information. This includes activities within the firmware development organization and project status updates.

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. DEVELOP AND TEST FIRMWARE SSD products: Develop firmware IP subsystems for SSD products that meet or exceed the requirements of the technical spec matrix; including, but not limited to: Performance, Endurance, Capacity, Functionality, and Quality/Reliability Firmware Quality Assurance: Develop a firmware unit and functional tests that ensures the firmware subsystem meets the quality, functional, and performance requirements required at each integration breakthrough in the product development lifecycle ARTIFICIAL INTELLIGENCE Integrates AI assisted tools and insights into daily work to improve efficiency, quality, or effectiveness, exercising sound judgment and complying with organizational standards and legal requirements. Contributes to a culture of continuous improvement by identifying, testing, and sharing AI-enabled enhancements within one’s scope of work. COMMUNICATE EFFECTIVELY Consistently provide Management, multi-functional team members, and the firmware team with detailed and accurate information. This includes activities within the firmware development organization and project status updates. </

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. We are currently looking for motivated individuals to join Micron Technology Inc. Central Engineering (CE) - Product Yield Enhancement (PYE) Engineering Team. As CE PYE Failure Analysis (FA) Engineer for Micron Technology, Inc., you will be responsible for providing full fault isolation and failure analysis support for qualifications, customer returns, new device introduction, and test failures. You will become the subject matter expert on fault isolation and physical failure analysis methods. As the CE PYE FA Engineer, you will be responsible for understanding all relevant methodologies to isolate electrical failures by working closely with Product Engineering Teams. You will also have a thorough understanding of the product architecture, process flow, and test sequence to work with Process Integration, Product, Test, and Quality Reliability Assurance Engineering groups ensuring physical defects are root-caused and classified. Responsibilities: Perform sophisticated electrical device characterization to determine electrical fail mechanisms. Operate fault isolation equipment to accurately narrow down failure defect locations. Conduct physical failure analysis to identify and classify physical defects. Establish and hypothesize potential electrical

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Role and Responsibilities Responsible for layout design and development of critical analog, mixed-signal, custom digital block, standard cells and full chip level. Perform layout verification like LVS, DRC, Antenna, Shield, Matching, Latch up, EM IR Totem checks, quality check and documentation. Responsible for development of digital block layouts using auto placement and route tools Responsible for basic understanding of skill coding and automation Responsible for on-time delivery of block-level layouts with acceptable quality. Demonstrate leadership skill in planning, area/time estimation, scheduling, delegation and execution to meet project schedule/achievements in multiple project environment. Guide developing team members in their execution of Sub block-level layouts & review their work Contribute to effective project-management. Effectively communicating with Global engineering teams to assure the success of layout project. Responsible for the reducing the layout effort by using AI tools Qualification/Requirements 5 to 8-year experience in analog/custom layout design in advanced CMOS process. Expertise in Cadence VLE/VXL and Mentor Graphic Calibre DRC/LVS is a must. Should have hands on experience in creating layout of cr

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities Design and maintain standard cells for new DRAM products on new technology Closely collaborate with DTCO team to develop stdcells architecture for emerging technologies Characterization and modeling of Standard cells to provide timing/power model Quality Analysis of characterized liberty models in terms of performance, Power and Functionality Develop automation test bench/flow/tools to improve the work efficiency and help data analysis Co-work with international colleagues on developing new flows and tools for stdcells design Ability to identify stdcells design & char pain points suitable for AI-based automation and collaborate with cross‑functional teams to deploy scalable solutions. Requirements Good understanding of CMOS circuit design Good knowledge of CMOS device physics and layout Experience in total stdcells flow from DTCO development/ spec definition till lib release RTL/GDS flow setup, block level timing analysis, ICC2 experience. Preferred Synopsys EDA flow Finefet & planner experience required. Experience in any characterization tools (Siliconsmart/Liberate)and Cadence Virtuoso preferred. Experience in Primetime, Solido Analytics Familiar with analog/digital simulation tools, i.e. HSPICE, HSIM, VerilogHDL, FINESIM, Simvision Experience in Standard Cell design, layout and verification Experience in Skill, TCL, Per