Engineering Manager Linux Team Jobs

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Job Description Summary The Probe Product Engineer in STPG Product Engineering owns probe strategy and silicon learning at wafer test, spanning pre‑silicon design‑to‑probe staging, first‑silicon bring‑up, qualification, and high‑volume manufacturing (HVM). This role is accountable for defining probe coverage intent, establishing limits and guard‑bands grounded in silicon behavior, and driving yield, quality, and test‑cost outcomes. The focus is on interpreting design intent, device operation, and process interactions, and translating product risk into robust, manufacturable probe strategies aligned with downstream test and customer requirements. The engineer works closely with Design, DFT, Design Validation (DV), Process Integration, Backend Test, and Reliability teams to ensure probe solutions are technically sound, scalable, and product‑centric across the lifecycle. Key Responsibilities Probe Coverage Strategy & Ownership Define and own probe coverage intent by mapping design features, device behavior, and process risks into probe observability, screening mechanisms, trims, and guard‑bands. Define, release, and sustain probe test flows from first silicon through qualification and HVM, ensuring coverage objectives

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Job Description Summary The Probe Product Engineer in STPG Product Engineering owns probe strategy and silicon learning at wafer test, spanning pre‑silicon design‑to‑probe staging, first‑silicon bring‑up, qualification, and high‑volume manufacturing (HVM). This role is accountable for defining probe coverage intent, establishing limits and guard‑bands grounded in silicon behavior, and driving yield, quality, and test‑cost outcomes. The focus is on interpreting design intent, device operation, and process interactions, and translating product risk into robust, manufacturable probe strategies aligned with downstream test and customer requirements. The engineer works closely with Design, DFT, Design Validation (DV), Process Integration, Backend Test, and Reliability teams to ensure probe solutions are technically sound, scalable, and product‑centric across the lifecycle. Key Responsibilities Probe Coverage Strategy & Ownership Define and own probe coverage intent by mapping design features, device behavior, and process risks into probe observability, screening mechanisms, trims, and guard‑bands. Define, release, and sustain probe test flows from first silicon through qualification and HVM, ensuring coverage objectives

At Snowflake, we are powering the era of the agentic enterprise. To usher in this new era, we seek AI-native thinkers across every function who are energized by the opportunity to reinvent how they work. You don’t just use tools; you possess an innate curiosity, treating AI as a high-trust collaborator that is core to how you solve problems and accelerate your impact. We look for low-ego individuals who thrive in dynamic and fast-moving environments and move with an experimental mindset — who rapidly test emerging capabilities to discover simpler, more powerful ways to deliver results. At Snowflake, your role isn't just to execute a function, but to help redefine the future of how work gets done. The Customer Experience Engineering Team builds the internal and external technologies that scale Snowflake’s global support and sales organizations. We empower our technical experts by providing the advanced tools they need to resolve complex issues and drive customer success. Our team specializes in software engineering, data-driven decisions, ML, and LLM-based solutions . We build production-grade systems to automate manual processes and augment the capabilities of our technical staff. Our current focus includes: LLMs : Developing and deploying LLM and agent-based architectures for streamlining troubleshooting Scalable Evaluations : Implementing large-scale evaluations to ensure the quality and reliability of our internal and external tools Process Automation : Designing intelligent workflows that eliminate bottlenecks and allow our experts to focus on the most technical aspects of the Snowflake platform Incident discovery: using embeddings, LLMs, clustering, and agents to detect potential widespread issues more quickly Now, the team is growing, and we are looking for a Software Engineer to join us. In this role, you will work closely with the state of the art LLM models, fine-tune them, develop agents, apply various clusterings, summarizations, embeddings, and so on. Ev

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Department Introduction The Non-Volatile NAND Design Engineering group is responsible for the design and optimization of analog, digital and mixed-signal circuits enabling advanced NAND Flash memory products. Close collaboration with cross-functional teams ensures scalable, manufacturable, and reliable solutions across technology nodes. Position Overview As a Design Engineer in the NVE Design Engineering Core group at Micron Semiconductor Italia, you will contribute to the development of memory products that are best-in-class, using your specialized knowledge and Micron proprietary methods of designing and analyzing core and mixed circuits used in the development of memory products. Responsibilities Responsibilities include, but not limited to: • Design, simulate, and optimize NAND core circuit blocks, balancing performance, power, area, and reliability trade-offs. • Translate product and system requirements into circuit implementations, evaluating feasibility and functionality across use cases. • Perform comprehensive circuit verification (DC, AC, transient, noise, Monte Carlo, PVT corners) at block and chip level. • Collaborate with cross-functional teams to improve power efficiency, manufacturabil

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. F15 ATE （ Alpha Technology Engineering ） Photo エンジニアは、研究開発チームから移管される新技術の量産導入、良品率（ Yield ）の向上、サイクルタイム短縮を推進し、関連するすべての部門および DRAM ネットワークと連携しながら成果を創出する役割を担います。 また、 ATE Photo EUV フォトマスクエンジニアとして、最先端リソグラフィ工程で使用される EUV フォトマスクの品質・信頼性・運用健全性を確保する専門エンジニアリングチームの一員として活動します。 プロセスエンジニア、スキャナー装置エンジニア、その他の関係パートナーと密に連携し、フォトマスク認定、コンタミネーション管理、欠陥低減など、 EUV パターニング性能に直結する重要業務を主導します。 この役割は、広島サイト（ Fab15 ）における EUV プロセスの安定稼働に不可欠であり、技術調査・改善、データドリブンアプローチ、業務効率化を通じて、 EUV フォトマスクに関連するリスクを プロアクティブに管理すること が求められます。 The F15 ATE (Alpha Technology Engineering) Photo Engineer plays a key role in driving the successful transfer of new technologies from the R&D organization into high‑volume manufacturing, improving yield performance, shortening cycle time, and delivering measurable results through collaboration with all relevant departments and the global DRAM network. As an ATE Photo EUV Photomask Engineer, you will be part of a specialized engineering team dedicated to ensuring the quality, reliability, and operational integrity of EUV photomasks used in advanced lithography processes. You will closely collaborate with process e

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate, and advance faster than ever. As a Product Engineer working directly in support of the NAND Product Development Team Leader, your role involves collaborating with cross-functional teams to propel new product development and spearhead the integration of AI solutions into actionable strategies and plans. In this capacity, you represent the NAND engineering team, engaging with strategic partners such as business units, quality assurance, fabrication, testing, and supply chain to ensure a competitive time-to-market for the newest technology nodes, from silicon to system. This role is highly impactful, offering broad scope and high visibility. It presents an opportunity to contribute to Micron’s next generation of technology and product enablement alongside a dedicated and highly skilled cross-functional team. Key Responsibilities: Negotiate and align NAND requirements with business units and SSD development leads, transforming these requirements into qualification specs that guide NAND developmen

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. We are looking for an Engineer/Senior Engineer in Product Engineering, NAND Validation/Characterization , specializing in functional and design validation/Characterization of advanced NAND products . Experienced in silicon and simulation‑based validation, electrical failure analysis, and cross‑functional issue closure. Strong focus on automation, data‑driven validation, and applied AI/ML techniques to improve test efficiency, coverage, and debug productivity. Key Responsibilities & Achievements Designed and executed functional and design validation flows for advanced RG NAND devices using silicon and simulation platforms Developed deterministic usage‑case tests and random sequence generators to validate NAND commands and customer‑mode features Performed electrical failure analysis of issues seen, root‑cause investigations (including digital and analog circuitry), and drove issue resolution with cross-functional teams Characterization of NAND performance including timing and power parameters, with the latest NAND ONFI interface standards

About the Team The Core Network Engineering team owns the end-to-end networking stack that connects OpenAI’s compute infrastructure — spanning global WAN/edge connectivity, data-center networking, and high-performance host/xPU networking used for large-scale training and inference workloads. This team is responsible for ensuring networking is never the bottleneck to model training efficiency, cluster reliability, or fleet expansion. They design and operate the systems that provide predictable, high-throughput, low-latency connectivity across some of the world’s most advanced AI infrastructure. About the Role We’re looking for engineers to help build and operate the networking foundation behind OpenAI’s frontier AI systems. Depending on your background and area of focus, you may work across host networking, datacenter fabrics, or global WAN infrastructure. The problems span low-level systems software, distributed infrastructure, protocol readiness, observability, performance engineering, automation, and large-scale network operations. You’ll work on systems where microseconds of latency, tail performance, and network reliability directly impact model training efficiency and production serving performance. This role is ideal for engineers who enjoy operating close to the hardware/software boundary and solving performance-critical infrastructure problems at massive scale. In this role, you will: Design, build, and operate networking systems that support large-scale AI training and inference infrastructure Improve performance, reliability, and scalability across host networking, datacenter fabrics, and WAN systems Develop automation for provisioning, configuration management, validation, upgrades, and lifecycle management of networking infrastructure Build tooling and observability systems for network health, performance analysis, debugging, and automated remediation Optimize network performance across technologies such as RDMA, RoCE, InfiniBand, Ethernet, and high-perf

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. As a key leader within High Bandwidth Memory (HBM) Product Engineering Media Health team, you will spearhead and develop a high performing team driving Media Health Manufacturing and activities for Micron’s latest HBM products, both on DRAM and Interface die and a stacked product. You will lead a portfolio of Best-In-Class Next Generation HBM Product focused on the critical KPI’s Quality, Cost, Cycle Time and Scale. This include lead the manufacturing test flow development and validation, improve the device/stacked yield with most optimized extrinsic and intrinsic reliability through in depth circuit debug, test coverage optimization and strategy innovation, test time improvement for manufacturing flow and drive the DFT (design for test) strategy to stage new ideas to improve cost, cycle time and quality. You will also collaborate with cross functional team (Fab, Product Leads, Design, Technology Development, Design, Test Solution Engineering etc) with diverse expertise to achieve both strategic and tactical objectives and stay ahead on technology and product leadership. The future of HBM are exciting and dynamics. Micron is seeking experienced individuals that find technical challenges engaging and invigorating. Responsibilities: Optimized Test

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is building next-generation RISC-V CPUs optimized for AI, high-performance computing, and emerging autonomous AI systems. As the RISC-V AI / HPC & Agentic Software Engineering Lead, you will operate at the hardware–software boundary, enabling AI, HPC, and agentic AI software stacks on Tenstorrent’s RISC-V processors. This role is responsible for integrating and optimizing Tenstorrent’s LLK (Low-Level Kernel) infrastructure for CPU execution, while leading the bring-up of a RISC-V-native agentic AI software stack — including runtime orchestration, distributed execution frameworks, memory systems, and developer tools required for goal-driven AI systems. You will work closely with CPU architects, microarchitecture teams, compiler engineers, and AI kernel developers to ensure tight alignment between software capabilities and RISC-V architectural features. This role is remote, based out of North America. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are A systems-oriented software engineer with deep experience in HPC and AI software stacks. Experienced with distributed AI systems, orchestration frameworks, or agentic AI arc

About the Team OpenAI’s Financial Engineering (FinEng) team powers how revenue flows through our products—pricing & packaging, checkout, payments, subscriptions, and the financial infrastructure behind them. We partner with Product, Engineering, Risk, Finance, and Go-to-Market to make paying for OpenAI products seamless, reliable, and efficient worldwide. About the Role As a Data Scientist on FinEng, you’ll own the analytics and experimentation that improve our checkout and payments , subscriptions , and pricing & monetization systems. You’ll define the metrics that matter, build the source-of-truth data assets, and design experiments that increase conversion, reduce churn and payment failures, and expand global payment method coverage. Your work will directly influence revenue, customer experience, and how we scale internationally. This role is based in San Francisco, CA. We use a hybrid work model of 3 days in the office per week and offer relocation assistance to new employees. In this role, you will Own checkout & payments analytics and experimentation across methods and locales (e.g., bank transfers, emerging rails), improving conversion while monitoring risk and latency. Build and run the experimentation program for in-house checkout—define success metrics and guardrails, execute staged rollouts, and use offline incrementality when online tests aren’t feasible. Create operational visibility and source-of-truth data with FinEng Data Engineering—land team-level metrics, SLAs, and self-serve dashboards that drive proactive action. Lead subscription, retention, and monetization analytics—ship launch-readiness for new subscription features, reduce involuntary churn (e.g., targeted retrials/nudges), and develop elasticity/FX frameworks toward pricing optimality. You might thrive in this role if you have 5+ years in a quantitative role (data science, product analytics, or experimentation) in high-growth or fintech environments Fluency in SQL and Python ,

RDQ226R605 This role can be based remotely anywhere in the United States. About Databricks Databricks is the data and AI company. More than 12,000 organizations worldwide — including Comcast, Condé Nast, Grammarly, and over 50% of the Fortune 500 — rely on the Databricks Data Intelligence Platform to unify and democratize data, analytics and AI. Databricks is headquartered in San Francisco, with offices around the globe and was founded by the original creators of Lakehouse, Apache Spark™, Delta Lake and MLflow. About the Team The Agentic Security Engineering team is a horizontal, shared services engineering team that makes every Databricks security function AI-native — building the AI agents, "personas," and shared platform that security teams across the org (Detection & Response, Threat Intelligence, Vulnerability & Product Security, Red Team, GRC, and Continuous Monitoring) build on to operate at machine speed, safely and reliably. We leverage AI to transform how security is done. The Role As Staff Security Software Engineer , you own a major technical workstream designing and shipping production-grade AI agents and the platform capabilities that power them, with reliability, observability, and safe-by-default security as first-class requirements. You set the standards for how agents are built and operated and co-build with partner security teams. Example use cases you'll enable, led by AI threat detection at scale (alert triage and false-positive reduction, fleet-scale anomaly detection), extend to threat hunting, vulnerability management, product security, red team/offensive testing, and GRC/assurance use cases. The Impact You Will Have Agentic Security Engineering Architecture Design, ship, and operate production AI agents/personas that security teams depend on, starting with AI threat detection at scale. Build and harden the shared platform so any security team can ship agents safely and reliably — i.e., sandboxing, scoped least-privilege identity, obs

SMTS/DMTS in Process Equipment Engineering — 4 Locations. Apply via Workday.

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The Thin Films Equipment Engineering team at Micron develops and enhances advanced semiconductor manufacturing equipment in a fast-paced research and development environment. The team works closely with Process Engineering, Facilities Engineering, and equipment suppliers to enable next-generation memory technologies and achieve world-class equipment performance. Through innovation, collaboration, and data-driven decision-making, the team plays a critical role in advancing semiconductor technology development. As a Thin Films Equipment Engineering Intern, you will gain hands-on experience working with groundbreaking semiconductor equipment and processes. You will support engineering projects focused on equipment optimization, data analysis, and technology development while collaborating with multi-functional teams. This role provides exposure to semiconductor manufacturing, experimental design, and the application of advanced analytics to solve complex engineering challenges. Responsibilities Collect, analyze, and interpret equipment and process data to find opportunities for performance optimization and continuous improvement. Support structured engineering experiments, document findings, and communicate results through technical reports and presentations. Collaborate with Equipment Engineering, Process Engineering, Facilities Engineering, and equipment suppliers to address technology-development challenges and improve equipment performance. Develop an understanding of equipment hardware,

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. As a key leader within High Bandwidth Memory (HBM) Product Engineering Media Health team, you will spearhead and develop a high performing team driving Media Health Manufacturing and activities for Micron’s latest HBM products, both on DRAM and Interface die and a stacked product. You will lead a portfolio of Best-In-Class Next Generation HBM Product focused on the critical KPI’s Quality, Cost, Cycle Time and Scale. This include lead the manufacturing test flow development and validation, improve the device/stacked yield with most optimized extrinsic and intrinsic reliability through in depth circuit debug, test coverage optimization and strategy innovation, test time improvement for manufacturing flow and drive the DFT (design for test) strategy to stage new ideas to improve cost, cycle time and quality. You will also collaborate with cross functional team (Fab, Product Leads, Design, Technology Development, Design, Test Solution Engineering etc) with diverse expertise to achieve both strategic and tactical objectives and stay ahead on technology and product leadership. The future of HBM are exciting and dynamics. Micron is seeking experienced individuals that find technical challenges engaging and invigorating. Responsibilities: Optimized Test Coverage: <span