Job Details: Job Description: The Role and Impact As a Product Failure Analysis Engineer at Intel, you will play a vital role in identifying and resolving product issues to enhance performance, quality, and reliability. You will conduct comprehensive failure analyses and collaborate with cross-functional teams to develop innovative solutions that improve product yield and reliability. Through your efforts, you will directly impact Intel's ability to deliver world-class technologies. Business group The role is part of Intel Corporation's Product Quality and Reliability organization, which focuses on ensuring Intel's products meet the highest standards of quality and reliability. This group supports Intel's mission by driving improvements in product performance, enhancing manufacturing processes, and advancing technology innovation. Key Responsibilities Perform failure analysis and root cause investigation on Intel products, including CPUs, SoCs, and AI interface graphic platforms. Conduct failure analyses to identify defects and recommend corrective actions to design, fab, assembly, and test teams to improve product reliability. Develop and refine failure analysis methodologies, tools, and processes to enhance efficiency and accuracy. Collaborate with cross-functional teams to implement process improvements and innovative solutions for future technologies. Maintain and optimize Failure Mode and Effects Analysis (FMEA) and control plans throughout product lifecycles. Support new product launches, enabling technology transfers and toolset improvements across Intel sites. Qualifications: Minimum Qualifications Bachelor's or Mas
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Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are transforming how the world uses information to enrich life for all. Within our DRAM organization, we develop next-generation memory technologies in an industry-leading 300mm R&D environment, bringing together expertise across process development, design, modeling, characterization, reliability, and manufacturing. Our team works collaboratively to advance memory scaling while improving performance and manufacturability. As a Process Integration Engineer, you will help enable state-of-the-art DRAM technologies and solve complex integration, device, yield, and circuit challenges. You will work closely with cross-functional engineering teams to optimize process flows, improve yield and margin, and translate technical data into solutions that enable future generations of memory technology. Responsibilities: Lead technology integration activities to enable manufacturability of advanced DRAM technologies Partner with process development, product engineering, design, yield, mask, and probe teams to resolve yield, performance, reliability, and margin challenges Design and implement R&D fab experiments and optimize process flows to meet product and technology requirements Analyze inline, defect, parametric
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a US Expansion TIQ Program Manager , you will own key projects within the US Expansion Tool Install and Qual (TIQ) Program for our new US based High-Volume Manufacturing (HVM) sites. Your areas of ownership will include multiple of the following: Fab Support (FS) and Main Tool Auxiliary (MTA) enablement. Root Cause Analysis, Corrective and Preventative Actions, and Schedule execution; enable systems and processes to drive delays to zero (D2Z). Resource Leveling, Modeling, and Validation. Support TIQ Change Control Board (CCB): Management of a high-volume of change requests, mitigate cost and schedule impacts. Risk-Build and Disruptive change avoidance and management. Process Qualification for Tool Releases to enable capacity scale and speed. Construction, Facilities, and Layout engagement. Tool Install SPMO champion support for multiple Fab Process Areas. The ideal candidate must be willing to work as a TIQ Program Manager on site in Boise, Idaho to initially support the ID1/ID2 Fab Startup for approximately 18 months before permanently transitioning to the New York SPMO organization at the Clay, New York US Expansion HVM Site. Responsibilities: Own assigned projects and programs, drive execution to plan, and enable successful outcomes. TIQ business process execution, project tracking that includes driving Performance-to-Plan (P2P), and reporting Key Performance Indicator (KPI) metric
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job duties Include • Interpreting contract documents and specifications • Interpreting control and P & ID drawings • Ability to prepare and update project budgets • Prepare, review and finalize cost estimates • Ability to produce, update, and manage project schedules • Review instrumentation, control and electrical designs • Oversee design, engineering and manufacturing team members • Interaction with other engineering firms, contractors and vendors Scope summary, clarifications, and exclusions • Experience in managing I&C projects to a successful conclusion • Familiarity with electrical schematics and control diagrams • Familiarity with process controls and strategy • Ability to work well with others and lead by example • Proficient in Word, Excel, and Adobe Acrobat • Good communication skills with clients and employees Typical responsibilities include, but are not limited to: Safety & Quality: • Ensuring compliance with laws, regulations, and standard processes • Leading quality improvement initiatives in area of expertise to reduce Fab impacts,
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. 擔任 Hook-up 專案技術領導者,整合設計、施工、品質與營運需求,確保機台導入及量產所需公用系統按時交付 主要職責 負責半導體廠房機台 Hook-up(二次配)工程規劃、執行與進度管理。 統籌機台 Move-in、Pre Hook-up、Hook-up、Turn-on 等各階段工作。 協調廠務(FAC)、設備(ME)、工務(Construction)、IE、EHS 及承攬商等跨部門作業。 審查 Hook-up 設計圖面、BIM 模型及施工方案,確保符合安全、品質及產能需求。 管理施工進度、施工品質、成本及風險議題,確保關鍵里程碑達成。 主導現場施工問題排除、介面整合及資源協調。 推動 QA/QC 驗證、測試驗收及系統交付作業。 建立並持續優化 Hook-up 標準流程、施工規範及教育訓練制度。 人工智慧與數位化能力 - 具備運用人工智慧工具、數據分析和數位技術提升專案規劃、工程執行、風險管理和營運效率的能力。 - 具備應用人工智慧輔助解決方案進行設計審查、專案控制、工作流程自動化、知識管理和持續改進的經驗。 - 致力於推動數位轉型,並促進工程和施工團隊採用創新技術。 Hook-up Senior Engineer / Technical Lead Position Summary Serve as the technical lead for Hook-up projects, integrating design, construction, quality, and operational requirements to ensure the timely delivery of utility systems required for tool installation and volume manufacturing. Key Responsibilities Lead the planning, execution, and schedule management of semiconductor fab Hook-up (secondary distribution) projects. Coordinate all phases of tool installation, including Move-in, Pre-Hook-up, Hook-up, and Turn-on activities. Collaborate closely with Facilities (FAC), Manufacturing Engineering (ME), Construction, Industrial Engineering (IE), Environmental Health & Safety (EHS), and contractors to ensure seamless project execution. Rev
Experienced Low Observables Mission Systems Integration Engineer Company: The Boeing Company We are seeking a Low Observables (LO) Design & Integration Engineer to support design and analysis activities for stealth/low-signature systems. The engineer will perform LO material and structure design, electromagnetic analysis, integration and test support, data processing, and technical reporting. The role requires practical experience with LO materials and technologies, solid electromagnetics knowledge, and hands-on expertise with computational electromagnetic (CEM) solvers used to design and optimize LO solutions. Key Responsibilities Perform design and analysis tasks for LO materials, coatings, treatments, and structural treatments to minimize radar, infrared, and other signatures. Develop and validate LO integration concepts for aircraft/vehicle structures and subsystems, including manufacturability and testability considerations. Use CEM solvers to model, simulate, and optimize LO components and systems (e.g., surface treatments, RAM, apertures, seams, RAM-structure interactions). Perform sensitivity studies and trade-offs across materials, geometry, and integration approaches to meet system-level LO requirements. Process and analyze measured test data from laboratory and flight/field tests; compare test results to simulation and iterate designs. Produce technical documentation: detailed analysis reports, integration guidance, test plans, and summaries suitable for engineering and program management audiences. Communicate technical results and recommendations to multidisciplinary teams and support design reviews. Support manufacturing and test engineering to ensure LO design intent is preserved through fab
ABOUT BASETEN Baseten powers mission-critical inference for the world's most dynamic AI companies, like Cursor, Notion, OpenEvidence, Abridge, Clay, Gamma and Writer. By uniting applied AI research, flexible infrastructure, and seamless developer tooling, we enable companies operating at the frontier of AI to bring cutting-edge models into production. We're growing quickly and recently raised our $1.5B Series F , led by Altimeter Capital, Conviction Partners, and Spark Capital. Join us and help build the platform engineers turn to to ship AI products. THE ROLE Baseten is building its own GPU infrastructure for large-scale inference. As we move into large scale, high-density NVIDIA systems, the hardest failures are intermittent, cross-layer, and difficult to prove: RoCE congestion, InfiniBand stalls, ECN/DCQCN mis-tuning, bad optics, RNIC issues, host kernel stalls, GPU driver problems, and workload symptoms that look like network problems, but are not. We are hiring a Lead Software Engineer to build a first-class observability and root-cause analysis system for GPU fabrics. This is a hard distributed systems problem, not a dashboarding problem. The system will collect high-volume signals from switches, hosts, active probes, and inference services; reduce and correlate them in real time; understand topology and service ownership; and produce actionable diagnosis while an incident is still unfolding. This role sits at the boundary between networking and inference software. RDMA data paths, GPUDirect transfers, prefill/decode disaggregation, KV cache movement, request routing, and workload backpressure can all create fabric symptoms or hide real fabric failures. The goal is to tell an operator, quickly and with evidence, whether an incident is caused by the fabric, host, NIC, GPU, RDMA path, scheduler, or serving layer — and what to do next. EXAMPLE INITIATIVES Real-time telemetry engine — Build the ingestion, reduction, storage, and query path for high-cardinality fab
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