Front End Central Product Integration Senior Staff Principal Engineer Jobs

Ready to do the most impactful work of your career? At Coinbase , we are uncompromising on our mission to increase economic freedom. The bar is high, the environment is intense, and we like it that way. This isn't a place for complacency, it’s a place to be pushed past your perceived limits. If you're ready to build the future of finance alongside people who refuse to settle for "good enough," you belong here. Coinbase is a remote-first, but not remote-only company. Expect to get together quarterly for intense in-person working sessions called “surges.” learn more about working at Coinbase . This is a 12-week internship during summer 2027. As a Product Design Intern, you'll spend 12 weeks embedded on a product team solving real design problems across Coinbase's core products including Coinbase app, Prime, Coinbase Wallet, and more. You'll partner with researchers, designers, product managers, and engineers to turn a product idea into a tangible user experience, contributing to large-scale design challenges that help millions of people engage with the crypto economy. What you'll do: Own a product design project end-to-end, translating a product concept into a polished user experience across mobile and/or web platforms with coaching from an intern manager Partner with your product team and cross-functional stakeholders to define user needs, explore solutions, and validate design directions Lead presentations of your work in group design critiques, incorporating feedback to strengthen your solutions Build high-fidelity prototypes in Figma to socialize design concepts and collaborate closely with engineering on implementation Collaborate with engineers to build and ship PRs using AI-assisted coding tools, translating your designs into production-ready front-end changes Apply human-centered design methods and structured problem-solving frameworks to navigate complex, ambiguous product challenges Required Skills and Experience: Demonstrated ability to us

At Snowflake, we are powering the era of the agentic enterprise. To usher in this new era, we seek AI-native thinkers across every function who are energized by the opportunity to reinvent how they work. You don’t just use tools; you possess an innate curiosity, treating AI as a high-trust collaborator that is core to how you solve problems and accelerate your impact. We look for low-ego individuals who thrive in dynamic and fast-moving environments and move with an experimental mindset — who rapidly test emerging capabilities to discover simpler, more powerful ways to deliver results. At Snowflake, your role isn't just to execute a function, but to help redefine the future of how work gets done. Team Scope You'll lead a team of 10 engineers owning the Developer Experience for authoring data engineering workloads, reporting to the manager who oversees DEX across all geographies. Every place a data engineer writes, runs, automates, or debugs their work is something we build, shape, or contribute to: Workspaces — the primary browser-based, multi-file IDE in Snowsight. Full-stack: a React/TypeScript front end on top of our own backend platform. We are the single largest contributor to this surface in net-new feature capabilities. Cortex Code Desktop — the local, VS Code-grade development experience for building on Snowflake (CoCo). We develop DE-focused experiences inside of the Desktop editor as first-class experiences. Cortex Code CLI — the command-line developer experience for the same workflows, for engineers who live in the terminal. We develop skills that go out to customers, as well as frameworks and technologies internally to build and test the agent and skills more rapidly. Pipeline Observability UIs — the in-product monitoring surfaces for deployed pipeline objects in Snowflake The products you'll ship on those surfaces dbt Projects on Snowflake (GA) — build, run, schedule, and monitor dbt natively inside Snowflake, no external orchestrator. DCM (Database Cha

At ClickUp, we're building the future of work: the first truly converged AI workspace unifying tasks, docs, chat, calendar, and enterprise search, all supercharged by context-driven AI. We are an AI-native company. Every team member is expected to leverage AI daily, and we evaluate AI fluency as part of our hiring process. Join us and help redefine what's possible. 🚀 Collaboration and partnership are vital to how ClickUp operates. A significant portion of your responsibilities will include working closely with members of the backend team and Integrations team to develop features together. Engineers at ClickUp are also responsible for the quality of their own code, so you will work with a QA counterpart to ensure all edge cases are tested. We’re scaling quickly, so we’re recruiting teammates who share our core values, know how to get sh*t done, and add to our very driven culture. You should be proficient in using one or more of the modern JavaScript frameworks (Angular//Vue/etc.) and have a strong understanding of building reusable components and developing for performance. The Role: Build features in Angular 2+ while collaborating with designers, engineers, and product Architect efficient and reusable front-end code that drive the ClickUp user experience Manage individual project priorities, deadlines and deliverables Identify and resolve performance and scalability issues Build and maintain unit and integration tests Fixing bugs fast and finding robust solutions to tackle hard problems Follow established practices for maintaining state inside ClickUp Qualifications: 8+ years working with JavaScript and one or more modern frameworks (Angular 2+ required) Experience with Redux style state management NgRx, Typescript, and RxJs HTML/CSS experience, including concepts like layout, specificity, cross browser compatibility, and accessibility A strong self-starter, operationally-focused; a problem-solver Excellent interpersonal, written, and oral communication skills You’

At ClickUp, we're building the future of work: the first truly converged AI workspace unifying tasks, docs, chat, calendar, and enterprise search, all supercharged by context-driven AI. We are an AI-native company. Every team member is expected to leverage AI daily, and we evaluate AI fluency as part of our hiring process. Join us and help redefine what's possible. 🚀 Collaboration and partnership are vital to how ClickUp operates. A significant portion of your responsibilities will include working closely with members of the backend team and Integrations team to develop features together. Engineers at ClickUp are also responsible for the quality of their own code, so you will work with a QA counterpart to ensure all edge cases are tested. We’re scaling quickly, so we’re recruiting teammates who share our core values, know how to get sh*t done, and add to our very driven culture. You should be proficient in using one or more of the modern JavaScript frameworks (Angular//Vue/etc.) and have a strong understanding of building reusable components and developing for performance. The Role: Build features in Angular 2+ while collaborating with designers, engineers, and product Architect efficient and reusable front-end code that drive the ClickUp user experience Manage individual project priorities, deadlines and deliverables Identify and resolve performance and scalability issues Build and maintain unit and integration tests Fixing bugs fast and finding robust solutions to tackle hard problems Follow established practices for maintaining state inside ClickUp Qualifications: 5+ years working with JavaScript and one or more modern frameworks (Angular 2+ required) Experience with Redux style state management NgRx, Typescript, and RxJs HTML/CSS experience, including concepts like layout, specificity, cross browser compatibility, and accessibility A strong self-starter, operationally-focused; a problem-solver Excellent interpersonal, written, and oral communication skills You’

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. As a Fab Engineer at Micron Technology, Inc., you will be working with a team of other process and equipment engineers responsible for starting up, developing and optimizing processes to improve product quality and reliability, working on process yield improvement, cost reduction, productivity improvement and risk management as well as resolving manufacturing line problems. This position will identify, diagnose and resolve process related problems by applying failure analysis, FMEA, 8D or SPC methodology. Additional responsibilities include coordinating and carrying out process, equipment and material evaluation/optimization to implement changes at process step, leading and participating in yield improvement and cost reduction activities, handling new process baseline qualifications and managing, auditing and liaising with material suppliers to achieve quality, cost and risk management objectives. Drives Front-End (FE) Cost Excellence and Max Out performance by leading cross-functional programs aligned to corporate business objectives, with accountability for defining program scope, governance, methodologies, and delivery of key performance targets such as IPP goals and productivity improvements. This role establishes structured program management practices, manages dependencies, ris

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Summary Micron Technology is seeking a Principal RTL Design Engineer to lead the development of high-quality DRAM digital and mixed-signal IP. In this role, you will be responsible for the full RTL design lifecycle—from architecture and implementation through signoff—while delivering designs that meet aggressive power, performance, and area (PPA) targets. This position is in Boise, Idaho, offering strong opportunities for technical leadership, innovation, and collaboration across global teams. Responsibilities Own and drive RTL design for DRAM digital and mixed-signal IP from specification through silicon-ready signoff. Architect and deliver high-performance, power- and area-efficient RTL designs aligned with product requirements. Perform and sign off front-end quality checks, including lint, CDC/RDC, synthesis, UPF, and timing QoR. Collaborate closely with physical design, verification, and architecture teams to achieve timing closure and PPA goals. Improve design quality and efficiency by refining methodologies, driving automation, and enhancing RTL design flows. Minimum Qualifications Master’s degree in Electrical Engineering with 8+ years of experience, or Bachelor’s degree with 10+ years of pre-silicon RTL design experience. Proven ownership of complex RTL/IP development from micro-architecture definition through handoff to physical design. Strong experience with ASIC low-power d

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are building the next generation of solid‑state drive controllers at Micron, where cutting‑edge ASIC design meets high‑performance storage innovation. Our team works across the full silicon lifecycle, partnering closely with verification, physical design, and system teams to bring complex designs to life. If you enjoy solving deep technical challenges and collaborating with experts across disciplines, this is an exciting place to make an impact! In this role, you will play a key part in delivering advanced ASIC designs from concept through production silicon. You will define micro‑architectures, develop RTL, and ensure designs meet performance, timing, and quality goals. This position offers strong ownership, collaboration, and the opportunity to leverage modern AI‑assisted tools to improve engineering efficiency and quality. Responsibilities: Design, implement, and debug complex RTL logic and integrate IP into larger subsystems Support front-end design flow including lint, CDC, synthesis, and ECO activities Collaborate with SOC design, verification, STA, and physical design teams to deliver high-quality silicon Develop automation scripts to improve design efficiency and productivity Use AI-assisted tools to enhance debugging, documentation, and code quality Minimum Qualifications: MS in Electrical Engineering or equivalent e

A World-Changing Company Palantir builds the world’s leading software for data-driven decisions and operations. By bringing the right data to the people who need it, our platforms empower our partners to develop lifesaving drugs, forecast supply chain disruptions, locate missing children, and more. The Role Software Engineers at Palantir build software at scale to transform how organisations around the world use data. As a Software Engineer Intern, you’ll have an opportunity to grow more quickly than you ever envisioned, as you contribute high-quality code directly to Palantir Gotham, Palantir Foundry, or Palantir Apollo: products that are deployed at some of the most important institutions across the public and private sectors. You'll create features used by research scientists, aerospace engineers, intelligence analysts, and economic forecasters, in countries around the world. Palantir's Product Development organisation is made up of small teams of Software Engineers, each focusing on a specific aspect of a product. For example, you might join a team that builds a Foundry front-end application, or a component of the Gotham release infrastructure. We encourage communication and collaboration among teams to share context, skills, and experience, so you'll learn about many different aspects of each product. Core Responsibilities As a Software Engineer, you are involved throughout the product lifecycle - from idea generation, design, and prototyping to execution and shipping while also being paired with a mentor dedicated to your growth and success. You'll collaborate closely with technical and non-technical counterparts to understand our customers' problems and build products that tackle them. One of the most effective ways to understand what our users need is to meet them. You may receive an opportunity to tour the assembly line at an auto-manufacturer or join a counter-terror analyst at their desk to really understand their mission and difficulties. SWE

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The Firmware & Product Test (FPT) team at Micron Technology holds a pivotal role in validating firmware specifications for SSDs. The team develops comprehensive verification plans, implements them using Python, and ensures strict alignment to NVMe standards and security protocols. Validation occurs across multiple environments, including simulation, FPGA prototyping, and prototype hardware. Summary of the Role The Engineer (E4) in the Firmware & Product Testing (FPT) team supports the validation of enterprise SSD firmware through test development, automation, execution, and failure analysis. This role focuses on NVMe front-end features and customer specifications while applying Python-based automation and data-driven techniques to improve test efficiency and product quality. Working closely with firmware test engineers, senior mentors, and data scientists, the engineer gains hands-on experience at the intersection of firmware validation and AI/ML, contributing to more effective and scalable testing methodologies. Responsibilities: Develop and implement firmware verification plans for customer requirements and NVMe protocol features, including SMART, Trim, Get Log Page, and OCP Analyze regression and validation failures, perform root-cause analysis, and communicate findings and mitigation plans Develop and enhance test automation, reporting, and data-collection tools within established validation frameworks Leverage AI-assisted tools, LLMs, and agent-based solutions

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Summary Micron Technology is seeking a Principal RTL Design Engineer to lead the development of high-quality DRAM digital and mixed-signal IP. In this role, you will be responsible for the full RTL design lifecycle—from architecture and implementation through signoff—while delivering designs that meet aggressive power, performance, and area (PPA) targets. This position is in Boise, Idaho, offering strong opportunities for technical leadership, innovation, and collaboration across global teams. Responsibilities Own and drive RTL design for DRAM digital and mixed-signal IP from specification through silicon-ready signoff. Architect and deliver high-performance, power- and area-efficient RTL designs aligned with product requirements. Perform and sign off front-end quality checks, including lint, CDC/RDC, synthesis, UPF, and timing QoR. Collaborate closely with physical design, verification, and architecture teams to achieve timing closure and PPA goals. Improve design quality and efficiency by refining methodologies, driving automation, and enhancing RTL design flows. Minimum Qualifications Master’s degree in Electrical Engineering with 8+ years of experience, or Bachelor’s degree with 10+ years of pre-silicon RTL design experience. Proven ownership of complex RTL/IP development from micro-architecture definition through handoff to physical design. Strong experience with ASIC low-power design methodologies, including UPF-based power inten

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. OUR VISION To redefine the global use of information, enriching life for everyone. Micron Technology is an industry leader in memory and storage solutions, enabling the acceleration of information into actionable intelligence and fostering rapid progress in learning, communication, and technological development. Department Introduction The Firmware & Product Test (FPT) team at Micron Technology holds a pivotal role in validating firmware specifications for SSDs. The team develops comprehensive verification plans, implements them using Python, and ensures strict adherence to NVMe standards and security protocols. Testing methodologies include white-box, grey-box, and black-box approaches conducted on a module-by-module basis throughout firmware development and integration. Validation occurs across multiple environments, including simulation, FPGA prototyping, and prototype hardware. Key Responsibilities Develop and execute firmware verification plans for customer specifications and NVMe protocols used in enterprise SSDs, with emphasis on front-end features such as SMART, Trim, Get Log Page, and OCP. Design and implement grey-box, white-box, and black-box test methodologies to verify firmware functionality and robustness. Analyze failures from weekly regressions, perform root-cause analysis, and clearly document findings with guidance from senior engineers. Contribute to test development, execution, automation,

About Mixpanel Mixpanel is the leading product intelligence and analytics platform, trusted by more than 29,000 companies to help understand how people use the products they build. By combining powerful analytics with AI that knows your business, Mixpanel helps teams see what’s working, diagnose what’s not, and decide what to build next. Learn more at mixpanel.com . About the DevInfra Team The DevInfra team is Mixpanel’s platform engineering team. Our mission is to be a force multiplier for Mixpanel engineering as a whole. We achieve this by partnering with our engineering teams to build a world-class software development life cycle together. About the Role We are looking for an engineer with a strong track record of solving tooling pain points, automating away toil, and helping teams deliver software faster, more safely, and more reliably. Someone who is energized by supporting their fellow engineers. An engineer who has good taste and leverages AI to great effect without generating slop. Frequent forays into uncharted territory requires our team to be highly adaptable and always ready to learn. We serve as trailblazers for the rest of Mixpanel engineering. Responsibilities We partner with a wide variety of teams to build out their software development lifecycle to be optimized for speed, safety, and reliability. We support teams writing front-end UI code as well as teams maintaining our highly stateful storage systems deep in our stack. We are responsible for deploying AI tools like Claude Code to our entire engineering team. We are building agents into our platform to do things like augment on-call response and automatically one-shot bugs that come through a team’s triage queue. We support systems that ingest more than 1 Trillion user-generated events every month while balancing low end-to-end query latency. Mixpanel queries typically scan more than 1 Quadrillion events over the span of a month. More details in this blog post . Mixpanel runs entirely on Google Cl

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Summary Micron is seeking a Senior Digital Design Engineer to contribute to the development of advanced DRAM digital and mixed-signal blocks. This role is responsible for RTL design, implementation, synthesis, timing analysis, power optimization, and design quality throughout the RTL-to-GDS flow. The engineer will collaborate with architecture, verification, and physical design teams to deliver high-performance, power-efficient designs that meet product specifications and PPA (Power, Performance, Area) objectives for next-generation memory products. Responsibilities Design, develop, and deliver RTL for complex DRAM digital and mixed-signal blocks, ensuring alignment with product specifications and performance targets. Perform front-end design quality checks including linting, CDC/RDC analysis, logic synthesis, timing constraint development, and timing closure activities. Collaborate with architecture, verification, and physical design teams to optimize power, performance, area (PPA), and overall design quality. Develop and maintain synthesis and timing constraints (SDC), analyze timing reports, and drive timing closure across multiple operating scenarios. Improve design methodologies, automation, and RTL-to-GDS flows to enhance development efficiency, design quality, and time-to-market. Minimum Qualifications Master’s degree in Electrical Engineering (or equivalent) with 4+ years of experience, or Bachelor’s degree with 5+ years

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. ***This position is located in our Tel -Aviv Office (ToHa Building, near HaShalom train station) *** Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Summary Micron Technology seeks an RTL design engineer to develop digital blocks from specification through RTL implementation with strong emphasis on power-efficient, implementation-aware building. In this role, you will work hands-on with synthesis and timing/power analysis tools to develop power, performance, and area (PPA) trade-offs. You will collaborate with multi-functional teams to improve the quality of advanced flash memory products. Responsibilities Develop and implement RTL for digital and mixed-signal blocks using System Verilog. Perform front-end quality checks including lint, CDC/RDC, synthesis, UPF, and timing QoR. Design power- and area-efficient RTL with a focus on reducing switching activity, clock power, and leakage. Complete RTL- and gate-level power and timing evaluation to identify and resolve PPA bottlenecks. Collaborate with verification, synthesis, and physical design teams to achieve timing closure and design targets. Minimum Qualifications Bachelor’s degree wi

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Summary Micron is seeking a Senior Digital Design Engineer to contribute to the development of advanced DRAM digital and mixed-signal blocks. This role is responsible for RTL design, implementation, synthesis, timing analysis, power optimization, and design quality throughout the RTL-to-GDS flow. The engineer will collaborate with architecture, verification, and physical design teams to deliver high-performance, power-efficient designs that meet product specifications and PPA (Power, Performance, Area) objectives for next-generation memory products. Responsibilities Design, develop, and deliver RTL for complex DRAM digital and mixed-signal blocks, ensuring alignment with product specifications and performance targets. Perform front-end design quality checks including linting, CDC/RDC analysis, logic synthesis, timing constraint development, and timing closure activities. Collaborate with architecture, verification, and physical design teams to optimize power, performance, area (PPA), and overall design quality. Develop and maintain synthesis and timing constraints (SDC), analyze timing reports, and drive timing closure across multiple operating scenarios. Improve design methodologies, automation, and RTL-to-GDS flows to enhance development efficiency, design quality, and time-to-market. Minimum Qualifications Master’s degree in Electrical Engineering (or equivalent) with 4+ years of experience, or Bachelor’s degree with 5+ years