Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate, and advance faster than ever. Micron’s MaskTech department is responsible for reticle data preparation and mask-related technologies that enable advanced semiconductor manufacturing. The team partners closely with Design, Process Integration, Mask Development, Scribe, Lithography, Tapeout Operations, Mask Shops, and Manufacturing Fabs to ensure successful tapeout execution and high-quality wafer patterning. As an Optical Proximity Correction (OPC) Engineer, you will process reticle design data through OPC to ensure designs are accurately transferred to silicon during photolithography. You will also develop and improve processes, automated verification methods, and systems that support tapeout operations while collaborating with global teams across the United States, Japan, and India to drive operational excellence and continuous improvement. Responsibilities Drive OPC job deck development, process flow execution, and recipe optimization to support production and R&D tapeouts. Collaborate with teams from multiple functions to develop new OPC flows, implement best-known methods (BKMs), and resolve manufacturing challenges. Analyze and troubleshoot OPC process issues, maintaining high-quality work to support a stable production environment. Develop automation, scripts, and process improvement
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Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. High-bandwidth memory (HBM) is an innovative memory solution that uses 3D stacking of DRAM for fast speeds, expansive bandwidth and low power per transaction. HBM is primary solution for AI applications. As a Micron Global Quality FE Central (Senior) QE Product Engineer, you will be a member of the worldwide quality team, responsible for driving quality and reliability initiatives into FE MFG network for high bandwidth memory (HBM) product for critical customer AI applications. You will work closely with PE/GQ QRA/FE fab teams and Central PIE to establish BKMs, set up program with line of sight metric, develop a strategy and closely work on execution to achieve program milestones for customer field DPM excellence. You will also work with smart manufacturing AI team for automation and AI solution development and deployment to continue helping HBM quality management with AI transformation. Responsibilities and Tasks: <
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Role and Responsibilities Responsible for layout design and development of critical analog, mixed-signal, custom digital block, standard cells and full chip level. Perform layout verification like LVS, DRC, Antenna, Shield, Matching, Latch up, EM IR Totem checks, quality check and documentation. Responsible for development of digital block layouts using auto placement and route tools Responsible for basic understanding of skill coding and automation Responsible for on-time delivery of block-level layouts with acceptable quality. Demonstrate leadership skill in planning, area/time estimation, scheduling, delegation and execution to meet project schedule/achievements in multiple project environment. Guide developing team members in their execution of Sub block-level layouts & review their work Contribute to effective project-management. Effectively communicating with Global engineering teams to assure the success of layout project. Responsible for the reducing the layout effort by using AI tools Qualification/Requirements 5 to 8-year experience in analog/custom layout design in advanced CMOS process. Expertise in Cadence VLE/VXL and Mentor Graphic Calibre DRC/LVS is a must. Should have hands on experience in creating layout of cr
Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. As a Spare s Engineering Engineer, you will: Be a key driver in executing and managing programs within the Spare Engineering function — spanning both Spares Initiatives for Cost, Productivity, Quality and T est W afer management . You will work in a fast-paced semiconductor environment, applying your technical expertise and program management skills to optimize efficiency, control test wafer utilization , align with demand, and deliver measurable results — all while collaborating across global teams and Sites Responsibilities Spares Engineering Lead and execute spare s engineering
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Engineering Program Manager with proven experience leading ASIC/SoC development programs, responsible for coordinating multi-functional deliverables across Micron. The role requires end‑to‑end ownership of ASIC development—from architecture and RTL through verification, PnR, integration, and silicon validation—along with strong project planning skills in estimation, scheduling, and milestone dependency management. Job requirements: BS/BEE in Electrical or Electronics Engineering with 7+ years of experience. Experience in ASIC/SoC design and development programs. Proven track record of delivering ASIC products end‑to‑end. Strong understanding of the ASIC design flow. Experience driving risk management, change control, and development reviews. Familiarity with ISO 9001 requirements; experience with FuSa and ISO 26262 is encouraged. Experience coordinating programs across multiple, global organizations. Strong proficiency with program/project management tools. Apply AI-enabled engineering tools Job Function: Responsible for end‑to‑end program execution of semiconductor devices, ensuring schedule, power, and cost targets are met. Drive risk management, change control, development reviews, and compliance with ASIC development processes. Regularly report to senior management on key achieve
Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Welcome to Micron's Advanced NAND Process Pathfinding Team — where the next generation of memory technology is developed. We operate at the groundbreaking forefront of semiconductor innovation, engineering world-class memory solutions built for uncompromising performance. If you're ready to redefine what's possible in NAND process technology, we'd love you on this journey with us. As a Principal Engineer / Member of Technical Staff (MTS) – Thin Films, you'll spearhead groundbreaking initiatives alongside some of the industry's most accomplished technologists. Your mission: architect and deploy next-generation thin film fabrication methods that keep Micron ahead of the global competition. This is a role for a technical leader who thrives on solving the toughest challenges in materials, deposition, and device integration. Responsibilities: Advance thin film process development to meet demanding structural, electrical, and reliability targets across the NAND roadmap. Lead the creation of thin films for next-generation NAND cells, including dielectric, conductive, interface, and charge-storage layers. Explore new materials, precursor chemistries, and deposition techniques to unlock future sca
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Responsibilities: Lead process integration (PI) structural uniformity and cross‑loop integration for critical modules (e.g., capacitance loop), owning end‑to‑end integration strategies to resolve yield, quality, and reliability gaps. Drive physics‑ and process‑based integration solutions through close collaboration with cross‑module process owners, PI subject‑matter experts, and key suppliers to optimize integration structures and achieve BIC yield and quality targets . Develop and apply model‑based root cause analysis frameworks (transport, reaction kinetics, pattern density, and geometry‑dependent effects) to diagnose structural non‑uniformity. Define, implement, and continuously strengthen critical inline monitoring and defense lines (CD, film loss, mass delta, defectivity, edge/periphery metrics) to ensure robust control of structural uniformity. Own and advance product integration programs and loop‑level domain expertise , maintaining deep technical knowledge across node transitions. Proactively drive node‑over‑node “shift‑left” integration , including early implementation of uniformity, bevel, and backside best‑known‑methods (BKMs) during development phases to accelerate whole‑wafer (center‑to‑edge) yield and quality ramp. Drive worldwide technical alignment and execution excellence by leading global projects, standardizing and leveraging network BKMs, and scaling proven solutions across sites. Identify efficiency and perfo
Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. As a Fab Engineer at Micron Technology, Inc., you will be working with a team of other process and equipment engineers responsible for starting up, developing and optimizing processes to improve product quality and reliability, working on process yield improvement, cost reduction, productivity improvement and risk management as well as resolving manufacturing line problems. This position will identify, diagnose and resolve process related problems by applying failure analysis, FMEA, 8D or SPC methodology. Additional responsibilities include coordinating and carrying out process, equipment and material evaluation/optimization to implement changes at process step, leading and participating in yield improvement and cost reduction activities, handling new process baseline qualifications and managing, auditing and liaising with material suppliers to achieve quality, cost and risk management objectives. Responsibilities Strategize and lead productivity, yield, quality, and cost improvement engagements with global sites and the network team via plasma process optimization, new/FOAK chemistry & hardware qualification , and CIP development collaboration with dry etch suppliers. Collaborate with cross-functional teams to drive breakthroughs in def
A World-Changing Company Palantir builds the world’s leading software for data-driven decisions and operations. By bringing the right data to the people who need it, our platforms empower our partners to develop lifesaving drugs, forecast supply chain disruptions, locate missing children, and more. The Role The Forward Deployed Software Engineer Internship Forward Deployed Engineering is a radical commitment to the outcome. This is Palantir’s operating ethos. We pioneered this unique position, embedding engineers directly with our customers to tackle their most pressing challenges head-on. As an FDE, you’ll be at the intersection of world-changing problems and impactful technology, shaping solutions where they matter most. From hospital beds to factory floors, Forward Deployed Engineers (FDEs) embed themselves in the customer’s reality until the problem is theirs. This requires walking many miles in a customer’s shoes, building past the perimeter of what the product currently offers, and deviating from every pre-existing formula to solve the problem. Whether that problem is “How do we predict and mitigate wildfire risks across a power grid?” or “How can we analyze and adapt a global supply chain to deliver critical parts on time?”, you’ll use your technical expertise, creativity, and problem-solving skills to drive real-world impact. Core Responsibilities To solve mission-critical problems by deploying software and AI into the high stakes operations of the world’s leading institutions. This requires a ruthless commitment to truth-seeking and prioritizing real outcomes. The work is difficult. The stakes are real. You will work in small, high-trust teams and own projects end-to-end, from the first conversation with a customer, to shipping the product that changes how they operate. You will embed with the customer, the chaos, and the consequences, and will be entrusted with real ownership to: Collaborate with engineers to make architecture and design
A World-Changing Company Palantir builds the world’s leading software for data-driven decisions and operations. By bringing the right data to the people who need it, our platforms empower our partners to develop lifesaving drugs, forecast supply chain disruptions, locate missing children, and more. The Role Forward Deployed Engineering is a radical commitment to the outcome. This is Palantir’s operating ethos. We pioneered this unique position, embedding engineers directly with our customers to tackle their most pressing challenges head-on. As an FDE, you’ll be at the intersection of world-changing problems and impactful technology, shaping solutions where they matter most. From hospital beds to factory floors, Forward Deployed Engineers (FDEs) embed themselves in the customer’s reality until the problem is theirs. This requires walking many miles in a customer’s shoes, building past the perimeter of what the product currently offers, and deviating from every pre-existing formula to solve the problem. Whether that problem is “How do we predict and mitigate wildfire risks across a power grid?” or “How can we analyze and adapt a global supply chain to deliver critical parts on time?” You’ll use your technical expertise, creativity, and problem-solving skills to drive real-world impact. Core Responsibilities To solve mission-critical problems by deploying software and AI into the high stakes operations of the world’s leading institutions. This requires a ruthless commitment to truth-seeking and prioritizing real outcomes. The work is difficult. The stakes are real. You will work in small, high-trust teams and own projects end-to-end, from the first conversation with a customer, to shipping the product that changes how they operate. You will embed with the customer, the chaos, and the consequences, and will be entrusted with real ownership to: Collaborate with engineers to make architecture and design decisions Wrestle with data at a scale that breaks assu
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Site Manager Support the site to mitigate risks on their priorities by mobilizing the relevant Central Teams SME to support. Divide and conquer efforts within Central Functions teams at your site to resolve issues quickly. Help the site meet targets on MAE programs across all pillar programs. Attend Site Weekly Metrics review to identify gaps to site priorities. Arrange quarterly engagement sessions between MAE & Site Leaders. Participate in local supplier engagement sessions, eg. QBR, etc. Look into the team resourcing for site priorities and pillar programs. Look into the well-being and help facilitate the career growth of Team Members reporting to you. Equipment Performance Ensure sustenance of the TPM program at your site. Support the development of methodologies to improve %UD/SD performance globally. Design Tier 2/3 matrices to improve %UD/SD. Develop suitable global reports for sites to benchmark against each other on %UD/SD Design and implement a process to improve workstations MOR %UTIL through %MA & Lost time improvement. Study the wafer path taken in critical workstations. Identify key data that needs to be extracted from the tool EDA system to map the time taken to complete wafer processing. Collaborate with SMAI to build a system to compare the wafer
Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. As a Process Integration Module Engineer in the Central Process Integration department, you will be responsible for coordinating improvements in Yield, Quality, and Output for DRAM/NAND process and production line. Day-to-day responsibilities include but not limit to collaborating with network PI/YE/PQA/PEE teams to craft and analyze process experiments, to achieve best-in-class (BIC) yield and quality to establish documented best-known methods (BKMs) Responsibilities and Tasks Collaborate with multi-functional network teams from PIE, Process & Equipment Engineering, WLR, TD to improve product yields and reliability within your assigned process loop. May require travel to global Micron sites to foster collaboration and drive execution. Communicate module related issues to the Fab engineering and leadership teams. Design, execute, and analyze experiments to improve fab process, yield, and quality. Collect and interpret complex data to optimize Fab processes and increase yields. Engage and/or lead cross-area engineering teams to tackle process issues. Work closely with global partners to stay ahead of on module related topics and process alignment projects. Collaborate with oth
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Summary The Frontend Central Product Integration Engineering and Transformation (CPIE) team drives innovation across semiconductor manufacturing by identifying opportunities to improve yield, quality, process capability, and operational efficiency. The team collaborates with engineering, manufacturing, data science, and quality organizations to develop and deploy scalable solutions that accelerate technology development and deliver industry-leading results! Position Overview As a Product Integration Engineer on the CPIE team, you will lead initiatives that improve process capability, maximize bits per wafer, and accelerate yield improvement through data-driven innovation. You will partner with cross-functional teams to identify opportunities, develop advanced analytics solutions, and implement improvements that enhance product quality and manufacturing performance. This role offers the opportunity to influence next-generation technologies while delivering measurable business impact across Micron's global manufacturing network. Responsibilities Identify and develop data-driven solutions that improve yield, product quality, and process integration performance Analyze manufacturing, test, and design data to uncover opportunities that increase high-value bits per wafer Develop models to evaluate equipment and process performance and support predictive process optimization initiatives Partner with process, equipment, manufacturing, and data science teams t
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. For more than 45 years, Micron Technology, Inc. has redefined innovation with the world’s most advanced memory and semiconductor technologies. We’re an international team of visionaries and scientists, developing groundbreaking technologies that are transforming how the world uses information to enrich life. We are looking for Layout Design engineer at our Micron Technology’s HBM Team in Hyderabad, India. As a Layout Design engineer, you will be working for intensive applications such as artificial intelligence and high performance computing solution, High Bandwidth Memory. As a Layout Design Engineer you will be collaborating with peer teams crossing Micron global footprint, in a multiple projects-based environment. Role and Responsibilities • Responsible for Design and development of critical analog, mixed-signal, custom digital block and full chip level integration support. • Highly motivated with passion, detail oriented, systematic and methodical approach in IC layout design • Perform layout verification like LVS/DRC/Antenna, quality check and documentation. • Responsible for on-time delivery of block-level layouts with acceptable quality. • Demonstrate leadership Skill in planning, area/time estimation, scheduling, delegation and execution to meet project schedule/milestones in multiple project environment. • Guide junior team-members in their execu
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. For more than 45 years, Micron Technology, Inc. has redefined innovation with the world’s most advanced memory and semiconductor technologies. We’re an international team of visionaries and scientists, developing groundbreaking technologies that are transforming how the world uses information to enrich life. As a Principal/MTS Engineer, you will be an integral part of our HIG HBM Team in Hyderabad, India, responsible for designing and developing complex Application-Specific Integrated Circuits to meet our product's specifications and requirements for High Bandwidth Memories, working for intensive applications such as artificial intelligence and high performance computing solution. Your expertise will contribute to the successful realization of pioneering semiconductor products, enabling our company to maintain its competitive edge in the industry. Role and Responsibilities Must have a solid understanding of die design . This includes knowledge of various die components, their functions, and how they interact within the overall tool. Familiarity with the principles of die design is essential to create effective and efficient layouts. Industry Involvement : You actively participate in standards committees, representing Micron and staying informed about industry developments. Leading Project Layout Team : You lead the establishment and growth of a layout team to meet Micron’s global HBM layout requirements. Technical Expertis
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