Hardware Operations Engineer Jobs

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. MTS, Interface Pathfinding Hardware Development Engineer About the Role At Micron, our vision is to transform how the world uses information to enrich life for all. As a global leader in memory and storage innovation, we develop technologies that accelerate intelligence and enable the next generation of high-speed interfaces. Micron’s Interface Pathfinding team drives performance-scaling innovation across circuits, signaling, packaging, and interconnects with a 3–5 year technology horizon. As the Interface Pathfinding Hardware Development Engineer , you will own characterization for a high-speed interface test-chip program: the characterization plan and its success criteria, development of the characterization bench hardware and its automation, the measurement-uncertainty budget, and the correlation report proving the silicon matches the models. You will join a small, senior team spanning analog design, layout, digital design, and verification, working closely with the Chip Lead and the Signal Integrity and Physical Design engineers — driving decisions independently while consulting heavily with other experts across Micron. This is a foundational hire for a growing program. Strong execution early is expected to lead to follow-on projects of increasing scope, team size, and characterization complexity — including an expanding mandate for AI-enabled engineering leadership across the organization. What You’ll Own Characterization Planning • Derive the electr

Prin. Systems Hardware Engineer — 2 Locations. Apply via Workday.

Buyer, Hardware & Utility — 1000 Nicollet Mall, Minneapolis,MN 55403-2542. Apply via Workday.

About the Team OpenAI's Legal team plays a crucial role in furthering OpenAI's mission by tackling innovative, fundamental legal issues in AI. If you're passionate about doing significant and unique work as a technology lawyer, this team is for you. The team comprises legal professionals from diverse fields, including technology, privacy, IP, corporate, cybersecurity, employment, tax, regulatory, and litigation. About the Role We’re growing our world-class Legal team and seek an experienced counsel to lead our global hardware IP portfolio initiatives, including patent, trademark and other intellectual property matters related to our business. This role is highly cross-functional across OpenAI, including work across our Legal, Communications, Global Affairs, Product, Research and Executive teams. This role is based in San Francisco, CA. We use a hybrid work model of 3 days in the office per week and offer relocation assistance to new employees. In this role, you will: Own global hardware IP initiatives, including setting and executing on the strategic direction and management of our hardware IP portfolio. Create scalable processes internally and externally with outside counsel to build, maintain and protect our hardware IP portfolio. Developing and maintaining internal hardware IP policies and programs. Engaging externally on hardware IP policy issues. Advising on strategic hardware IP deals. Advising on hardware IP issues, ranging from patent, trademark, trade secret to open source. Developing and building internal AI expertise, processes and tools to facilitate legal team work. Experience advising on complex technology transactions and inbound technology licensing. You might thrive in this role if you: Have at least 10+ years of combined hardware IP experience at innovative technology companies and law firms. Have a JD and license or qualification to practice in CA. Have a strong sense of ownership, are inquisitive and enthusiastic about technology, enjoy being con

Senior Product Specialist (Vessel Sealing, Hardware and Electrosurgery) — Sao Paulo, Sao Paulo, Brazil. Apply via Workday.

Citi's Equity Research team is looking for an Associate with strong financial fundamentals, intellectual curiosity and a genuine interest in investing. You’ll develop company expertise, financial modeling skills, and investment insights while covering one of the most dynamic sectors in the global market. Previous experience covering the Technology sector is not required, we welcome candidates from other industries who are excited to learn and transition into areas such as Semis, Networking, Hardware, Quantum and other technology subsectors. Responsibilities Support senior analysts in researching companies across the Technology & Communications sector. Build and maintain financial models, valuation analyses, and earnings forecasts. Analyze company financial statements, industry trends, competitive positioning, and market developments. Assist with writing research reports, earnings previews and recaps, thematic reports, and investment recommendations. Participate in earnings calls, company meetings, industry conferences, and investor events. Monitor news flow, financial results, and industry developments to identify investment opportunities and risks. Prepare presentation materials and research supporting client discussions. Collaborate closely with senior analysts while developing deeper sector expertise and research skills. Contribute to a collaborative team environment while maintaining high standards of accuracy, integrity, and professional Required Qualifications & Skills 2 to 3 years of experience in Equity Research, Investment Banking, Corporate Finance, Asset Management, Valuation, or another financial markets-related role. Strong understanding of financial statements, accounting fundamentals, and corporate finance. Experience building financial models and performing com

Overview: The Insights product is an offering for Guidepoint's institutional investment and corporate clients, now in its 9 th year, that offers teleconferences, surveys, in-person events, and AI-facilitated data and content. The teleconferences live in an online library portal, which covers a wide of industries/topics that enables our clients to make informed decisions. All content features experts from Guidepoint’s proprietary global network and is conceptualized and hosted by former investment professionals (i.e. hedge fund analysts), sell-side equity research analysts, and industry professionals. This is a hybrid position based in our New York City office. What you'll do: Monitor a coverage universe of public companies within the global hardware and semiconductor sector by tracking earnings releases, investor presentations, SEC filings, sell-side research and industry news. Create and moderate teleconferences on timely topics featuring an expert from Guidepoint’s network with the goal of producing actionable insights for clients. Attend industry conferences to host client panels What you have: Bachelor’s degree or Master’s degree Minimum 10 years of sell-side or buy-side analyst experience Must follow bottoms-up, fundamental approach to investment research focusing on individual companies Has covered the Hardware and Semiconductor sector; candidates must be current on company/industry knowledge Ability to work in a fast-paced entrepreneurial environment Outgoing personality with the ability to speak with people at all professional levels Intellectual curiosity and desire to learn Effective time management and organizational skills Demonstrated ability to work both individually and as part of a team What We Offer: The annual salary range for this position is $210,000-$230,000. Additionally, this position is eligible for an annual discretionary bonus based on performance. You will also be eligible for the following benefits: 15

EnCharge AI is a leader in advanced AI hardware and software systems for edge-to-cloud computing. EnCharge’s robust and scalable next-generation in-memory computing technology provides orders-of-magnitude higher compute efficiency and density compared to today’s best-in-class solutions. The high-performance architecture is coupled with seamless software integration and will enable the immense potential of AI to be accessible in power, energy, and space constrained applications. EnCharge AI launched in 2022 and is led by veteran technologists with backgrounds in semiconductor design and AI systems. Lead DFT Engineer Job Description: Developing silicon for edge-to-cloud computing isn't just about speed; it’s about balancing high-performance data processing with extreme power efficiency and reliability in remote environments. As the Design for Test (DFT) Lead, you will be the architect of our testing strategy, ensuring our data center chips are flawlessly manufacturable and resilient enough for edge deployment. Key Responsibilities: Architectural Leadership: Define and implement the end-to-end DFT architecture for complex SoCs, including Hierarchical DFT, Scan compression, Boundary Scan and MBIST. Edge-Specific Reliability: Develop strategies for In-System Test (IST) and power-on self-test (POST) to ensure chip health in remote edge data centers. Implementation & Flow: Oversee scan insertion, ATPG (Stuck-at, Transition, Path Delay), and Memory /Logic BIST. Cross-Functional Synergy: Collaborate with Design, Physical Design, and Yield teams to ensure high test coverage while minimizing area overhead and power impact as well as timing analysis . Post-Silicon Validation: Lead the bring-up and debug phase on ATE (Automated Test Equipment) to root-cause silicon failures and optimize test time. Technical Requirements: Experience: 12+ years in DFT, with at least 2 years in a leadership or principal role. Bachelor’s degree in a related field. Tools:

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Our Tensix team is building custom AI compute cores, RISC-V CPUs, and chiplet-based architectures for datacenter, edge, and automotive AI. Design Verification Engineers on this team validate compute IP and subsystems and build scalable DV infrastructure to keep verification fast, automated, and production-grade. This role is hybrid, based out of Toronto, ON, Austin, TX or Belgrade, Serbia. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are Experienced in modern verification methodologies with strong SystemVerilog skills and exposure to structured testbench development. Comfortable working from block-level to system-level verification and reasoning about microarchitecture behavior from specs and waveforms. Proficient in Linux environments with Python, or Bash scripting for automate builds, parse logs, manage CI pipelines. Skilled in coverage-driven verification and confident debugging across RTL, testbench, and workload scenarios. Motivated by AI hardware and eager to learn verification strategies for new architectures and domains. What We Need Contribute to verification of Tensix IP and subsystems from early planning through tape-out, owning cov

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent licenses RISC-V and AI IP to customers who need hardened, PPA-proven deliverables on their target node and foundry. This role owns physical implementation of those IP blocks end to end, from synthesis through PnR, timing closure, and GDSII signoff, and directly determines how fast we can commit to a customer's timeline. This role is hybrid, based out of Toronto, ON; Austin, TX; or Belgrade, Serbia. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are A hands-on physical design engineer who owns blocks end to end, with a track record of block-level and IP tapeouts on advanced nodes. Driven by PPA outcomes, working closely with RTL owners to close critical paths and hit power budgets. Rigorous about signoff quality, because our IP ships to customers who integrate it without you in the room. What We Need BS/MS/PhD in EE/ECE/CE/CS with 5+ years of block-level or IP-centric physical design through tapeout. Expertise with industry-standard tools (Innovus, ICC2/FusionCompiler, PrimeTime) and scripting languages (Tcl, Python, Perl). Deep understanding of advanced node challenges, low-power design (UPF, power gating, multi-Vt, voltage sc

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Our Tensix Team is building the next generation of high-performance AI compute systems. We’re looking for a Power Architect to drive architectural strategy, modeling, and design decisions that shape how power is understood and optimized across our products. This is a hands-on role with massive influence over how we build power-aware systems from the ground up. This role is hybrid, based out of Santa Clara, CA, Boston, MA, Austin, TX or Toronto. We welcome candidates at various experience levels. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are 15+ years experience with power estimation tools like PowerArtist, PtPX, RTL Architect, and PrimePower. Skilled in modeling and optimizing power at the architectural level, with deep knowledge of power-gating, voltage domains, and leakage control. Track record of influencing architectural and micro-architectural changes that meaningfully reduced design power. Proficient in Verilog HDL, Design Compiler, C/C++ and Python. Background in power-optimization of compute datapath and/or interconnects. What We Need Predict power consumption early in architecture and track it through RTL evolution. Propose architectural changes for power optimization across server and non-

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Our Tensix Team is building the future of AI compute with a ground-up architecture centered on scalable RISC-V processors. As we push performance boundaries, we’re reimagining the frontend of our RISC-V cores to deliver major gains in programmability, efficiency, and developer experience. This is a rare opportunity to shape the CPU architecture at the heart of our AI platform and lead one of the most strategic technical efforts at Tenstorrent. This role is hybrid, based out of Toronto, ON, Austin, TX or Santa Clara, CA. We welcome candidates at various experience levels. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are Experienced Microarchitect: 10+ years of deep expertise in CPU performance modeling and microarchitecture design. AI Workload Expert: Deeply familiar with the computational and memory bottlenecks of modern AI workloads, particularly Large Language Models (LLMs). Hardware-Software Co-Designer: Driven to architect custom instruction set extensions and validate their performance gains against real-world workloads. Ways to stand-out: Familiarity with open-source RISC-V cores, AI-based agentic workflow experience What We Need Profile & Analyze: Dissect cutting-edge AI workloads to identi

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Our IP delivery timelines are set as much by flow maturity as by design work. This role develops, deploys, and owns the RTL-to-GDSII methodology the IP physical design team runs on, so a new block, node, or customer variant starts from a working flow instead of a cold start. This role is hybrid, based out of Toronto, ON; Austin, TX, or Belgrade, Serbia. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are A physical design or CAD methodology engineer who has built flows that production teams depend on daily. Automation-minded, happiest when you are removing manual steps and making PPA exploration repeatable. Building with AI as part of how you develop flows, and opinionated about where LLMs and ML-driven optimization genuinely help versus where they do not. An effective partner to design teams and EDA vendors, and a clear writer who documents flows well enough that others can run them without you. What We Need An Engineer with 5+ years developing and supporting physical design methodology or CAD flows in production use. Expertise with industry-standard tools (FusionCompiler/ICC2, Innovus/Genus, PrimeTime, RedHawk) and scripting languages (T

Who We Are Nuro believes self-driving vehicles are the most immediate and profound opportunity for AI to drive positive change in the physical world. Safer streets, more time for what matters, and easier access to the world around us, that’s why we’re building a universal autonomy platform: self-driving for all roads and all rides. Founded in 2016, Nuro is a physical AI company developing Level 4 autonomous driving technology for a wide range of vehicles, use cases, and markets. Powered by the Nuro Driver™, our universal autonomy platform enables the global mobility ecosystem to deploy autonomy at scale, from robotaxis and logistics fleets to personal vehicles. With years of real-world deployment experience and a flexible, partner-led business model, Nuro is working toward a future where millions of autonomous vehicles powered by our technology help make everyday life safer, easier, and more connected. Nuro has raised over $2B in capital from Uber, NVIDIA, Google, Softbank, Fidelity, T. Rowe Price, and other leading investors. About the Team Our hardware team is growing and we are looking for a Senior Electrical Engineer to help lead our programs in our mission to better everyday life through robotics. The EE Modules team is a motivated group with a deep commitment to safety, performance, and reliability, which we apply to all of our projects and programs. About the Role As a Senior Electrical Engineer, you will help lead a talented cross functional team through full product lifecycles and engagement models ranging from in-house design to ODM and Tier1 projects with domestic and international partners. Our designs include sensors, vehicle controls, bleeding edge AI powered compute and anything our teams need in our journey toward a driverless world. About the Work Champion the specification, development, validation, and deployment of state-of-the-art AI hardware in Nuro's self-driving stack and support infrastructure. Drive module and system level electrical design

Chez Lyft, notre mission est de servir et de connecter. Nous y parvenons en favorisant un environnement de travail où chacun trouve sa place et a la possibilité de s'épanouir. Lyft connecte les gens aux transports pour transformer notre façon de vivre et de nous déplacer dans nos communautés. Solution Urbaines de Lyft (LUS) est le leader nord-américain de la micromobilité. Nous possédons, exploitons ou fournissons des solutions matérielles et logicielles pour les programmes de vélos et de trottinettes en libre-service dans plus de 57 marchés à travers le monde, notamment à Montréal, Londres, New York, Mexico et bien d'autres villes. Notre flotte en pleine expansion comprend des stations de recharge ultramodernes, des vélos et des trottinettes électriques, et assure des centaines de millions de trajets par an. L'équipe de conception de produits matériels et industriels de LUS est chargée de concevoir, de piloter le développement, de lancer et de maintenir des produits de pointe utilisés par les usagers, les villes et les opérateurs du monde entier. Nous représentons LUS lors des forums de micromobilité, interagissons directement avec les clients et orientons la recherche et le développement. Notre objectif est de garantir que tous les produits que nous développons offrent une expérience utilisateur optimale, soient compétitifs à l'échelle mondiale, élégants et tournés vers l'avenir. Nous recherchons un chef de produit matériel senior exceptionnel pour gérer notre portefeuille de stations existantes et développer la prochaine génération de produits. Nos stations sont aujourd'hui aussi emblématiques du paysage urbain que les anciens bus Routemaster londoniens. Vous serez responsable de l'ensemble du processus de développement des nouvelles stations, en pilotant une équipe pluridisciplinaire à chaque étape, du développement matériel au lancement. Vous gérerez également un parc de plus de 300 000 stations, avec ou sans chargeur, déjà déployées. Vous collaborerez directem