Hardware Software Codesign Engineer Jobs

About the Team OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform. About the Role OpenAI's Hardware organization builds supercompute platforms from silicon and boards to full rack-scale systems to power advanced AI workloads. This role owns end-to-end quality for high-speed interconnect hardware across the product lifecycle: early design influence, supplier/contract manufacturer readiness, qualification, ramp, and fleet quality in lab and data center environments. You will be the quality lead for advanced interconnect components and assemblies, including high-speed copper cables, cable cartridges, patch panels, backplane/cable-backplane solutions, high-speed connectors, and related electro-mechanical interfaces. You will partner closely with electrical, mechanical, SI/PI, systems, reliability, operations, and external vendors to prevent escapes and drive rapid, data-driven containment and corrective action. In this role you will: Own quality for advanced interconnect components and assemblies: high-speed connectors, high-speed copper cables, cable cartridges (e.g., cable cassette style assemblies), patch panels & optics, and backplane/cable-backplane interconnect solutions. Drive quality-by-design: participate in design reviews, DFM/DFx, tolerance stacks, material and plating selections, connector mating strategy, strain relief, and assembly methods to reduce variation and field failures. Define and track quality and reliability metrics (DPPM, yield, escapes, RMA/FRACAS trends, Cpk/Ppk where applicable) for interconnects across NPI and m

About the Team OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform. About the Role We are seeking a Operations Program Manager (OPM) to serve as the single-threaded operational leader for new hardware introductions (NPI) and production ramps across OpenAI’s AI infrastructure systems. This role combines hands-on execution with strategic ownership. You will be responsible for defining the operating model, aligning cross-functional stakeholders, setting the critical path, making informed tradeoffs, escalating decisively, and ensuring hardware programs deliver on schedule, quality, cost, and scalability. Success in this role requires comfort operating in ambiguity, influencing without authority, and driving alignment across internal teams and external partners—while keeping eyes firmly on long-term system scalability and repeatability. In this role, you will: Strategic & Leadership Ownership Act as the single-threaded owner for operational readiness across NPI and ramp, accountable for outcomes from early bring-up through sustained production Translate OpenAI’s infrastructure strategy and engineering objectives into clear operating plans, execution priorities, and decision frameworks Drive alignment across Engineering, Operations, Strategic Sourcing, Finance, Capacity Planning, and Executive stakeholders by framing tradeoffs, risks, and recommendations Proactively identify inflection points where decisions or investments are required to protect long-term scale, reliability, or cost targets Influence operational strategy with manufacturing par

About the Team OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform. About the Role We’re looking for signal integrity (SI) system design engineers who have a deep expertise in the SI area, and hold strong system level design knowledge This role is based in San Francisco, CA. We use a hybrid work model of 3 days in the office per week and offer relocation assistance to new employees. In this role, you will: Lead system signal integrity (SI) design for AI supercomputer product in the data center application. Collaborate with chip, package, boards, rack and system engineers, design partners to drive system SI design and develop innovative interconnect and high-speed technologies Identify and evaluate new technologies and methodologies to improve signal and power integrity in product design, and contribute to the development of new products and technology by providing expertise in signal integrity Perform simulation and modeling to identify and troubleshoot signal integrity issues Lead system interconnect design, bring up and qualification As the scope of the role and team grows, understand and influence roadmaps for hardware partners for our datacenter networks, racks, and buildings. You might thrive in this role if you: Have at least 10 years of industry experience, including experience design hardware system and SerDes testing for data center applications Have a strong bias toward action, and won’t take no for an answer. Have experience and good knowledge of system design experience in the SI areas, from chip, SerDes, board, rack level Have ex

About the Team OpenAI’s Hardware organization develops system and infrastructure solutions tailored to the demands of advanced AI workloads. We work across the full stack—from silicon to system integration—partnering closely with internal teams and external vendors to define and deliver next-generation AI infrastructure. Our team focuses on defining scalable, high-performance system architectures and reference designs that balance performance, cost, and operational efficiency across rapidly evolving technologies. About the Role We are seeking a 3P Architect to define and drive rack- and cluster-level reference designs in collaboration with external partners. This role is responsible for translating workload requirements and system-level goals into concrete architectures, aligning partners on critical design attributes, and ensuring vendor roadmaps meet our infrastructure needs. You will work closely with performance modeling and internal architecture teams to evaluate tradeoffs, while owning the end-to-end definition and execution of third-party system designs. This includes identifying gaps in current technologies, driving vendor development, and shaping future infrastructure capabilities. This role requires strong system intuition, cross-functional leadership, and the ability to operate effectively across internal teams and external ecosystems. This role is based in San Francisco, CA. We use a hybrid work model of 3 days in the office per week and offer relocation assistance. Key Responsibilities Define rack- and cluster-level reference architectures for AI infrastructure deployments. Translate workload requirements into clear system design specifications and partner deliverables. Collaborate with performance modeling teams to evaluate architectural tradeoffs and system behaviors. Align internal stakeholders and external partners on critical system attributes (performance, cost, power, reliability, scalability). Identify gaps in current technology offerings and dr

About the team: OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform. About the role: We are seeking an experienced Optical Network Engineer to lead Laser related work within our optical interconnect efforts for large-scale compute systems. The role also requires broad, hands-on optical validation experience across IM/DD-based interconnects, working from lab characterization through production readiness and scaled deployment. In this role you will: Drive laser-focused requirements and technical direction within the broader optical interconnect roadmap. Lead evaluation and validation of optical components and subsystems, including laser-based elements, in lab and production-representative environments. Support end-to-end optical testing for IM/DD interconnects (e.g., module/system bring-up, characterization, debug, and readiness for scale). Work with external partners to align on development milestones, performance targets, and quality expectations. Own technical issue triage and resolution across performance, reliability, and manufacturability topics. Collaborate across internal teams to support integration, rollout, and operational success at scale. You might thrive in this role if you have: Strong experience in laser-focused optical engineering (development, validation, manufacturing readiness, or field support). Broad hands-on background with IM/DD optical technologies and optical test/debug workflows. Experience working with external suppliers/manufacturing partners and production-oriented execution. Demonstrated ability to debug complex t

... Address: The Aga Khan Academy Hyderabad Survey No 1/1 Hardware Park Maheshwaram Mandal R.R. District Facility: THE AGA KHAN ACADEMY - HYD FM Qualification: Diploma Experience: 2 - 3 years Source: Sodexo India | Job Code: IJP567371

Steward Address: Survey no 99/1 Plot no 27-30 Adani Aerospace park Hardware park-2 Mamidipally village Near Pahadi Sheriff Hyderabad Facility: ADANI DEFENCE SYSTEMS & TECH - FS HYD Qualification: 12th Experience: 1 - 2 years Source: Sodexo India | Job Code: IJP576111

... Address: Survey No: 1/1, Hardware Park, Maheshwaram Mandal, Hyderabad, Telangana 500005, Survey No: 1/1, Hardware Park, Maheshwaram Mandal, Hyderabad, Telangana 500005 Facility: THE AGA KHAN ACADEMY - HYD FM Qualification: 12th Experience: 1 - 3 years Source: Sodexo India | Job Code: IJP572120

... Address: Survey no 99/1 Plot no 27-30 Adani Aerospace park Hardware park-2 Mamidipally village Near Pahadi Sheriff Hyderabad Facility: ADANI DEFENCE SYSTEMS & TECH - FS HYD Qualification: 12th Experience: 1 - 2 years Source: Sodexo India | Job Code: IJP570692

... Address: Survey No: 1/1, Hardware Park, Maheshwaram Mandal, Hyderabad, Telangana 500005, Survey No: 1/1, Hardware Park, Maheshwaram Mandal, Hyderabad, Telangana 500005 Facility: THE AGA KHAN ACADEMY - HYD FM Qualification: Not Specified Experience: 1 - 2 years Source: Sodexo India | Job Code: IJP568517

... Address: Survey No: 1/1, Hardware Park, Maheshwaram Mandal, Hyderabad, Telangana 500005, Survey No: 1/1, Hardware Park, Maheshwaram Mandal, Hyderabad, Telangana 500005 Facility: THE AGA KHAN ACADEMY - HYD FM Qualification: Diploma Experience: 2 - 5 years Source: Sodexo India | Job Code: IJP568513

... Address: Survey No: 1/1, Hardware Park, Maheshwaram Mandal, Hyderabad, Telangana 500005, Survey No: 1/1, Hardware Park, Maheshwaram Mandal, Hyderabad, Telangana 500005 Facility: THE AGA KHAN ACADEMY - HYD FM Qualification: ITI Experience: 1 - 3 years Source: Sodexo India | Job Code: IJP568512

... Address: Survey No: 1/1, Hardware Park, Maheshwaram Mandal, Hyderabad, Telangana 500005, Survey No: 1/1, Hardware Park, Maheshwaram Mandal, Hyderabad, Telangana 500005 Facility: THE AGA KHAN ACADEMY - HYD FM Qualification: Not Specified Experience: 1 - 2 years Source: Sodexo India | Job Code: IJP568515

... Address: Survey No: 1/1, Hardware Park, Maheshwaram Mandal, Hyderabad, Telangana 500005, Survey No: 1/1, Hardware Park, Maheshwaram Mandal, Hyderabad, Telangana 500005 Facility: THE AGA KHAN ACADEMY - HYD FM Qualification: Not Specified Experience: 1 - 2 years Source: Sodexo India | Job Code: IJP568516

... Address: Survey No: 1/1, Hardware Park, Maheshwaram Mandal, Hyderabad, Telangana 500005, Survey No: 1/1, Hardware Park, Maheshwaram Mandal, Hyderabad, Telangana 500005 Facility: THE AGA KHAN ACADEMY - HYD FM Qualification: Not Specified Experience: 1 - 2 years Source: Sodexo India | Job Code: IJP568514