Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Within Micron’s Heterogeneous Integration Group (HIG), we are developing advanced High Bandwidth Memory (HBM) solutions that enable the next generation of AI, high-performance computing, and data-centric applications. Our team collaborates across design, product, manufacturing, and ecosystem partners to deliver innovative memory technologies with exceptional quality and execution excellence. The HBM Tapeout and Release Technical Lead plays a critical role in ensuring successful design releases into Micron manufacturing. In this role, you will drive tapeout execution, release readiness, and design governance across complex HBM programs, partnering with design, integration, verification, and product teams to deliver high-quality designs on schedule. Responsibilities: Lead tapeout execution and release coordination for HBM builds, managing schedules, DBR achievements, and release readiness Drive preparation, review, and completion of tapeout collateral, including TOAST, RCDB, TWIT, and related release documentation Coordinate signoff readiness across timing, power, physical verification, integration, and other release-critical activities Ensure database quality, completeness, traceability, and signoff evidence are in place prior to tapeout Manage release risks, waivers, open items, and governance processes while maintaining strong r
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Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. As an HBM PE Principal Component Validation Engineer for the Heterogenous Integration Group, you will be part of a forward-thinking team of engineers that solves complex problems, responsible for enabling Micron’s products with flawless and issue free release to both internal and external customers. Responsibilities and Tasks: Coordinate with Internal and External Teams on Preparation for Silicon Work with Manufacturing teams to ensure resources are available Identify HBM Component Validation equipment needs Identify and validate HBM Component Validation equipment and testing flow Ensure that Silicon Meets Product Expectations Debug and identify root cause for failures Implement fixes for fails (Design or Process) Work with Design Validation (DV) and Quality Assurance (QA) Teams on customer returns to identify new tests Work with Global Quality Team (GQ) to ensure reliability Partner with Engineering, Manufacturing and Marketing Create and deliver presentations both inside and outside Micron Participate in meetings Troubleshoot, develop or validate HBM Compone
Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Responsibilities Validation Execution Assist in executing Validation Runs on IQP/ETV materials under defined timelines, ensuring coverage completeness across MBIST and Native Mode flows. Support time-bound data crunching (log parsing, statistical summaries) and contribute to summary report preparation. Platform & Test Program Support Operate and debug programs on SM3/Cobra (MBIST) and Advantest V93K (Native) . Assist in hardware readiness: handler, socket, loadboard, and probe card setup. Technical Analysis & Simulation Validate high-speed I/O (>11 Gbps) and assist with eye diagram and signal integrity checks. Support Verilog simulation tasks (testbench execution, waveform review) to reproduce sightings and validate fixes. Data & Automation Develop basic scripts in Python for log parsing and data visualization. Maintain documentation in Confluence/Jira and version control in Git/Perforce. Debug & Collaboration Participate in root cause analysis sessions and assis
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. For more than 45 years, Micron Technology, Inc. has been at the forefront of innovation, delivering the world’s most advanced memory and semiconductor technologies. Our distributed team of engineers, scientists, and visionaries is developing groundbreaking solutions that redefine how the world uses information to enrich life for all. We are seeking a Layout Design Engineering Manager to join Micron’s High Bandwidth Memory (HBM) organization in Guadalajara, Mexico. In this leadership role, you will guide a distributed team focused on developing complex analog, mixed‑signal, and custom layouts powering next‑generation AI and high‑performance computing solutions. Responsibilities Manage a team responsible for crafting and developing critical layouts for analog circuits, mixed-signal components, and custom blocks, including support for full-chip-level integration. Oversee layout verification activities, including LVS, DRC, Antenna checks, documentation, and quality reviews. Ensure timely and high‑quality delivery of block‑level layouts that meet all project requirements. Coordinate planning, area/time estimation, scheduling, task delegation, and execution for multiple concurrent projects. Mentor and guide layout engineers of all levels. Perform detailed reviews of sub‑block‑level layouts. Collaborate with global engineering teams to drive successful project execution and alignment across Micron’s worldwide footprint. </
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are part of Micron’s HBM design organization, building the test architectures that enable the most advanced memory products in the world. Our team works at the intersection of design, manufacturing, and silicon learning to make 3D‑stacked memory reliable at scale. We thrive on deep technical challenges and close collaboration across disciplines! As an HBM Design Architect, you will define how next‑generation HBM products are tested from wafer to system. This role is critical to ensuring quality, yield, and performance across complex multi‑die architectures. You’ll influence product success early, work hands-on with silicon, and partner closely with design, test, and manufacturing teams. Responsibilities: Define and implement end-to-end DFT architectures for HBM base die and DRAM die Develop DFT strategies for stacked-die, cube-level, and system-level test flows Architect test access mechanisms supporting wafer probe through final test Enable silicon observability for yield learning, debug, and failure analysis Collaborate across design, verification, layout, test, and manufacturing teams Minimum Qualifications: Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field Strong knowledge of scan, MBIST, JTAG, and boundary scan concepts Experience with wafer probe and fin
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Member of Technical Staff HBM Design Architect, you will be responsible for design and development of high-speed interface between DRAM and Base die in HBM cube! This includes designing the DRAM command and control logic, as well serializing and de-serializing scheme. You will collaborate with a highly creative and motivated development team applying brand-new memory technologies to build groundbreaking HBM products! Responsibilities: Responsible for the high-speed DRAM and Base die interface in HBM cube. Design the DRAM command and control logic, as well as serializing and de-serializing scheme at the interface. Conduct circuit simulations using standard industry simulators such as FINESIM, HSPICE and VERILOG Collaborate with data path design on floor planning and full chip testbench. Analyze timing/area/power in high-speed DRAM or mixed-signal design. Contribute to the development of new HBM product opportunities by assisting with the overall design, layout, and optimization of Memory, Logic, and Analog circuits. Qualifications: Extensive experience with DRAM operation and JEDEC specifications across DDR, LPDDR, GDDR, and HBM product families. Strong technical expertise in analog and mixed-signal circuit design. Hands-on proficiency in DRAM command decoding, bank logic, and RAS/CAS chain design. Demonstrated innovation and problem‑solving capabilities in
ENGINEER - HBM VERIFICATION — Jalisco, Mexico. Apply via Workday.
Staff HBM Design Architect — 2 Locations. Apply via Workday.
Probe HBM application integration engineer — Taichung - TCP, Taiwan. Apply via Workday.
MTB HBM Assembly Equipment Manager — Taichung - MTB, Taiwan. Apply via Workday.
Intern - HBM SoC RTL Design Engineer — Folsom, CA. Apply via Workday.
TCP HBM production technician — Taichung - TCP, Taiwan. Apply via Workday.
MTB HBM Manufacturing Engineer — Taichung - MTB, Taiwan. Apply via Workday.
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. For more than 45 years, Micron Technology, Inc. has redefined innovation with the world’s most advanced memory and semiconductor technologies. We’re an international team of visionaries and scientists, developing groundbreaking technologies that are transforming how the world uses information to enrich life. As a Principal/MTS Engineer, you will be an integral part of our HIG HBM Team in Hyderabad, India, responsible for designing and developing complex Application-Specific Integrated Circuits to meet our product's specifications and requirements for High Bandwidth Memories, working for intensive applications such as artificial intelligence and high performance computing solution. Your expertise will contribute to the successful realization of pioneering semiconductor products, enabling our company to maintain its competitive edge in the industry. Role and Responsibilities Must have a solid understanding of die design . This includes knowledge of various die components, their functions, and how they interact within the overall tool. Familiarity with the principles of die design is essential to create effective and efficient layouts. Industry Involvement : You actively participate in standards committees, representing Micron and staying informed about industry developments. Leading Project Layout Team : You lead the establishment and growth of a layout team to meet Micron’s global HBM layout requirements. Technical Expertis
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Department Introduction At Micron's High Bandwidth Memory (HBM) team, we develop advanced memory solutions that enable next-generation artificial intelligence and high-performance computing applications. We collaborate across global engineering teams to deliver innovative semiconductor technologies that help transform how the world uses information. Join us and help build the future of memory innovation! Position Overview As a Layout Build Engineer within the HBM organization in Guadalajara, Mexico, you will develop and integrate analog, mixed-signal, and custom digital layouts for advanced memory solutions. You will support physical build implementation, verification, and project execution while collaborating with global engineering teams to deliver high-quality layouts on schedule. This role contributes directly to AI-enabled and high-performance computing products through efficient and reliable layout development. Responsibilities Develop analog, mixed-signal, custom digital block layouts, and support full-chip integration activities. Perform layout verification activities, including Build Rule Check (DRC), Layout Versus Schematic (LVS), antenna checks, quality reviews, and documentation. Deliver block-level layout builds on schedule while meeting established quality requirements. Lead layout planning, area and schedule estimation, task delegation, and execution across multiple concurrent projects. Work together with international engineering groups to
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