Hbm Hardware Emulation Architect Jobs

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Product Development Engineer in the Media Health team, you will act as a key interface between a variety of engineering groups and specialties, improving a diverse range of expertise to innovate new and improved test strategies, features, and technologies! You will have or develop guide capability with Probe, and/or ATE test code and testing techniques used to validate and ensure device performance. You will assist in debugging code and aiding other specialists in the characterization of applicable HBM devices. In this role, your additional responsibilities include an in-depth understanding of general device functionality specific to HBM products as well as schematics and signal integrity. Responsibilities: Work with Design Engineering (DE) to run simulations pre-silicon to validate test strategies and Design for Test circuits. Provide feedback to DE, Test Engineering (TE), and others in Product Engineering (PE) Assist in pre-silicon checklist items and work with TE to define required tester resources Work with TE and PE to modify test programs for specific product requirements to ensure that silicon performance meets expectations Support TE by aiding in test program debug, data analysis, and test development Support fabrication sites and process integration through test development to increase effective process feedback Debug and identifying root causes for failures using test and experimental data, and elec

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Job Description As a Senior/Staff Product Quality and Reliability Assurance Engineer (PQRA), you will support reliability qualification and quality monitoring of High Bandwidth Memory products (HBM), help develop product reliability methodologies, and respond to product deviations as they pertain to quality and reliability. You will establish and implement requirements, specifications and metrics such as Defects per Million (DPM), Failure in Time (FIT), and Lifetime. In this role, you will work with multi-functional Engineering teams to ensure product reliability methods are established and followed, perform risk assessments, and provide support for manufacturing teams regarding reliability issues. In this dynamic role, you will have opportunities to gain new product knowledge on an ongoing basis! You will: Conduct New Product Qualifications Define High Bandwidth Memory (HBM) qualification requirements Comprehend failures and failure rate within the scope of the qualification Perform risk assessment at all decision points within the qualification cycle Review qualification data and sign off that qualification requirements have been met Issue internal product release notifications for Qualification <

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Job Description As a Senior/Staff Product Quality and Reliability Assurance Engineer (PQRA), you will support reliability qualification and quality monitoring of High Bandwidth Memory products (HBM), help develop product reliability methodologies, and respond to product deviations as they pertain to quality and reliability. You will establish and implement requirements, specifications and metrics such as Defects per Million (DPM), Failure in Time (FIT), and Lifetime. In this role, you will work with multi-functional Engineering teams to ensure product reliability methods are established and followed, perform risk assessments, and provide support for manufacturing teams regarding reliability issues. In this dynamic role, you will have opportunities to gain new product knowledge on an ongoing basis! You will: Conduct New Product Qualifications Define High Bandwidth Memory (HBM) qualification requirements Comprehend failures and failure rate within the scope of the qualification Perform risk assessment at all decision points within the qualification cycle Review qualification data and sign off that qualification requirements have been met Issue internal product release notifications for Qualification <

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Advanced Packaging Technology Development is where Micron pushes the boundaries of 3D memory. We take ideas from early experiments to factory‑ready processes, working hands‑on with materials, tools, and partners across the industry. If solving foundational problems that shape future products excites you, you’ll feel right at home here! This role is a senior Process Engineering Technical Leader focused on chip‑to‑wafer and hybrid bonding. You’ll lead the development and scale‑up of bonding processes that enable high‑performance 3D memory products like HBM and 3DS DRAM. Your work will span early pathfinding through high‑volume manufacturing, with a clear impact on reliability, performance, and cost. Responsibilities: Set technical direction for chip‑to‑wafer and hybrid bonding processes across development programs Develop and mature process flows, materials, and integrations that meet performance, reliability, and cost needs Lead problem solving across wafer fab, die processing, bonding, thinning, and downstream packaging interactions Partner with integration, equipment, product, manufacturing, and quality teams to deliver TD breakthroughs Drive technology transfer into manufacturing with a focus on repeatability and high‑volume readiness Minimum Qualifications: Master’s degree or PhD in Materials Science, Electrical, Mechanical, or Chemical Engineering, or a related field 13&#43; years of semiconductor R&D experience, incl

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Advanced Packaging Technology Development is where Micron pushes the boundaries of 3D memory. We take ideas from early experiments to factory‑ready processes, working hands‑on with materials, tools, and partners across the industry. If solving foundational problems that shape future products excites you, you’ll feel right at home here! This role is a senior Process Engineering Technical Leader focused on chip‑to‑wafer and hybrid bonding. You’ll lead the development and scale‑up of bonding processes that enable high‑performance 3D memory products like HBM and 3DS DRAM. Your work will span early pathfinding through high‑volume manufacturing, with a clear impact on reliability, performance, and cost. Responsibilities: Set technical direction for chip‑to‑wafer and hybrid bonding processes across development programs Develop and mature process flows, materials, and integrations that meet performance, reliability, and cost needs Lead problem solving across wafer fab, die processing, bonding, thinning, and downstream packaging interactions Partner with integration, equipment, product, manufacturing, and quality teams to deliver TD breakthroughs Drive technology transfer into manufacturing with a focus on repeatability and high‑volume readiness Minimum Qualifications: Master’s degree or PhD in Materials Science, Electrical, Mechanical, or Chemical Engineering, or a related field 13&#43; years of semiconductor R&D experience, incl

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. The TSE Technician – HBM Probe supports Test Solutions Engineering (TSE) activities for High Bandwidth Memory (HBM) products at wafer probe. The role executes operational, data, and system‑level tasks that enable efficient HBM probe evaluations, production releases, and yield/debug activities , working closely with TSE engineers across NPI and high‑volume manufacturing phases. This position is critical in supporting fast‑paced HBM development cycles where tight execution, data discipline, and cross‑functional coordination are essential. Key Responsibilities Support HBM probe activities by executing requests from TSE engineers, including: Evaluation and production lot assignment, tracking, and coordination Lot handling, status monitoring, and execution follow‑up Attribute tagging, traveler setup, and hold / release execution Support experiments and investigations related to: Yield improvement Test time optimization Test errors and probe‑related issues Perform data mining and generate reports with basic analysis to support: Engineering debug and root‑cause investigations NPI learning cycles and ramp readiness Production

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Role Summary: We are currently experiencing a ground-breaking period in artificial intelligence (AI), where AI is anticipated to become an integral component of daily life. This proliferation is being fueled by advances in memory and compute technologies. High bandwidth memory (HBM) is at the forefront of these innovations. Micron’s Advanced Packaging Technology Development (APTD) is responsible to deliver package development for high performance memory products and transfer to manufacturing . We are looking for an Advanced Packaging Integration Engineer to join our Advanced Packaging Technology Development (APTD) team! Your responsibilities include but are not limited to developing and enabling deployment of advanced packaging technologies to meet performance, cost, manufacturability, quality, reliability and schedule requirements. You will also be required to identify, diagnose, and propose yield

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Enable rapid learning and effective technology transfer across the organization through deep involvement in defect detection equipment applications and advanced data analysis. Analyze process challenges using defect data and equipment signals to identify root causes and improvement opportunities. Collaborate with cross-functional teams across process integration, process development, data science, and yield analysis to deliver solutions with global impact. Drive defect reduction and yield improvement efforts across multiple projects on Micron’s DRAM roadmap, including High Bandwidth Memory (HBM) and advanced DRAM technologies. Develop a comprehensive understanding of process flows, potential failure and defect modes through FMEA, and associated detection strategies for inline yield characterization. Define die loss paretos upon issue detection and partner with process and integration teams to design, execute, and analyze experiments and DOEs to resolve yield limitations. Monitor baseline inline yield health for owned process modules using SPC techniques to quickly identify excursions, process drift, and emerging risks. Protect line yield by proactively escalating issues and coordinating corrective actions. Apply advanced data science and data interpretation skills to analyze complex datasets, draw actionable conclusions, and communicate results effectively. Present findings and recommendations to internal teams and customers using analytical tools such as JMP and Python. Employer will accept a Master’s degree in Material Engineering, Chemical Engi

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Overview At Micron, we are committed to world-class performance and innovation. As a SR ENGINEER, MTB QE OPS, you will be essential in creating the initial quality defense for incoming materials. You will also drive quality management and support our ambitious projects. This is an outstanding chance to lead technological progress in the semiconductor industry! Key Responsibilities Set up the initial quality safeguard for incoming materials, including PSMC/TSMC wafers and UMC interposers. Lead excursion identification, containment, resolution, and supplier quality oversight to reduce yield, reliability, production, and customer risks. Assist HBM ramp, HBM4e, and IQP builds through active incoming quality assessment and supplier quality development. Work Schedule Regular day shift, Monday to Friday, 08:00 AM–05:00 PM. Candidate Qualifications At least 1 year of Semiconductor / Quality experience. Expertise in Incoming Material Quality, Supplier Quality, Excursion Management, and HBM/Wafer/Interposer quality governance. AI-Related Information Develop Generative AI and Agentic AI solutions for Quality operations. Build AI Assistants, knowledge management, intelligent search, and chatbot platforms. Leverage LLMs to improve engineering efficiency and decision-making. Integrate manufacturing, quality, and engineering data to enable intelligent analytics, Quality Digitalization, and

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Responsibilities: Reliability Test Flow Development: Define and develop reliability stress, test flows and test plans to cover all Product Reliability aspects. Reliability Test Plan and Execution: Work closely with Global Quality team to define qualification plan, review and manage the qualification execution progress, and drive for qualification gating issue resolution. DPM reduction : Drive down and achieving Extrinsic Reliability (Time 0 and Field DPM) and Intrinsic Reliability through Optimized Manufacturing Test Flows and Test Strategy to meet critical KPI’s Quality, Cost and Cycle Time Root Cause and Resolution of Qual and RMA Device Issues pertaining to defectivity and intrinsic reliability: Debug and identify root cause and failures in reliability tests by electric failure analysis(EFA) and Physical Failure Analysis (PFA) and drive for resolution and improvements through cross functional team collaboration. Process Conversions and HVM: The role involves providing recommendation to fab teams for new process conversions to reduce cost, increase yields. This is critical as it directly impacts the yield, quality, reliability, and performance of HBM products, which are key components in

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Singapore Campus Hiring Build the Future of AI with Micron Singapore The next era of Artificial Intelligence depends on faster, more powerful, and energy-efficient memory. At Micron Singapore , you'll help create it. Join our global teams and help develop the memory and storage technologies behind AI, cloud computing, smartphones, and data centers. From NAND flash memory and High Bandwidth Memory (HBM) to solid-state drives (SSDs) and advanced chip packaging, you’ll work with experienced engineers to solve real-world challenges and turn new ideas into technologies used around the world. Micron Singapore is proud to be recognized as the #1 Best Workplace in Singapore (Large Category, 2025) and has earned Great Place to Work® recognition for seven consecutive years. <span style="

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a DLT Shift Engineer within Advanced Packaging Technology Development Manufacturing Development Engineering (APTD MDE), you will provide shift-based execution support for Die Level Technology development activities in Taiwan. You will sustain development lot movement, respond to process and equipment abnormalities, support issue containment and escalation, and help maintain safe, efficient development execution across rotating day and night shifts. You will collaborate with Process Development, Process Integration, Manufacturing, Equipment Engineering, and other cross-functional teams to support HBM technology development. This role provides hands-on experience in advanced packaging processes, new equipment and material evaluations, Statistical Process Control (SPC), redundancy tool deployment, structured problem solving, and data-driven execution improvement. Key Responsibilities Shift-Based Development Execution Support DLT technology development in a rotating day- and night-shift environment, including development lot execution, abnormal lot response, and shift-to-shift communication. Monitor assigned development devices and DL

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Department Intro: The Advanced Packaging Technology Development (APTD) department at Micron Technology is advancing next-generation packaging technologies that enable the performance and scalability requirements of tomorrow’s AI and high-performance computing applications. Our team brings together experts in process integration, materials engineering, and semiconductor development to solve complex technical challenges and turn new ideas into production-ready solutions. Join us and help shape the future of advanced memory and packaging technology! Position Overview: As a Process Integration Engineer for Advanced Packaging, you will play a key role in developing and integrating advanced package architectures, including 2.5D, 3D stacking, HBM, and hybrid bonding technologies. You will work across engineering disciplines to develop new processes, improve performance and yield, and support the transfer of emerging technologies into manufacturing. This is an opportunity to contribute to innovative products while working on some of the industry's most advanced packaging solutions. Responsibilities: Develop and optimize advanced packaging technologies, including 2.5D/3D integration, HBM, hybrid bonding, and advanced interconnects Design and execute experiments to qualify materials, process flows, and design rules for new package architectures Analyze yield, performance, and defect data to identify process improvements using SPC and advanced analytics Drive

The Silicon Co-Design Group (SCG) sits at the crossroads of architecture, design, marketing, operations, and productization. Our work spans early architecture through final product delivery across Datacenter, Gaming, Robotics, Automotive, and Embedded markets. We work closely across functions to deliver chips that change what is possible. NVIDIA’s Silicon Co-Design Group is hiring a Chip Lead to serve as the technical lead for one of our most consequential silicon programs! This is not project management, and it is not a senior IC role. You are the person the program partners with on its hardest technical questions — when the right answer is not obvious, and when leadership needs a single technical perspective to align on direction. You are accountable for the technical integrity of the chip end-to-end. You guide co-design feature integration, help resolve the toughest multi-functional bugs, and serve as the project-specific custodian of the qualification playbook. The program runs cleaner because you are on it! What you’ll be doing: You will partner across design, validation, software, and manufacturing to keep the program’s technical narrative clear and on track. Day to day, you will: Serve as the single technical point of contact for multi-functional decisions, issues, and trade-offs. Co-lead program-level feature integration from chip to system, surfacing inter-function dependencies and guiding them to resolution. Help resolve the program’s hardest multi-functional bugs by translating ambiguous, multi-team symptoms into root-cause closure on areas such as HBM, power and thermal, high-speed I/O, and packaging. Steward the qualification playbook. When the playbook does not fit a situation, guide the mitigations and capture the lessons as reusable methodology for other SSG programs. Shape the program’s technical narrative by surfacing key risks, trade

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It's a unique legacy of innovation that's fueled by great technology and amazing people. Today, we're harnessing the boundless possibilities of AI to build the next era of computing. An era in which our GPU acts as the brain of computers, robots, and self-driving cars that can understand the world. Accomplishing unprecedented goals calls for imagination, inventiveness, and exceptional talent from around the world. As a NVIDIAN, you'll be immersed in a diverse, encouraging environment where everyone is inspired to do their best work. Join our team and discover how you can build a lasting impact on the world. NVIDIA's Silicon Co-Design Group (SCG) leads the full product development lifecycle, from early architecture definition through silicon bringup to product release. The ArchDev team is the hub for silicon and system-level feature development, driving tradeoff analysis, system integration, and POR alignment across the entire organization. This is where ideas become chips, and chips become products that define the state of the art — and we're building that future with some of the most motivated engineers in the industry. We're looking for a Senior Memory Systems Engineer to own HBM and LPDDR integration in sophisticated SoCs. This role covers the full stack, including silicon, package, embedded software, testing, and product development. The engineer will resolve the toughest system-level memory challenges throughout the process, building solutions that hold up at scale. What you'll be doing: HBM & LPDDR System Integration and Bringup: Drive HBM and LPDDR system integration, bringup, characterization, and debug for next-generation SoCs — taking memory subsystems through the full arc from first silicon to production-ready at scale. Full-Stack Memory Closure: <s