Ip Counsel Jobs

NVIDIA Networking division is a leading supplier of innovative end-to-end InfiniBand and Ethernet connectivity solutions and services for servers and storage. We offer market-leading solutions that include adapter cards, switches, cables, and software to support networking technologies. Our products optimize Data Center performance and deliver industry-leading bandwidth and scalability. In addition, we serve a wide range of sectors including high performance computing, enterprise, Data Center, cloud computing and Web 2.0. We are constantly reinventing ourselves to stay ahead of the market and bring groundbreaking products and services to the industry. Our product line is focused on delivering the most optimized Ethernet solutions for industries like Media and Entertainment as well as any other industry that can benefit from our DataStream and TCP/IP acceleration. What you will be doing: Drive multiple early-stage design concepts of Test Equipment & fixtures while working in fast-paced product development cycles. Independently lead Test Equipment & fixtures design from concept, through detailed design, and support it during Bring-up, Qualification and Mass-Production phases. Participate and lead design and design reviews of Test Equipment & fixtures by using our CMs (Contract Manufacturers) as the designers Collaborate in research of groundbreaking technologies, materials, and processes with other groups to bring in creative ideas that address evolving needs. What we need to see: B.Sc. in Mechanical Engineering or higher degree. 5+ years of experience in classical mechanical design of mechanisms, jigs, fixtures, products and machines development. Knowledge and experience in automation (pneumatics XYZ motion systems, etc) and in design of machining and sheet metal parts Knowledge and experience in static analysis and simulations.

We are looking for an enthusiastic software engineer to join our AI networking acceleration team, to work on a groundbreaking open-source library, using hardware offloads, GPU Kernels and RDMA network cards. Our product is a performance-oriented low-level infrastructure, crafted to change the way inference works. We thrive as a team in a deeply strong environment, and we're passionate about innovation. The rewards are sweet and include working with some of the brightest people in the industry, an aggressive compensation plan that rewards top performers, and the opportunity to collaborate on products that transform daily the way people work and play. What you'll be doing: Developing a highly optimized inference framework Running on the world’s largest supercomputers and data centers. The work environment is dynamic and challenging as our employees work on innovative, next-generation products at the forefront of technology in terms of performance, scalability, and features. What we need to see: B.Sc. or equivalent experience in Computer Science or Software Engineering 6+ years of experience in modern C++ / C / Rust development 3 years of experience in Linux environment and familiarity with development tools Deep knowledge of the TCP/IP network stack Understanding of computer architecture and operating systems concepts Ways to stand out from the crowd: Background in Linux internals and low-level software optimizations (benchmarking, bottleneck research, performance tuning) Experience in programming CUDA kernels is an advantage Familiarity with ML frameworks and LLMs Background in parallel programming / high-performance computing / RDMA t

Job Details: Job Description: The Role and Impact As a GPU Platform Hardware Design Engineer, you will play a pivotal role in designing and developing high-quality GPU hardware platforms that drive innovation in high-performance computing, graphics, and visualization technologies. You will lead the design process from initial feasibility studies through board layout, tapeout, and platform power-on, ensuring robust functionality and compatibility with industry standards. Your expertise in platform-level requirements, electrical engineering applications, and system bring-up will directly contribute to delivering cutting-edge GPU systems that accelerate Intel's leadership in computing. Business group The Data Center Group (DCG) is dedicated to advancing Intel's role in powering the digital world with leading-edge technologies. Focused on delivering innovative solutions for data center and cloud environments, DCG supports high-performance computing and graphics to enable capabilities such as AI, machine learning, and advanced visualizations. As part of the GPU IP Engineering team within DCG, you'll contribute to developing GPU systems that meet the evolving demands of the industry while supporting Intel's broader mission to create world-changing technology. Key Responsibilities - Design, develop, and evaluate electronic components, PCBs, and integrated circuits for GPU hardware platforms. - Translate platform-level requirements into detailed specifications and ensure adherence throughout the design process. - Define component placement and trace routing rules to optimize board layouts for performance, power, and signal integrity. - Conduct feasibility studies, board layout, tapeout, and platform power-on activities. - Perform functionality tests and utilize tools to verify platform configurations and compatibility. - Research, develop, and validate firmware, hardwa

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. ​Job Description Summary You will be responsible for Windows, PC, AV devices and asset management to provide technical support to employees for computer systems software and hardware. You will support the acquisition, installation, maintenance, and administration for Windows, PC software and hardware assets. You will work with world-wide Corporate teams to implement new solutions and meet business requirements. You will be expected to leverage Corporate standards to provide high-level customer services, including: - Training programs designed to educate an organization’s employee as new employee orientation program - Provide diverse IT supports as needed for specific business areas - Maintain an expert level of computer literacy including a working knowledge of the Operating Systems Detailed Job Description Responsible for Windows, PC, AV devices and asset management to provide technical support to employees for PC software and hardware. Experience in Windows OS, computer software and hardware maintenance. Familiar with the installation, operation, repair and troubleshooting of Microsoft Windows OS, including LAN TCP/IP knowledge related to problem research. Ability to analyze and solve problems for Microsoft Windows/Office 365/PC. Those with information-related certificates are preferred, such as MCSE or CCNA, etc. <span

Senior Offensive Cybersecurity Test Analyst Company: The Boeing Company The Boeing Company is seeking a Senior Offensive Cybersecurity Test Analyst to support the Boeing Test & Evaluation (BT&E) cyber test capability. The selected applicant will join a highly technical Test & Evaluation team building an offensive cyber test capability in Berkeley, MO . This position will be providing testing services to Boeing Defense Space & Security (BDS) portfolio. The primary responsibilities will include Product Security (Cyber) test planning, integration, and execution, mission-based risk assessments, vulnerability assessments, and penetration tests. The selected applicant will become a Berkeley team member trained across the broader BT&E Product Security Capability team. Position Responsibilities: Lead execution of penetration tests to identify, exploit, and assess a target system’s vulnerabilities in a threat-representative manner on embedded systems and IP-based networks Subject Matter Expert for emulating advanced cyber adversary (advanced persistent threats) tactics, techniques and procedures (TTPs) Lead controlled attack simulations that test the effectiveness of a blue team and its capabilities to detect, block, and mitigate attacks and breaches</span

The SCG Architecture team is hiring a Senior Power Integrity Co-Design Engineer to architect and deliver di/dt mitigation across silicon, package, board, and platform. This role bridges architecture, silicon, and platform — translating product noise targets into shipped specifications, and feeding silicon findings back into the next generation's build. Success in this role requires strong systems thinking and a willingness to accept ambiguity. It also requires the ability to apply AI as a force multiplier while maintaining rigorous engineering judgment. What you'll be doing: Architect voltage-noise mitigation across the full stack — silicon, package, board, platform — and own the codesign trade-offs between them. Co-design noise features with Speed, Power, Reliability, Circuit Design , Power-Arch, ASIC, and platform teams. You're the connective tissue across the codesign web. Work with other team members to define product-level voltage noise targets, drive them to closure, and sign them off at shipment. Build and take ownership of the Sim-to-Si correlation methodology for noise. You know when a model is lying and when silicon is. Model and prototype next-gen noise features — transient sense, droop response, mitigation IP, and codify them so every future program inherits them. Lead show-stopper noise bugs during bringup. The critical issues stop with you. Drive architecture-level codesign tradeoffs across V/F Power Noise Reliability Thermal (Noise-Variation) and (Noise-to-Closure) boundary work, where the highest-leverage innovation lives. What we need to see: BS / MS / PhD in EE, CE, or related (or equivalent experience). 5&#43; years in silicon power integrity, voltage noise, or PDN. Deep expertise in at least one of

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. ​Job Description Summary The role will be responsible for managing AV devices, assets, and Windows-based personal computers to provide technical support to employees for computer systems software and hardware. You will support obtaining, setting up, upkeep, and management of Windows, PC applications and hardware resources. You will collaborate with global Corporate teams to introduce new solutions and meet business requirement. You will be encouraged to follow Corporate standards to provide high-level customer services, including: - Training programs built to educate an organization’s employee as new employee orientation program - Provide diverse IT supports as needed for specific business areas - Maintain an expert level of computer literacy including a solid understanding of the Operating Systems Detailed Job Description Responsible for Windows, PC, AV devices and asset management to provide technical support to employees for PC software and hardware. Experience in Windows OS, computer software and hardware maintenance. Familiar with the installation, operation, repair and resolving issues in Microsoft Windows OS, including LAN TCP/IP knowledge related to problem research. Ability to analyze and solve problems for Microsoft Windows/Office 365/PC. Those with information-related certificates are preferred, such as MCSE or CCNA, etc. <

Job Details: Job Description: oin Intel Foundry Construction and Sourcing (FCS) in building the world's largest semiconductor manufacturing factories across the globe. The future is what we build. The scope of our work includes but is not limited to Advanced Packaging Factories, New Wafer Fabrication factories (Fabs), Fab Conversions, Process Tools Install, Infrastructure, and Progressive Build. We are looking for world-class technical talent to join our team. If you enjoy working with the latest technology in a rewarding, fast-paced environment, this is the right place for you. Everywhere you go, you'll find an opportunity to make a difference. In any given workday, you will be given the responsibility to innovate and create an impact on our business. The Install Qualification Operation Sr Specialist is responsible for driving key milestones enabling tool installation, readiness, and qualification within Intel Foundry Construction and Sourcing (FCS). The role is responsible for equipment install execution from pre-design through design finish and set to SL2 signoff, ensuring safe delivery, accurate scope definition, efficient construction, and prompt vendor qualification. This position requires five days per week of onsite presence and close coordination with manufacturing, design, construction, OEMs, trade contractors, and supplier partners. Please consider that this is an Intel Contract position (3 years). Responsibilities will include but are not limited to: Safety and Compliance: Champion Intel's Culture of Caring and ensure safe behaviors across design and construction activities. Enforce cleanroom, IP protection, and site protocols to maintain compliance with all applicab

NVIDIA builds the silicon behind AI, accelerated computing, and graphics. Every watt of performance and every degree of thermal headroom traces back to decisions made in power, performance, and thermal architecture. We are the Silicon Co-Design Group (SCG). We identify, own, and drive system-level co-design ideas. We start with initial concepts and advance to product differentiation across NVIDIA's roadmap. We are hiring a Principal System Power Management and Performance Architect who operates at the ambiguous boundary where workload behavior, silicon capabilities, firmware policies, and platform constraints collide, and who turns that ambiguity into architecture that survives across multiple silicon generations. SCG scope spans architecture, design, software, operations, platforms, and productization. This role shapes system, platform, and data center features and behavior, and partners with teams across NVIDIA. What You'll Be Doing: The work here is rarely well-defined when it arrives. You will be given problems that appear to be performance gaps or power anomalies and encouraged to build a framework for solving them, not just tackle a single instance. Define the multi-generation roadmap for system-level power and performance features, grounded in prototyping, use-case analysis, and cost/benefit trade-offs across segments. You will decide what problems are worth solving and why. Own the architecture and integration strategy for HSIO power management, DVFS, P-states, and low-power features. Your decisions improve product performance, power, and reliability across product lines — not just the current program. Lead system-level boot and IST architecture defining how power and clock domains initialize, sequence, and recover across complex multi-IP systems where the interaction space is large and the failure modes matter. Drive power management strategy at data

Position Summary Pfizer is seeking a motivated Senior Associate Scientist to join the In Vivo Pharmacology group within the Oncology Research Unit, with a focus on antibody-drug conjugate (ADC) programs, but including other large molecule and small molecule programs. This role supports the execution of in vivo oncology studies that enable ADC discovery and preclinical development, including efficacy, tolerability, pharmacodynamic, and sample collection workflows. The ideal candidate will demonstrate strong technical aptitude, careful attention to detail, and a commitment to animal welfare, compliance, and high-quality study execution. The Senior Associate Scientist is expected to contribute as a dependable technical team member while building scientific understanding of oncology pharmacology and ADC-specific study requirements. Position Responsibilities Execute in vivo oncology studies supporting discovery programs using a variety of in vivo models including human cell line- derived, patient-derived xenograft, syngeneic models as appropriate with minimum guidance from study leads. Perform routine and advanced in vivo procedures, including tumor measurements, body weight monitoring, test article administration (IV, PO, subQ, IP dosing), clinical observations, and sample collection. Perform routine in vitro tissue culture procedures Support pharmacology studies evaluating efficacy, tolerability, pharmacodynamic biomarkers, dosing schedules, and combination approaches. Prepare study materials, confirm dosing and sampling schedules, and ensure study activities are performed according to approved protocols and SOPs. Maintain accurate, timely, and compliant study records using approved electronic data capture and documentation systems. Communicate study observations, technical issues, animal welfare concerns, and timeline risks promptly to managers and study line leads. Collabo

About the Team OpenAI Consumer Devices is building the next generation of products that bring powerful AI into people’s everyday lives. Guided by OpenAI’s mission to ensure AGI benefits all of humanity, our team combines world-class researchers, engineers, designers, and operators who care deeply about creating useful, intuitive, and responsible technology. You’ll have the opportunity to work alongside exceptional people on ambitious, zero-to-one challenges at the intersection of hardware, software, and AI. This is a chance to help define an entirely new category of products—and shape how people experience AI in the future. Our team works across systems software and product engineering to build reliable consumer devices and the platforms behind them. We develop the connectivity and networking foundations that support communication across OpenAI products and systems. About the Role As an Operating Systems Engineer focused on connectivity and networking, you will design, develop, and maintain the OS capabilities that enable reliable, secure, and efficient communication across OpenAI products and systems. Your work will span Wi-Fi and Bluetooth frameworks, IP networking, and advanced network services and policy. You’ll develop OS services, libraries, and interfaces for a broad range of connectivity needs, make design decisions across software boundaries, and carry solutions through development, integration, and production. In this role, you will: Build connectivity foundations: Design, implement, and maintain OS services, frameworks, and APIs for Wi-Fi, Bluetooth, and IP networking. Develop reusable network capabilities: Build connection management, network configuration and selection, service discovery, and routing capabilities. Enable secure communication: Develop network services and policies for secure communication, traffic management, and isolation across varied network environments. Resolve issues across the stack: Investigate correctness, concurrency, interoper

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a SoC Design Engineer, you will be part of the Heterogeneous Integration Group (HIG), contributing to the design, development, and integration of next‑generation HBM SoC logic die. You will work closely with architecture, verification, physical design, firmware, and product teams to implement robust, high‑performance SoC solutions that meet ambitious power, performance, area, and schedule targets. You will also work to enable and integrate AI-driven tools and AI-enabled workflows into the team's methodologies. Key Responsibilities Design and implement RTL for SoC‑level blocks and subsystems used in HBM logic die. Integrate internal and third‑party IP (e.g., controllers, microcontrollers, NOC, RAS, MBIST, interfaces, adapters, buffers, PHY‑adjacent logic). Collaborate with SoC architects to translate architectural and micro‑architectural specifications into high‑quality RTL implementations. Participate in SoC‑level integration activities, including clocking, reset, power intent, and configuration infrastructure. Assist with pre‑silicon validation and post‑silicon bring‑up, including root‑cause analysis of silicon issues. Contribute to design documentation, block specifications, and design reviews. Collaborate multi-functionally with Product Engineering, Test, Probe, Process Integration, and Manufacturing to ensure robust and manufacturable builds. Minimum Qualifications Bachelor’s or master’s degree in electrical engineering, Computer Engin

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are part of Micron’s HBM Design Architecture organization, where we push the limits of memory technology every day. Our team works across global, multicultural engineering groups to build next-generation HBM solutions that power AI and machine learning. We believe the best ideas come from collaboration, curiosity, and a shared drive to innovate! This role plays a critical part in ensuring the reliability of Micron’s most advanced DRAM and HBM products. As an ESD & Latch Up Engineer, you will shape protection strategies from early design through high-volume manufacturing, working hands-on with silicon, layout, and foundry partners. If you enjoy solving deep technical problems and influencing product robustness at scale, this role offers both impact and growth. This role supports the design and deployment of AI-enabled solutions that improve efficiency and decision-making. Responsibilities: Define and own chip-level and IP-level ESD and latch up strategies for HBM DRAM, base die, I/O, TSVs, and die-to-die interfaces Establish ESD and latch up requirements, targets, and sign-off criteria aligned with JEDEC/ESDA standards Enable ESD protection circuits and latch up safe layout practices across designs and technologies Lead silicon validation, failure analysis, and correlation of pre-silicon assumptions to silicon results Act as the technical interface to foundries and partner closely wit

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Join Micron’s SSD Hardware Architecture organization, where we develop the technologies that power next-generation storage solutions. We work across architecture, silicon, firmware, and product engineering teams to deliver high-performance SSD controllers that meet demanding standards for quality, reliability, and innovation. As a Staff SSD Hardware PCIe Engineer, you will play a key role in bringing advanced SSD controller technologies to life. This position offers the opportunity to lead PCIe subsystem validation, debug complex system-level challenges, and influence future product capabilities while collaborating with highly skilled engineering teams across the organization. Responsibilities: Develop hardware and system specifications from architectural and product requirements Lead PCIe bring-up, characterization, debugging, validation, and compliance activities for SSD controller SoCs Partner with architecture, verification, firmware, product engineering, and external IP vendors to resolve issues and improve functionality Drive system-level validation methodologies, automation, and test development to improve coverage and efficiency Perform root-cause analysis and validate PCIe functionality across complex SSD use cases Minimum Qualifications: Bachelor’s degree in Electrical Engineering, Computer Engineering, Electronics Engineering, or a related field, or equivalent experien

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The Heterogeneous Integration Group (HIG) sits within the Technology and Products Group (TPG). We are developing High Bandwidth Memory (HBM) solutions for AI and ML applications! We stack multiple DRAM chips on a high-speed memory controller using TSV (Through Silicon Via) technology, dramatically increasing memory density and bandwidth. Our designs span custom digital and RTL2GDS flows, and we are targeting the lowest power per bit in the industry. Join us as a Staff Verification Architect and shape modular, scalable verification solutions for next-generation HBM DRAM products across multiple customer platforms! You will be part of a highly multi-functional team of technical domain experts. You will collaborate closely with Design Engineering, Product Engineering, Business Units, and external customer teams to ensure our future HBM roadmap is successful. You will apply your thorough understanding of testbench architecture, custom and SoC verification methodologies, and 2.5D & 3D package integration to analyze bottlenecks and propose innovative solutions targeting scalability, quality, and verification cycle time. Responsibilities: Deliver high-quality, on-time verification plans and architecture collateral across IP-level and SoC-level verification, and develop turnkey solutions for future designs based on look-ahead information from customers and the architecture team Drive co-verification through direct customer interactions, and mentor early-career engineers to strengthen team capability and tech