Layout Engineer Jobs

Senior /Staff AMS Layout engineer-DPG-LPDDR — Hyderabad - Phoenix Aquila, India. Apply via Workday.

DRAM Design Tech Layout Engineer — Jalisco, Mexico. Apply via Workday.

DRAM Design Technology Layout Engineer — Jalisco, Mexico. Apply via Workday.

About Ubiquiti At Ubiquiti Inc., we create technology platforms for Businesses, Smart Homes, and Internet Service Providers, driven by our goal to connect everyone, everywhere. To date, Ubiquiti has shipped over 100 million devices worldwide, from ISP networking products to next generation of IT solutions. Our growth is made possible by the dedicated team of hundreds behind the scenes. From software developers and product managers to designers and strategists, Team UI is driven to achieve our common goal: Rethinking IT. At Ubiquiti, you’ll heighten your potential and broaden your horizons - all while shaping the future of connectivity. Responsibilities (What he/she will do after join UI): - 5~8 years’ work experience as a Key EE designer for Mobile, Tablet or AP products. - Mainly focus for system schematic review and mechanical stacking review with mechanical engineers and PCB layout review with layout engineers. - Work with RF engineers to figure out performance issues of radios and work with SI and DQA engineers to qualify features and make sure product quality is ready to move further. - Review design derating and suggest design update due to DFM (design for manufacturing), DFA(design for assembly) and DFC (Design For Cost). - Schematic and BOM maintenance and review. - Write test plans for testing coverage, execute tests, and document test results for projects. - Report projects’ status and issue tracking to internal. - Teardown and review new products in the market. Minimum Qualifications (MUST-haves) : - Have the MP experience with Mobile, Tablet or AP products. - Familiarity with high-speed signal design. - Proficiency on using OrCad Capture CIS, Power PCB viewer and Allegro viewer - Knowledge of electronic components (Ex. R/L/C/Diode/MOS/BJT/Logic ICs/Sensors) - Strong knowledge of ESD, EMI and Surge. - Debug skills with the basic operation with oscilloscopes, Logical Analyzers. - Strong knowledge to support the thermal solution. Preferred Quali

IE Layout Senior engineer — Taichung - Fab 16, Taiwan. Apply via Workday.

LPDDR Layout Design Engineer — Hashimoto, Japan. Apply via Workday.

IE Layout Senior engineer — Miaoli - Tongluo, Taiwan. Apply via Workday.

IE Layout Senior engineer — Miaoli - Tongluo, Taiwan. Apply via Workday.

Atom CPU Layout Design Engineer — Mexico, Guadalajara. Apply via Workday.

Atom CPU Layout Design Engineer — Mexico, Guadalajara. Apply via Workday.

Job Details: Job Description: Intel Corporation is the world's largest semiconductor company and a global leader in computing innovation. Our Quantum Computing Group represents Intel's bold venture into the next frontier of computing technology, leveraging our decades of semiconductor manufacturing expertise to develop silicon-based quantum processors. We're pioneering spin qubit technology in silicon quantum dots, combining cutting-edge quantum physics with Intel's unmatched manufacturing capabilities to create the world's first commercially viable quantum computers. Our collaborative approach spans Intel's research divisions and partnerships with leading academic institutions worldwide. We are seeking an exceptional Quantum IC Substrate Package Layout Design Engineer to join our pioneering quantum computing team in Oregon. In this role you will be responsible for design of large form factor IC substrates within a multidisciplinary team. You'll play a crucial role in advancing Intel's silicon quantum dot technology while contributing to the development of scalable quantum systems that will revolutionize computing. Key Responsibilities - Design of IC substrates using Siemens Xpedition IC package design software - Work closely with stakeholders to meet design requirements - e.g., receive feedback from silicon testchip, signal integrity (SI), power integrity (PI), thermal simulation, and system integration engineers - Deliver and disseminate design milestones to stakeholders - Design validation and verification; including DRC and LVS - Advanced packaging design integration (2.5D and 3D) with IC substrate - Tapeout of designs with substrate suppliers in collaboration with Intel substrate teams - Communicate designs in presentations and relevant documentation - Stay curre

Staff Engineer - Analog Layout — Bengaluru, India. Apply via Workday.

Staff Engineer - Analog Layout — Bengaluru, India. Apply via Workday.

Principal Engineer- DEG Layout — Bengaluru, India. Apply via Workday.

SENIOR ENGINEER HBM LAYOUT — Jalisco, Mexico. Apply via Workday.