Lead Firmware Engineer Jobs

About us Graphcore is one of the world’s leading innovators in Artificial Intelligence compute. It is developing hardware, software and systems infrastructure that will unlock the next generation of AI breakthroughs and power the widespread adoption of AI solutions across every industry. As part of the SoftBank Group, Graphcore is a member of a best-in-class family of companies responsible for some of the world’s most transformative technologies. Together, they share a bold vision: to enable Artificial Super Intelligence and ensure its benefits are accessible to everyone. Graphcore’s teams are drawn from a diverse group of backgrounds and bring a broad range of skills and perspectives. A melting pot of AI research specialists, silicon designers, software engineers and systems architects, Graphcore enjoys a culture of continuous learning and constant innovation. Job Summary We are seeking a senior validation lead engineer to lead at-scale rack validation efforts for next-generation AI hyperscale systems. This role focuses on post-silicon system validation across the full lifecycle, ensuring functional, electrical, and thermal performance meets product objectives. You will own end-to-end blade and rack validation including planning, development, execution, and debug while collaborating across firmware, systems, and hardware teams. The Team The Rack Validation team is responsible for ensuring system readiness and quality at scale. The team works cross-functionally with firmware, silicon, and system engineering teams to validate complex AI compute platforms. Responsibilities and Duties Lead post-silicon validation of AI compute blades and racks including test planning, development, and automation. Drive provisioning and integration of system components (SoC FW, BMC, RMC, OS) for rack-level readiness. Own execution against program achievements and report validation progress and risks. Triage test failures, collect debug data, and collaborate on root cause analysis. Track

About Us: AI needs a new infrastructure layer. We're building it at Modal. Every era of computing brought new workloads that previous infrastructure couldn't support: mainframes, databases, and the cloud. Each time, the company that rebuilt the layer underneath defined the decade. AI is no different, except it touches everything instead of one slice, and the window to build the layer underneath it is open right now. Our customers include category-defining companies like Lovable , Ramp , Cognition, DoorDash, and Suno. They rely on Modal for instant GPU access, sub-second container starts, and native storage, so it's simple to serve low-latency inference, fine-tune models, and access production-ready sandboxes at scale. We recently raised a $355M Series C at a $4.65B valuation, led by General Catalyst and Redpoint Ventures. We've crossed $300M+ ARR and grown fivefold since September. Our team includes creators of popular open-source projects (e.g., Seaborn , Luig i ), academic researchers, international olympiad medalists, and experienced engineering and product leaders with decades of experience. The Role: We are looking for a strong technical lead to guide the engineers designing, building, and maintaining the novel, high-performance systems that make up our serverless platform. You'll lead the team responsible for Modal's machines layer: the fleet of bare metal and cloud hosts that every Function, Sandbox, and training job runs on, and the control plane that provisions, images, monitors, and repairs them. You'll own the full lifecycle of a machine, from accepting and benchmarking new hardware from a growing set of providers, to network bring-up, kernel and image management, GPU and disk health tracking, and automated remediation of unhealthy hosts. You'll manage a team of 3–8 engineers while staying hands-on across the stack which involves BMCs, firmware, PXE, bootloaders, Linux networking, drivers, and distributed control-plane services, and you'll shape our long-

About the Team OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform. About the Role We’re looking for a Rack Power Engineer with deep expertise in high-power conversion and distribution to design, qualify, and support power systems for AI supercomputers. You will own rack power solutions—including power shelves, AC/DC rectifiers, power supply units (PSUs), power management controllers (PMCs), and high-current distribution—from requirements and supplier development through deployment. You will also monitor fleet rack power health, lead debugging and root-cause investigations, and drive improvements into hardware, firmware, and qualification coverage. This role is based in San Francisco, CA. We use a hybrid work model of 3 days in the office per week and offer relocation assistance to new employees. In this role, you will: Own rack power architecture and requirements for high-power AI supercomputing systems, including power budgets, AC input interfaces, DC distribution, redundancy, efficiency, serviceability, and integration with data center infrastructure. Drive the design and supplier development of power shelves, rectifiers, PSUs, PMCs, busbars, connectors, and protection circuits. Review electrical designs and control behavior, and evaluate performance, cost, reliability, and availability trade-offs. Define and execute component, shelf, and rack qualification plans covering load transients, current sharing, hot-swap, startup and shutdown, redundancy failover, fault protection and recovery, thermal limits, and AC disturbances and ride-through

Manufacturing Test Engineering Manager Position Summary We are seeking an experienced Manufacturing Test Engineering Manager to lead the development and execution of the end-to-end manufacturing test strategy for next-generation AI server platforms and datacenter infrastructure. This role is responsible for defining and driving the manufacturing test architecture from L6 board assembly through L11 rack-level integration and final system validation , ensuring world-class product quality, manufacturability, and production scalability. This leader will manage a team of 3–5 Manufacturing Test Engineers while partnering closely with Hardware, Firmware, Platform, Validation, Quality, Operations, and Joint Design Manufacturing (JDM) partners. The role owns the manufacturing test strategy, test coverage, factory test infrastructure, manufacturing capacity planning, and continuous improvement of manufacturing quality. Key Responsibilities Manufacturing Test Strategy Define and own the end-to-end manufacturing test strategy from L6 board assembly through L11 rack integration . Develop standardized manufacturing test methodologies that optimize quality, throughput, cost of test, and scalability across multiple products and JDM sites. Establish manufacturing test standards, best practices, and engineering processes that support high-volume server manufacturing. Technical Leadership & People Management Lead, mentor, and develop a team of 3–5 Manufacturing Test Engineers supporting multiple hardware programs. Establish team priorities, allocate resources, and ensure successful execution of manufacturing test deliverables. Foster a culture of technical excellence, accountability, collaboration, and continuous improvement. Serve as the primary technical escalation point for manufacturing test and production issues. Cross-Functional Engineering Collaboration Partner with Hardware, Platform, Firmware, Validation, Reliability, Quality, and Operations teams to ensure manufac

Everpure (NYSE: P) has evolved from storage pioneer to data platform, closing fiscal 2026 with $3.7 billion in revenue, its first billion-dollar quarter, and accelerating growth into FY27. Our strategic agenda spans the companies defining the next era of technology - hyperscalers, AI labs, the AI hardware supply chain, data platform providers, and the broader AI ecosystem. This type of work—work that changes the world—is what the tech industry was founded on. So, if you're ready to seize the endless opportunities and leave your mark, come join us. THE ROLE As the Engineering Manager for Drive Qualification, you will lead a high-performing Bangalore team dedicated to validating Everpure-developed SSDs across performance, reliability, and firmware maturity. In this impactful leadership position, you will own the end-to-end validation strategy for hyperscale and datastore programs, establishing a center of excellence for system-level robustness. Partnering closely with cross-functional firmware, hardware, and analytics teams globally, your mission is to deliver comprehensive qualification coverage that ensures our enterprise storage platforms launch with ultimate confidence and quality. WHAT YOU’LL DO Lead and Scale the Team: Coach, mentor, and grow a multi-level validation engineering team, building a culture of ownership, clear domain expertise, and continuous career development. Drive Validation Strategy: Own the execution roadmap for core qualification domains (including PCIe, NVMe/OCP, and power-loss robustness) across critical milestone gates from engineering samples to final product release. Foster Cross-Functional Alignment: Partner with global hardware, firmware, and program management stakeholders to align on test coverage, coordinate issue triage, and deliver clear risk assessments that dictate release readiness. Advance Automation and Infrastructure: Champion the expansion of Python and Linux-based automation frameworks, regression infrastructure, and data

Graphcore Senior Principal AI SoC Validation (Bring-up lead) Graphcore is a globally recognised leader in Artificial Intelligence computing systems. The company designs advanced semiconductors and data centre hardware that provide the specialised processing power needed to drive AI innovation, while delivering the efficiency required to support its broader adoption. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. We are opening a new AI Engineering Campus in Bengaluru which will play a central role in Graphcore's work building the future of AI computing. We are developing the next generation of AI compute, a large-scale system-on-chip (SoC) designed to power future high-performance AI systems. As the SoC Validation Lead, you will be responsible for enabling pre-production software to run reliably on new silicon quickly and efficiently, before showing that the silicon meets the highest standards of quality, reliability and functionality, ready for production deployment. You will lead a team delivering post-silicon validation across the full AI SoC, working across silicon, firmware, and platform levels. The role requires a deep technical understanding, strong hands-on debug experience, and the ability to collaborate effectively with hardware, software, and systems engineering teams. Key responsibilities Define and lead post-silicon validation strategy Develop and refine the overall post-silicon validation approach for our AI SoCs, ensuring reliable and timely delivery of validated silicon, architectural correctness, feature robustness, and at-scale system reliability. Drive cross-domain debug and issue resolution Lead investigation and resolution of complex issues spanning silicon, firmware, operating systems, and platform interactions. Ensure that fixes are effective and sustainable. Promote collaboration and shared understanding Work closely with

About the Team Our Robotics team is focused on unlocking general-purpose robotics and pushing towards AGI-level intelligence in dynamic, real-world settings. Working across the entire model stack, we integrate cutting-edge hardware and software to explore a broad range of robotic form factors. We strive to seamlessly blend high-level AI capabilities with the constraints of physical systems to improve peoples’ lives. About the Role We are seeking a Senior Actuator Design and Integration Engineer to lead the development of custom electromechanical actuators for advanced robotic systems. You will own actuator development from early architecture and concept generation through prototype validation and system integration, partnering closely with mechanical, electrical, controls, firmware, reliability, and manufacturing teams. This role focuses on the design, integration, and validation of precision electromechanical systems, including motors, transmissions, sensing, structural components, and thermal architectures. You will help drive actuator development across the full engineering lifecycle while establishing scalable design, test, and integration practices for future robotic platforms. This role is based in San Francisco, CA, and requires in-person presence 4 days a week. In this role, you will Lead the architecture, design, and integration of custom robotic actuators, including motors, transmissions, sensing, thermal systems, structural components, and packaging. Define actuator requirements and system-level trade studies around torque density, bandwidth, efficiency, thermal performance, backdrivability, inertia, reliability, manufacturability, and cost. Design precision electromechanical assemblies with strong attention to tolerances, alignment, load paths, thermal expansion, sealing, wear, and serviceability. Drive actuator integration into robotic systems, partnering closely with controls, firmware, electrical, and robotics software teams to optimize closed-loop pe

Job Details: Job Description: Join an enthusiastic team of engineers in Intel's Networking Solutions Group (NSG) focused on enabling next generation of programmable Infrastructure Processing Units (IPUs) with our lead customers as part of the Customer Experience Support (CES) organization. Intel brings decades of leadership in networking, virtualization, packet processing, storage, and security to a new class of IPU products that accelerate host networking functions and support emerging use cases such as security, virtualization, storage, load balancing, and data path optimization. Working closely with major cloud service providers and Intel development teams, you will help deliver customized IPU based solutions that enhance isolation, security, performance, storage and system management for our customers. A big part of the day-to-day job is to help customers manage feature request processes, enable solutions, and debug issues. Projects and responsibilities include but are not limited to: • Gain our customers' trust, understand their needs, and build POCs to meet them. Work closely with internal and external partners to understand use cases and requirements. • Be the go-to technical resource for customers building complex Datacenters, AI infrastructure as well as helping them understand performance characteristics for solutions. • Prepare and deliver technical content to customers including presentations, workshops, etc. • Contribute across the full IPU lifecycle, including board and platform bring up, low-level device initialization, OS driver and kernel configuration, system management, feature enablement, use case testing, debugging, and verification. • Defines systems implementation and integration solutions and plans to ensure optimum performance and reliability across hardware, firmware and software w

About Ubiquiti At Ubiquiti Inc., we create technology platforms for Businesses, Smart Homes, and Internet Service Providers, driven by our goal to connect everyone, everywhere. To date, Ubiquiti has shipped over 100 million devices worldwide, from ISP networking products to next generation of IT solutions. Our growth is made possible by the dedicated team of hundreds behind the scenes. From software developers and product managers to designers and strategists, Team UI is driven to achieve our common goal: Rethinking IT. At Ubiquiti, you’ll heighten your potential and broaden your horizons - all while shaping the future of connectivity. Responsibilities Lead hardware circuit design, schematic capture, and layout review for next-generation, high-density, and high-throughput networking platforms. Evaluate and integrate advanced switching architectures, management subsystems, and cutting-edge high-speed interconnect technologies. Drive hardware architecture design, system bring-up, high-speed signal integrity (SI) validation, and root-cause failure analysis. Partner with mechanical, thermal, and power engineering teams to address challenges related to high power density, thermal dissipation, and system-level reliability. Own BOM structure and support factory deployment to ensure seamless transition of high-layer-count PCBAs from NPI to mass production. Collaborate with cross-functional software, firmware, QA, and compliance teams throughout the entire product lifecycle. Q ualifications Bachelor’s degree or above in Electrical Engineering or a related discipline. 5+ years of hands-on experience in high-complexity system-level hardware design, ideally focused on enterprise-grade networking or high-performance infrastructure equipment. Deep technical understanding of high-speed Ethernet design, high-speed differential signals (advanced SerDes, PCIe, multi-gigabit/ultra-high-speed interfaces), and high-density PCB design rules. Practical experience with complex power d

We are looking for a disciplined and dynamic, Lead System Engineer – compute blade and rack Validation to join our growing compute rack validation team. As a diligent leader in Systems Engineering, you will drive multiple aspects of validation throughout the life cycle of the program. In this high visibility position, you will be part of a leading team to innovate and improve system bring-up and enablement abilities, as well as silicon and system validation to deliver the highest quality, industry leading technologies to market. Your technical leadership skills, validation and debug expertise will be necessary towards product development, definition, root cause and resolution. Your agility and collaborative approach will be essential to work within System Validation & other engineering teams (System Architects, SoC and Rack FW etc). The technical leader will be driving keys areas of system validation including leading first silicon & system bring-up (nodes and rack level systems) - rack level systems and blades will be based of ARM server architecture. Candidate will be immersed in challenging system enablement work, system validation (end-to-end) methodology, tests development and execution as well as triage/debug of critical issues to meet critical program milestones at POR quality. The candidate will also be a key contributor to state-of-the-art HW and lab capabilities for Grapchore’s system engineering. The candidate should be able to work in a global environment while maintaining a synergetic culture. Primary Responsibilities: Lead the systemenablement (including first silicon and other FW components) to ensure system capabilities are brought up as per plan of record and system architecture spec. Drive organization wide methodology for Firmware integration and best known configuration (HW/FW/SW) usage model by leading the release of deployment ready solutions. Develop key methodologies, lab HW and system SW capabilit

About the Team DoorDash Labs is an independent team within DoorDash. We explore robotics and automation to transform last mile logistics in the long term. If you have a passion for applying robotics solutions in a service used by millions of people, then we want to talk to you! About the Role We are hiring a Software Integration Engineer for our Platform Integration team. This is a critical role with impact across the robot lifecycle, from manufacturing to daily operation. The Platform Integration team owns making sure the robot works as one cohesive system. The focus is on the interfaces between subsystems; this role in particular is focused on the software side handling interaction between: OS & software stack; firmware; networking; timing; and calibration. In this role, you will work cross functionally with our electrical, hardware, firmware, and autonomy engineers to support new functionality both in both hardware and software. This includes creating provisioning tools, functional tests, and supporting integration into the autonomy software stack. You will report to the Autonomy Platform Lead on our Autonomy Platform Team at DoorDash Labs. We expect this role to be hybrid with some time in-office and some time remote. You’re excited about this opportunity because you will… Play an integral role on a small and focused team. Lead system-level debug when an issue crosses subsystem boundaries or no single team can isolate it. Support early integration of new sensor and software component designs by identifying interface requirements, risks, dependencies and required checks. Design and maintain integration tests, test setups, and procedures to ensure subsystems, once combined, satisfy requirements and design intent. Build and maintain the mission-readiness checks used before manufacturing signoff, validation, field testing, or mission use for different robot platforms. Create the tools, checks, and debug guidance that Manufacturing Integration, Validation,

About the Team Our Robotics team is focused on unlocking general-purpose robotics and pushing towards AGI-level intelligence in dynamic, real-world settings. Working across the entire model stack, we integrate cutting-edge hardware and software to explore a broad range of robotic form factors. We strive to seamlessly blend high-level AI capabilities with the constraints of physical systems to improve peoples’ lives. About the Role We are seeking an Actuator Gear Design Engineer to lead the development of custom gears and gear stages for advanced robotic systems. You will own actuator development from early architecture and concept generation through prototype validation and system integration, partnering closely with mechanical, electrical, controls, firmware, and reliability teams. You will partner with external suppliers and internal manufacturing to create full gearbox assemblies. This role focuses on the design, integration, and validation of precision gearing, including broader knowledge around motor electromagnetics, transmission types, sensing, structural components, and thermal architectures. You will help drive actuator development across the full engineering lifecycle while establishing scalable design, test, and integration practices for future robotic platforms. This role is based in San Francisco, CA, and requires in-person presence 4 days a week. In this role, you will: Lead the architecture, design, and integration of custom robotic actuator gearing. Define actuator requirements and system-level trade studies around torque density, bandwidth, efficiency, thermal performance, back drivability, inertia, reliability, manufacturability, and cost. Design precision electromechanical assemblies with strong attention to tolerances, alignment, load paths, thermal expansion, sealing, wear, and serviceability. Drive actuator integration into robotic systems, partnering closely with controls, firmware, electrical, and robotics software teams to optimize closed-lo

About the Team Our Robotics team is focused on unlocking general-purpose robotics and pushing towards AGI-level intelligence in dynamic, real-world settings. Working across the entire model stack, we integrate cutting-edge hardware and software to explore a broad range of robotic form factors. We strive to seamlessly blend high-level AI capabilities with the constraints of physical systems to improve peoples’ lives. About the Role We are seeking a senior Actuator Electromagnetic Design Engineer to lead the development of custom electromechanical actuators for advanced robotic systems. You will own actuator development from early architecture and concept generation through prototype validation and system integration, partnering closely with mechanical, electrical, controls, firmware, reliability, and manufacturing teams. This role focuses on the design, integration, and validation of precision electromechanical systems, including motors, transmissions, sensing, structural components, and thermal architectures. You will help drive actuator development across the full engineering lifecycle while establishing scalable design, test, and integration practices for future robotic platforms. This role is based in San Francisco, CA, and requires in-person presence 4 days a week. In this role, you will: Lead the architecture, design, and integration of custom robotic actuators, including the design, simulation, integration and sourcing of custom electromagnetic components. Define actuator requirements and system-level trade studies around torque density, bandwidth, efficiency, thermal performance, inertia, reliability, manufacturability, and cost. Design precision electromechanical assemblies with strong attention to tolerances, alignment, load paths, thermal expansion, sealing, wear, and serviceability. Drive actuator integration into robotic systems, partnering closely with controls, firmware, electrical, and robotics software teams to optimize closed-loop performance. Devel

NVIDIA's accelerated computing platforms move data at speeds that push the limits of what silicon and physics allow. Whether a high-speed interface trains reliably, maintains accurate margins, and survives every platform topology it will ever see is a question we answer ourselves. This role does that work. The Silicon Co-Design Group leads the boundary between what was designed and what was built. When a GPU, CPU, or SoC ships with interfaces that work at scale, this team is the reason. Most engineers debug within a layer. You will own the full stack. When an interface fails to train, the link margin is unexpectedly tight, or a customer reports a critical silicon issue, you trace the problem through protocol behavior, signal integrity, firmware, platform topology, and silicon marginalities. You then confirm that the fix works. Your methodology shapes how NVIDIA validates high-speed interfaces across generations. Your decisions affect yield, production ramp, and field quality. This is not a coordination role. The engineers who do it well hold protocol depth and system breadth simultaneously, never lose the thread across hardware, firmware, and software, and have the judgment to know when to go deeper and when to act. They are rare. Should that describe you, read on. What you'll be doing: Own post-silicon bring-up, characterization, validation, and debug of PCIe, NVLink, C2C, and other HSIO interfaces across NVIDIA GPUs, CPUs, and SoCs from first power-on through production readiness. Close the hardest failures. Drive root cause across protocol behavior, signal integrity, firmware and driver interactions, platform topology, and silicon marginalities and own every fix through to confirmation. Define validation strategy. Set test coverage, debug priorities, margining methodology, and stress criteria f

About the Team DoorDash Labs is an independent team within DoorDash. We explore robotics and automation to transform last mile logistics in the long term. If you have a passion for applying robotics solutions in a service used by millions of people, then we want to talk to you! About the Role We are hiring an Autonomy Platform Engineer to build and evolve the foundational software that runs our autonomy stack across robot and compute platforms. The Autonomy Platform team works across embedded Linux, compute and sensor enablement, robotics middleware, process orchestration, data capture and replay, system observability, and performance. You will develop production software and tooling that enables autonomy engineers to bring up new hardware, deploy services reliably, diagnose failures, and validate system performance across robot generations. You will work closely with autonomy, firmware, electrical, hardware, manufacturing, and validation engineers and report to the Autonomy Platform Lead. We expect this role to be hybrid with some time in-office and some time remote. You’re excited about this opportunity because you will… Build and maintain core runtime, middleware, and platform services used by autonomy applications. Enable new compute, camera, lidar, and other sensor platforms. Improve process orchestration, messaging, configuration, startup and shutdown behavior, resource isolation, and fault recovery. Develop system observability, tracing, performance measurement, diagnostics, and regression-detection capabilities. Build reliable data capture, replay, and debugging workflows. Create provisioning, packaging, deployment, integration-test, and platform-readiness tooling. Lead complex debugging across application, middleware, OS, driver, networking, timing, and hardware boundaries. We’re excited about you because… Strong production C++ and Python experience. Experience with embedded Linux, robotics, autonomous vehicles, or complex mechatronic systems. Solid u