NVIDIA's deep learning platforms are at the forefront of innovation, profoundly impacting various fields and widely adopted by leading academic institutions, startups, and major Internet companies globally. We're seeking an accomplished and highly skilled Technical Program Manager (TPM) to join our NVIDIA DGX Cloud team. This is a great opportunity for a passionate, motivated, and creative individual to deliver outstanding value to our DGX Cloud customers! We are specifically looking for a TPM with extensive experience in CSP/NCP cloud environments, on-prem infrastructure bring-up, and hardware automation. What you'll be doing: As an Infrastructure Technical Program Manager, you'll be a key partner to our external NCP partners as well as key internal teams (Software Engineering, Production Engineering/SRE, and Data Center Operations) and their leadership, driving critical programs related to on-prem infrastructure engineering, bare-metal bring-up, and automation. You'll play a pivotal role in developing and maturing foundational capabilities and processes, spanning critical areas such as hardware validation, remote fleet bootstrapping, operational workflows, and cluster/capacity bring-up. This is a dynamic, fast-paced environment where TPMs are motivated to apply versatile abilities to a range of high-impact programs across the infrastructure lifecycle. Fleet Bring-Up, Automation: Coordinate the end-to-end remote bootstrapping, active bring-up, and validation of large server fleets to take clusters from physical rack-and-stack to a customer-ready state. Drive the adoption of automation tooling for fleet maintenance, node security, and burn-in, while establishing formalized workflows to rapidly triage and resolve day-one deployment issues. NVIDIA Software Integration & Capacity Operations: Partner closely with internal NVIDIA SW teams to integrate and deploy DSX and other c
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About the Team The Spark Platform team owns and operates DoorDash's Apache Spark ecosystem — the execution runtime, remote shuffle service, cluster scheduler, and reliability tooling that powers the company's data, analytics, and ML workloads. We run Spark across the company at significant scale and continue to expand the workloads, capabilities, and consumer base we serve. Orchestrating and operating thousands of Spark cluster deployments is a complex distributed system problem which the team invests heavily in runtime optimization, systems architecture, multi-tenant scheduling, and end-user tooling. About the Role As a Software Engineer on Spark Platform, you will execute across the surfaces of our in-house Spark deployment that serves the entire company. The work spans Spark runtime upgrades and performance, multi-tenant scheduling and executor bin-packing on Kubernetes, cluster lifecycle automation, and the observability and incident automation that keep the platform sustainable. You will move between layers as the work demands — picking up the next high-leverage problem regardless of where it sits — and partner closely with the rest of the team and with platform consumers across the company. You must be located in San Francisco, Sunnyvale, Seattle, or New York City for this hybrid position. You will report into the Engineering Manager on our Spark Platform team. You're excited about this opportunity because you will… Build and operate an in-house Spark platform that runs at company-wide scale, spanning runtime, scheduler, reliability, and user-facing tooling. Drive multi-tenant scheduling, executor bin-packing, and cost-aware placement that let a small team serve dozens of consumer teams. Own pieces of cluster lifecycle automation — provisioning, upgrades, capacity changes, and node-failure handling — at a scale where these stop being manual events. Build the observability and incident automation that make the platform debuggable end-to-end and keep on-call sus
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Description Summary As a MFG Senior Manager, you will be responsible for the strategic and tactical planning, leadership, and execution required to meet business objectives within budget. This includes, but is not limited to, short- and medium-term capacity planning, automation and AI enablement, equipment performance improvement, operational excellence, organizational development, talent management, and leadership development. The role is expected to leverage advanced analytics, artificial intelligence, and digital manufacturing solutions to improve productivity, quality, cycle time, and workforce effectiveness while building a high-performing and engaged organization. Responsibilities and Tasks Work with Equipment team to drive equipment performance continual improvements. Work with the Process Engineering and IE to assess and audit the capacity of each workstation in the strategic and tactical timeframe, identify increased throughput opportunities as well as risks to meet Cycle Time and Business Plan goals. Develop action plans to enhance opportunities and mitigate risks. Work with PIE and SIC team on new technology node and new part types line readiness matrix. Work with HVM/ADTT PEE and EE on area constraint management/improvements (dynamic constraints) . Work with OI team on area MAS scheduling, automation, line management systems and successfully roll out to the shift team. Work with Engineering team on tool qualification, release and install requirements, and maintenance
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. This role combines advanced DRAM circuit design with technology development, silicon learning, and yield improvement. We work across Design, Technology Development, Product Engineering, Test, Reliability, Quality, Manufacturing, and other teams to solve challenging memory-design problems and enable future technology generations In this position, you will contribute to the design and optimization of critical DRAM circuitry, including Sense Amplifiers, timing distribution, calibration, and training features. You will influence designs from early process-node development through silicon bring-up and production ramp, using simulation, silicon data, statistical analysis, and automation to improve performance, robustness, yield, and manufacturability Responsibilities: Design, analyze, verify, and optimize memory, logic, and analog circuits, including Sense Amplifiers, timing distribution, calibration, and training features Identify design marginalities and develop circuit- or architecture-level solutions that improve DRAM robustness, performance, scalability, and yield Support new process-node development, qualification, silicon bring-up, yield learning, and production ramp through modeling, simulation, silicon experiments, electrical failure analysis, and statistical analysis Guide layout, parasitic extraction, and modeling activities for Sense Amplifiers and Wordline drivers, including floor planning, placement, routing, signal-margin optimization, and memory-bit interaction Lead technical investigati
Job Details: Job Description: Organization Overview: Manufacturing Development Customer Engineering (MDCE) is Intel's newest organization within Intel Foundry Technology Manufacturing (FTM). We bridge the critical gap between Technology Development (TD) and High-Volume Manufacturing (HVM), advancing technology nodes and process capability from initial product qualification to high-yield production across multiple products while enhancing technologies for our foundry customers. About This Role: Join Intel's Manufacturing Development and Customer Engineering (MDCE) team as a senior technical leader driving process innovation across Intel's most advanced semiconductor technologies in volume manufacturing. You will spearhead the development, optimization, and manufacturability of critical thin film deposition processes, ensuring seamless transitions from early development to high-volume production while meeting Intel foundry customer requirements. Your Mission: Lead thin film process excellence across CVD, ALD, PVD, epitaxy, thermal/plasma deposition, furnace, implant, anneal, and/or treatment technologies. Operating at the nexus of Technology Development and High-Volume Manufacturing, you will drive breakthrough solutions for Intel 18A, Intel 3, 12nm, and next-generation technology nodes. Key Responsibilities Process Innovation and Excellence Champion safety, quality, yield, throughput, and cost optimization across thin film deposition modules Drive defectivity reduction and uniformity improvements through systematic process enhancement Lead technical problem resolution and deliver solutions that meet aggressive technology node targets Optimize equipment performance working with internal teams and key suppliers Strateg
GitLab is the intelligent orchestration platform for DevSecOps. GitLab enables organizations to increase developer productivity, improve operational efficiency, reduce security and compliance risk, and accelerate digital transformation. More than 50 million registered users and more than 50% of the Fortune 100* trust GitLab to ship better, more secure software faster. The same principles built into our products are reflected in how our team works: we embrace AI as a core productivity multiplier, with all team members expected to incorporate AI into their daily workflows to drive efficiency, innovation, and impact. GitLab is where careers accelerate, innovation flourishes, and every voice is valued. Our high-performance culture is driven by our values and continuous knowledge exchange, enabling our team members to reach their full potential while collaborating with industry leaders to solve complex problems. Co-create the future with us as we build technology that transforms how the world develops software. * Fortune 500® is a registered trademark of Fortune Media IP Limited, used under license. Claim based on GitLab data. Fortune 100 refers to the top 20% ranked companies in the 2025 Fortune 500 list, published in June 2025. Fortune and Fortune Media IP Limited are not affiliated with, and do not endorse products or services of GitLab. An overview of this role As a Professional Services Engineer at GitLab, you'll partner with public sector customers to help them successfully adopt and expand GitLab across their organization. You'll deliver services such as installation, migration, training, and advisory engagements, meeting customers where they are, from single-node Omnibus installations to larger reference architectures using infrastructure as code and configuration as code. In this role, you'll balance hands-on technical delivery with clear communication and project ownership, helping customers make practical choices that fit their goals, timelines, and envir
Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Direct process AMC control and N₂ / advanced FOUP environmental regulation efforts to minimize contamination risks and protect product quality. Direct process Particle control and N₂ / advanced FOUP environmental regulation efforts to minimize contamination risks and protect product quality. Develop and complete end-to-end contamination control strategies across FOUP/FOSB, equipment, and fab environments. Drive monitoring, automation, and data-driven solutions to improve process quality, manufacturing stability, and yield performance. Work together with process integration, equipment, AMHS, and global groups to support advanced node ramp and manufacturing readiness. Define process contamination control standards, procedures, and guidelines, benchmarking solutions with industry-leading approaches. Support process contamination-related investigations, risk assessments, and corrective/preventive actions across fabs. Ability to apply baseline digital fluency and role‑appropriate applying Artificial Intelligence to use AI‑enabled tools responsibly and effectively for research, analysis, content creation, problem‑s
Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Job responsibilities include but are not limited to: Safety & Quality: Finishes the required safety training and adheres to safety and regulatory policies Proactively identifies and resolves safety and quality issues with collaborators Drives reduction of injuries, hazards, and environmental incidents Shift Operations Serves as 1st line of defense for shift critical area issues (lot hold, disposition, excursions, line-downs, tool downs) interfacing with TD 1st shift Process Development teams on TD owned early node development part types, test vehicles, and short loop travelers. Serves as 2nd line of defense for shift critical area issues (lot hold, disposition, excursions, line-downs, tool downs) interfacing with HVM Ops team and TD 1st shift Process Development teams on TD/HVM shared part types. Partners with TD 1st Shift, HVM Ops, and multi-functional teams to set priorities, resolve issues, and meet goals. Ensures robust reaction plans, and timely updates for shift teams. Develops and delivers plans to resolve on-shift process/tool issues, improve output, and mitigate quality risks. Collaborate with process development engineering, equipment development engineering, and suppliers to maintain process/
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. In the Technology - Advanced Modeling and AI Solutions (AMAIS) Group in Hyderabad, you will work in a multi-functional team of engineers highly skilled in the modeling of process, equipment, structures, and materials. This team’s primary responsibility is to support and enable solutions to Micron’s most significant challenges in Memory development and manufacturing. Your role will be to work on a project that directly supports one of our group’s critical programs. This project will involve materials or structure or process modeling. You are expected to work in a dynamic and fast-paced team environment developing models and reporting results to the AMAIS team and collaborating with them on next steps. This position seeks individuals that can code, implement, and utilize numerical models. You will interact with process engineers and development teams to identify questions and issues hindering the node development milestones. Additionally, you will create software programs, algorithms, and computational modeling tools to extract concrete insights from modeling and data. You will interpret and convey these insights and findings from models and experiments to engineering teams and leaders. You will be responsible for predictive structure modeling across multiple DRAM and NAND nodes. The modeling engineer will collaborate extensively with product design and process teams for structure model development, deployment, and providing solutions to be implemented on Silicon. Qualifica
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are seeking a Principal IO/Clocking Design Engineer to be a part of our design team working on critical high-speed circuits common to all DRAM related memory products! In this position, you will be responsible for the development, design, optimization, verification, and fan out of these high-speed circuits to all DRAM related projects at Micron. You will work on equalization and bandwidth extension to push the speed limits of the circuit and process technology, analyze resulting IO impairments, clock jitter and duty error impact to DRAM system and timing budget, and develop effective engineering solutions. Responsibilities: Innovate, design, optimize and verify high-speed IO and clocking circuits used in new DRAM products. Apply proven high-speed circuit design techniques and enhance critical performance evaluation of the IO data path and clocking path at circuit level. Develop accurate modeling, analysis and simulation methodology to capture key circuit performance metrics and their impact to product specifications at full-chip and system level. Work with Product Engineering and SI team to compare silicon performance with simulation results and support correlation activities. Collaborate with process integration and transistor modeling teams on Micron's next groundbreaking process node. Minimum Qualifications: Minimum MSEE + 10 years or BSEE + 12 years of industry experience in analog and mixed-signal circuit design. Proficiency w
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Process Integration Engineer working in the fast-paced DRAM R&D Memory Group, you will be instrumental in developing Micron's core memory technology critical for AI-enabled customers. The R&D development takes place in an industry-leading 300mm facility which is adjacent to our newly announced Manufacturing facility (currently under construction). Your focus will be on driving front-end process integration for future DRAM technology nodes, owning integration schemes, DOEs, and silicon learning from development through transfer to manufacturing. You will strengthen that work with device and process modeling, using simulation and device physics to build predictive insight, shorten learning cycles, and guide integration decisions. This is an integration role first; modeling is a tool you bring to it, not a standalone assignment. Responsibilities include, but not limited to: Own process integration for assigned DRAM FEOL modules: define integration schemes, drive unit process and module interactions, and deliver on technology node milestones. Design and execute DOEs on silicon, analyze inline, parametric, and yield data, and drive root cause to resolution. Apply device and process modeling (TCAD, Silvaco, Sentaurus, or comparable) to evaluate process interactions, device behavior, and scaling options, and to prioritize experiments before committing silicon. Correlate simulation results with experimental and silicon data to improve model accuracy and deepen process understanding.</li
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Description •Responsible for the strategic ,tactical planning and execution to meet the business plan within budget, this includes but not limited to short and mid-term capacity planning, automation enablement, equipment performance continual improvement, human resources organization, management, technical and leadership development. •Lead the adoption of AI-enabled engineering and management practices to improve equipment reliability, manufacturing efficiency, resource optimization, and business performance. •Drive the integration of AI, advanced analytics, automation, and digital solutions into engineering workflows, problem solving, capacity planning, maintenance strategies, and operational decision making. Identify and prioritize AI use cases that deliver measurable business impact, promote the effective use of Microsoft Copilot and approved AI tools across the organization, and develop team capabilities in AI-assisted engineering, data-driven decision making, and continuous improvement to support Micron's AI transformation journey. Responsibilities and Tasks •To drive equipment performance continual improvements. Work with the PEE and IE to assess and audit the capacity of each workstation in the strategic and tactical timeframe, identify increased throughput opportunities as well as risks to meet Cycle Time and Business Plan goals. Develop action plans to maximize opportunities and mitigate risks. •Work with PIE and SIC team on new technology node
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Description •Responsible for the strategic, tactical planning and execution to meet the business plan within budget, this includes but not limited to short and mid-term capacity planning, automation enablement, equipment performance continual improvement, human resources organization, management, technical and leadership development. •Lead the adoption of AI-enabled engineering and management practices to improve equipment reliability, manufacturing efficiency, resource optimization, and business performance. •Drive the integration of AI, advanced analytics, automation, and digital solutions into engineering workflows, problem solving, capacity planning, maintenance strategies, and operational decision making. Identify and prioritize AI use cases that deliver measurable business impact, promote the effective use of Microsoft Copilot and approved AI tools across the organization, and develop team capabilities in AI-assisted engineering, data-driven decision making, and continuous improvement to support Micron's AI transformation journey. Responsibilities and Tasks •To drive equipment performance continual improvements. Work with the PEE and IE to assess and audit the capacity of each workstation in the strategic and tactical timeframe, identify increased throughput opportunities as well as risks to meet Cycle Time and Business Plan goals. Develop action plans to maximize opportunities and mitigate risks. •Work with PIE and SIC team on new technology node
GitLab is the intelligent orchestration platform for DevSecOps. GitLab enables organizations to increase developer productivity, improve operational efficiency, reduce security and compliance risk, and accelerate digital transformation. More than 50 million registered users and more than 50% of the Fortune 100* trust GitLab to ship better, more secure software faster. The same principles built into our products are reflected in how our team works: we embrace AI as a core productivity multiplier, with all team members expected to incorporate AI into their daily workflows to drive efficiency, innovation, and impact. GitLab is where careers accelerate, innovation flourishes, and every voice is valued. Our high-performance culture is driven by our values and continuous knowledge exchange, enabling our team members to reach their full potential while collaborating with industry leaders to solve complex problems. Co-create the future with us as we build technology that transforms how the world develops software. * Fortune 500® is a registered trademark of Fortune Media IP Limited, used under license. Claim based on GitLab data. Fortune 100 refers to the top 20% ranked companies in the 2025 Fortune 500 list, published in June 2025. Fortune and Fortune Media IP Limited are not affiliated with, and do not endorse products or services of GitLab. An overview of this role As a Senior Professional Services Engineer at GitLab, you'll work directly with customers to deliver installation, migration, training, and advisory services that help them adopt GitLab successfully. You'll lead engagements from single-node Omnibus installs to large reference architectures built with infrastructure as code (IaC) and configuration as code. You'll also guide migrations from other systems to GitLab SaaS or self-managed deployments, and help customers make practical decisions that improve reliability, security, and day-to-day workflows. In this role, you'll work closely with customers and Git
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron’s Design Engineering Group (DEG) is where bold ideas become real technology. We push the limits of memory and storage innovation, and we thrive in a collaborative environment where engineers learn, build, and solve challenges together. We are driven by curiosity, creativity, and the pursuit of better solutions every day! As a Design Engineer, you will help shape the next generation of Micron’s memory products. You’ll work closely with global design, verification, and product teams to bring innovative circuit designs from concept to silicon. Your work will directly influence product performance, quality, and reliability—and contribute to advancements that define the semiconductor industry. Responsibilities: Design, optimize, and verify block‑level circuits for DRAM projects Compare silicon performance with simulation results and support correlation activities Collaborate with process integration and modeling teams on new process node development Partner with global design groups and provide layout guidance through post‑layout simulation Minimum Qualifications: Bachelor’s degree in Electrical Engineering with 2+ years of semiconductor design or manufacturing experience Demonstrated experience in mixed-signal, digital, or analog IC design Experience designing regulators, charge pumps, oscillators, current references, bandgaps, or comparators Proficiency with SPICE and Verilog modeling and simulation Experience working wi
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