Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Roles & responsibilities can include but are not limited to: Define the global DL4 matrices (Turnaround time, overdue matrices, detection compliance, Statistical Bin Limits (SBL) reactions etc) Ensure all sites adhere to globally aligned DL4 workflows Drive global automation and AI enhancements (YIT, Auto-contain, auto-disposition, Smart Manufacturing & Artificial Intelligence (SMAI) assisted detection) Oversee universal alignment so DL4 signal signals behave the same across sites Monitor the Assembly and Test specifications Improvements and optimization in existing DL4 systems via automation systems Spec limits (Analog values and limits, SBL Bins, Product level ESD) Test coverage/DL4 improvements (based on lessons learnt, Material review boards and Fail Mode Registers(FMR)) Network standardization (Dispositions/problems) FMR, Failure analysis, Failure analysis modelling and Defense Line Correlations Test program review and release Collaborate with cross-functional teams from Product Engineering, Media Health, Global Quality, Advanced Packaging Technology Development and Test Systems Engineering and drive projects to further enhance defense line 4 capabilities Mandatory Requirements: Strong understanding of semiconductor device physics Experience in device modelling and simulation using TCAD (Silvaco, Sentaurus, etc), as well as compact modelling. P
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Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Roles & responsibilities can include but are not limited to: Define the global Defense Line (DL) matrices (Turnaround time, overdue matrices, detection compliance, Statistical Bin Limits (SBL) reactions etc) Ensure all sites adhere to globally aligned DL workflows Drive global automation and AI enhancements (YIT, Auto-contain, auto-disposition, Smart Manufacturing & Artificial Intelligence (SMAI) assisted detection) Oversee universal alignment for DL signals behave the same across sites Monitor the Assembly and Test specifications Improvements and optimization in existing DL systems via automation systems Spec limits (Analog values and limits, SBL Bins, Product level ESD) Test coverage/DL improvements (based on lessons learnt, Material review boards and Fail Mode Registers(FMR)) Network standardization (Dispositions/problems) FMR, Failure analysis, Failure analysis modelling and Defense Line Correlations Test program review and release Collaborate with cross-functional teams from Product Engineering, Media Health, Global Quality, Advanced Packaging Technology Development and Test Systems Engineering and drive projects to further enhance defense line 4 capabilities Mandatory Requirements: Strong understanding of semiconductor device physics Experience in device modelling and simulation using TCAD (Silvaco, Sentaurus, etc), as well as compact modelling. <
Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Integrate AI-assisted tool and insights into daily work to improve efficiency, quality or effectiveness. Contribute to a culture of continuous improvement by identifying , testing and sharing AI-enablement enhancement within one scope of work. Driving New Product Introduction process through NPI Phase Gate Review. Coordinating new product start- up to achieve first pass qualification. Understand new product start-up datelines, product applications and customer requirements; and communicate this information to the new product start-up team Working with process / equipment / manufacturing / planning area owners to bring new product and packag
Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Job Overview As a Staff/Senior Process Development Engineer within PDE-CEM, you will leverage advanced semiconductor process characterization, failure analysis, yield analytics, and process integration expertise to accelerate product and technology development. The role focuses on developing robust assembly processes, improving yield and reliability, supporting New Product Introduction (NPI), and utilizing data-driven methodologies to optimize manufacturing performance. The ideal candidate combines strong semiconductor physics knowledge, advanced characterization skills, yield improvement experience, and cross-functional leadership capability to drive continuous process innovation and manufacturing excellence. Key Responsibilities Process Development & Characterization Develop and optimize Process of Record (POR) for assembly and packaging technologies. Establish process windows, process capability targets, and characterization strategies. Apply statistical methodologies including DOE, SPC, JMP, and Six Sigma to characterize and optimize manufacturing processes. Drive early process learning through advanced characterization and failure analysis techniques. Yield Improvement & Problem Solving</
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The general responsibilities of the position are the following: HBM development Improve Probe testing coverage, quality and on HBM products Own the probe test flow, review and sign off probe test program release to ensure quality control Utilize state-of-art in house engineering equipment to support product characterization and electrical failure analysis Develop creative testing algorithms to improve testing efficiency New Generation Product Development Responsible for new product startup and yield improvement Support design verification and in-depth circuit of new products using CAD tools and Verilog simulations Work with the wafer fab process/integration group to address process-related defects affecting product yield Identify design marginalities and recommend design fix for circuit-related problems Functional and Design Validation Design novel test algorithms and develop test programs for validating HBM features and commands Use high-speed tester hardware to perform validation of new HBM devices Analysis of failures generated from the evaluations Automation of program development and work processes using scripting Product Yield Enhancement Identify causes of low yield through systematic analysis Work closely with various engineering groups in resolving process/defects related issues Perform electri
Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. As an PDE Yield Enhancement (YE) Engineer within Package Development Engineering (PDE), you will be responsible for yield monitoring, excursion management, and yield stabilization during High Bandwidth Memory (HBM) New Product Introduction (NPI) . This role is critical to ensuring robust yield performance from first silicon through NPI ramp and early HVM , working closely with Process Integration (PI), MRDA, Process Engineering (PE), Assembly/Test Manufacturing, and Quality teams. You will act as a hands‑on yield owner during NPI builds, driving fast learning cycles, early risk detection, and disciplined yield recovery. Job Responsibilities: Integrates AI-assisted tools and insights into daily work to improve efficiency, quality, or effectiveness,exercising sound judgment and complying with organizational standards and legal requirements. Contributes to a culture of continuous improvement by identifying, testing, and sharing AI-enabled enhancements within one’s scope of work. Yield Loss Accounted For Account for HBM NPI builds across Post Wafer Finishing (PWF), Assembly, and
Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. The PDE Process Integration (PI) Engineer is responsible for driving process integration excellence for High Bandwidth (HBM) products during New Product Introduction (NPI) . This role ensures robust process readiness, yield ramp, and cross‑module integration across Post Wafer Finishing PWF, assembly, and test , enabling successful execution of HBM technology roadmaps. The PI Engineer works cross‑functionally with Fab, Assembly, Test, Yield, Quality, and central engineering teams to identify risks early, resolve complex integration issues, and deliver NPI milestones on time. Job Responsibilities Integrates AI-assisted tools and insights into daily work to improve efficiency, quality, or effectiveness, exercising sound judgment and complying with organizational standards and legal requirements. Contributes to a culture of continuous improvement by identifying, testing, and sharing AI-enabled enhancements within one’s scope of work. NPI Execution & Support Execute assigned HBM NPI PI tasks following defined procedures and phase‑gate requirements Support NPI builds through lot tracking, data collection, and
Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. At Micron, we believe in encouraging a culture of innovation and excellence. The PDE Process Integration (PI) Senior Manager role offers an outstanding chance to lead a distributed team in defining, standardizing, and driving High Bandwidth Memory (HBM) New Product Introduction (NPI) success across several locations. This position blends strategic leadership, scaling of operations, and coordination across sites. It aims to ensure consistent PI readiness, faster yield ramp, and strong risk management from development through High Volume Manufacturing (HVM). Job Responsibilities Define and drive PI strategy, standards, and guidelines across HBM programs. Coordinate PI execution across multiple HBM NPI programs, ensuring delivery against network-level achievements and ramp targets. Ensure robust risk identification, early detection mechanisms, and mitigation strategies. Serve as the central PI leader collaborating with various engineering and manufacturing organizations. Champion the adoption of AI-enabled tools for yield analysis and risk prediction. Organizational Leadership & Talent Strategy Guide and grow a group of PI managers and senior engineers spanning several locations or departments.
Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are looking for a Director to join our Package Development & Engineering team (PDE) Your responsibilities include but are not limited to collaborating with internal and external partners to building and implement strategies aligned to organizational and business objectives by delivering high performing and cost-effective advanced packaging solutions on time with highest quality and predictable reliability performance. Other responsibilities include ensuring organizational compliance to company policies, departmental procedures, providing organizational leadership for building and implementing department strategies, processes, and policy through active participation in functional teams and projects. As the Director, PDE Advance Packaging NPI , you will provide strategic and operational leadership for the Advanced Technology PEE & PIE team within PDE. This Director-level role is responsible for overseeing the New Product I
Engineer, Process Integration PDE (Package Development Engineering) — MSB, Singapore. Apply via Workday.
Engineer, Yield Enhancement PDE (Package Development Engineering) — MSB, Singapore. Apply via Workday.
Engineer, PI PDE — Fab 10A, Singapore. Apply via Workday.
ENGINEER, PDE HBM NPI — Taichung - Fab 16, Taiwan. Apply via Workday.
Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. As Product Development Engineering Key Equipment Group (PDE KEG) engineer, you will be primarily responsible for identifying, selecting, and evaluating new equipment (highly automated and computerized) / new technology to support current and future requirement for advantage packaging technology. You will also be responsible for installation and qualification of new equipment platform and handover to production group (Equipment Maturity Index, EMI). In addition, tasks include maintaining a matrix of key equipment platform capability and constraints (Tool of Records, TOR) on current and new equipment platforms, collaborating with production groups on upgrades of existing production equipment through continuous improvement projects Job Responsibilities: Integrates AI-assisted tools and insights into daily work to improve efficiency, quality, or effectiveness, exercising sound judgment and complying with organizational standards and legal requirements. Contributes to a culture of continuous improvement by identifying, testing, and sharing AI-enabled enhancements within one’s scope of work." Support the evaluation and qualification of new equipment plaforms Define, development and establish new equipment design/ capability requirements aligned to Process a
Engineer, Product Development Engineering Key Equipment Group (PDE KEG) — MSB, Singapore. Apply via Workday.
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