Principal Business Systems Analyst Jobs

Who we are At Twilio, we’re shaping the future of communications, all from the comfort of our homes. We deliver innovative solutions to hundreds of thousands of businesses and empower millions of developers worldwide to craft personalized customer experiences. Our dedication to remote-first work , and strong culture of connection and global inclusion means that no matter your location, you’re part of a vibrant team with diverse experiences making a global impact each day. As we continue to revolutionize how the world interacts, we’re acquiring new skills and experiences that make work feel truly rewarding. Your career at Twilio is in your hands. . Hiring and how we work We use Artificial Intelligence (AI) to help make our hiring process efficient. That said, every hiring decision is made by real Twilions! Also, while we are a remote-first company, you may be asked to report in person on an ad-hoc basis for team gatherings, functional off-sites or customer meetings. . See yourself at Twilio Join the team as Twilio's next Tech Lead/Sr. Principal Engineer (L6) in Emerging Technologies. About the job This position is needed to contribute hands-on technical expertise, collaborate on rapid prototyping, and develop innovative solutions as part of Twilio’s incubation team. As a Tech Lead, you’ll work closely with cross-functional partners to design and build new product ideas, leveraging modern technologies and your problem-solving abilities. This is a high-impact opportunity for growth and learning, helping Twilio experiment and stay ahead in the evolving tech landscape. You will be accountable for enabling rapid experimentation in partnership with the ETI tech lead. Welcome to Twilio Forward, the incubation lab where we push boundaries, unlock next-era growth, and turn the once-unimagined into reality. As part of our Emerging Tech team, you will pioneer Horizon-3 initiatives that fundamentally redefine how humanity interacts with artifi

HBM IO Architecture, Principal Engineer — Richardson, TX. Apply via Workday.

Sr. Principal Software Engineer - Cardiac Ablation Solutions — 2 Locations. Apply via Workday.

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The Films, Metals, and Implant MDE team sits at the center of next-generation DRAM innovation, enabling rapid process learning and high-quality development outcomes. We work closely with multi-functional partners to translate ideas into scalable manufacturing solutions, and we take pride in building strong engineering talent while advancing groundbreaking semiconductor technology. As a Principal Lead Engineer, you will play a dual role as both a technical expert and people leader. You will guide a multi-shift engineering team, drive execution rigor, and ensure seamless development flow across a 24/7 environment. This role is critical to accelerating technology turning points, improving operational performance, and developing the next generation of engineering talent. Responsibilities: Lead multi-shift engineering teams to complete development priorities and ensure consistent 24/7 operational performance Partner with Process Development, Integration, Equipment, and Manufacturing to accelerate learning cycles and meet roadmap goals Coordinate wafer execution, ensuring data quality, process monitoring, timely response to customer concerns, and defect reduction Drive operational excellence by managing important metrics, improving cycle time, and removing execution bottlenecks Build and improve workflows, systems, and AI-enabled practices to improve effi

OCT WET Mfg. Alignment (MA) Sr Engineer/Principal Engineer — Fab 10A, Singapore. Apply via Workday.

Frontend Organizations Central Team, Staff / Principal Photo Scanner Engineer — Fab 10A, Singapore. Apply via Workday.

L’équipe Livraison de programmes et gouvernance (Program Delivery & Governance) constitue la capacité de livraison et d’exploitation de l’organisation Produit et Technologie de Veriforce. Cette fonction est responsable de la livraison stratégique des programmes à l’échelle de l’entreprise, de la santé des livraisons et de la production de rapports, de la discipline de planification, des normes de gouvernance ainsi que des opérations de leadership et de la production d'informations stratégiques destinées aux dirigeants. L’équipe fonctionne comme une seule entité, avec un parcours de carrière commun et un modèle de collaboration permettant la couverture croisée des activités. Veriforce exerce ses activités aux États-Unis, au Canada, au Royaume-Uni, en Afrique du Sud, en Belgique ainsi que dans plusieurs autres marchés. Cette fonction soutient l’ensemble de ces régions et déploie des ressources dédiées lorsqu'un soutien régional spécifique est requis. Anglais de niveau avancé: Cette exigence est requise puisque dans le cadre de cette fonction, vous aurez à intervenir auprès des clients, partenaires et/ou nos filiales internationaux sur une base récurrente tant à l’oral qu’à l’écrit. Dans le présent document, le genre masculin est utilisé dans le seul but d'alléger le texte Retraites stratégiques de l'équipe de direction (Canada SLT Offsites) Les retraites de l'équipe de direction constituent le principal mécanisme d'alignement stratégique de la division. Il ne s'agit pas d'organiser un événement, mais bien de piloter le contenu stratégique, les décisions qui doivent être prises et les résultats attendus. Vous serez responsable de : Assurer la planification et la coordination complètes des retraites de l'équipe de direction canadienne, notamment la conception des ordres du jour, la préparation des documents préalables et la documentation des résultats. Élaborer et maintenir le calendrier annuel des retraites en veillant à ce que chacune soutienne les priorités stratégiq

OCT PH Mfg. Alignment (MA) Engineer/Sr Engineer/Principal Engineer — Boise, ID - Main Site. Apply via Workday.

Wet Process, CMP and Bond MDE Principal Lead Engineer — Boise, ID - Main Site. Apply via Workday.

Front End Central Product Integration Engineer – Test & Product Yield Integration (Senior / Staff / Principal) — Fab 10A, Singapore. Apply via Workday.

Front End Central Product Integration Engineer – Test & Product Yield Integration (Senior / Staff / Principal) — Boise, ID - ID1. Apply via Workday.

OCT DE Mfg. Alignment (MA) Sr Engineer/Principal Engineer — Fab 10A, Singapore. Apply via Workday.

ASIC/FPGA Design and Verification Engineer - (Lead, Senior, or Principal) — USA - Albuquerque, NM. Apply via Workday.

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Our team develops the innovations that power AI, mobile, and computing platforms around the world. Our DRAM Engineering team brings together experts across design, verification, manufacturing, and product development to solve complex technical challenges and deliver advanced memory solutions. We are passionate about innovation, collaboration, and building technology that enables the next generation of computing. As a Semiconductor Design Engineer, you will help develop advanced DRAM and emerging memory products from concept through silicon validation. This role offers opportunities to contribute across circuit design, simulation, verification, and optimization while working closely with global engineering teams. Depending on experience, you may also lead technical projects, mentor engineers, and influence future memory design strategies. Responsibilities: Design, simulate, and optimize digital, analog, and mixed-signal circuits for DRAM and emerging memory products. Translate product requirements into circuit solutions and validate performance across operating conditions. Perform circuit verification, silicon correlation, debug, and tape-out support activities. Collaborate with design, verification, layout, CAD, product, and process teams to improve product quality and manufacturability. Contribute to design automation, AI-assisted workflows, technical reviews, and engineering protocols. Minimum Qualifications: <

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is seeking a highly skilled and experienced Engineer to lead post-silicon power characterization and correlation activities for cutting-edge semiconductor products. In this role, you will be responsible for developing and executing detailed power measurement strategies on silicon, correlating results with pre-silicon models, and driving improvements across power architecture, design, and modeling methodologies. You will serve as a key technical leader, interfacing across design, architecture, validation, and systems teams to ensure silicon meets power and performance specifications under all operating conditions. This role is hybrid, based out of Toronto, ON or Austin, TX or Santa Clara, CA. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who you are A Principal-level engineer with 8+ years in silicon power analysis and characterization, and a Master’s or PhD in EE, CE, or related field. Deep understanding of digital and mixed-signal power domains, including DVFS, leakage vs. dynamic power, and power gating. Highly proficient in lab-based power measurement using oscilloscopes, current probes, power analyzers, and SMUs, plus Python/Perl/MATLAB