Principal Process Engineer Jobs

About Pinterest: Millions of people around the world come to our platform to find creative ideas, dream about new possibilities and plan for memories that will last a lifetime. At Pinterest, we’re on a mission to bring everyone the inspiration to create a life they love, and that starts with the people behind the product. Discover a career where you ignite innovation for millions, transform passion into growth opportunities, celebrate each other’s unique experiences and embrace the flexibility to do your best work. Creating a career you love? It’s Possible. At Pinterest, AI isn't just a feature, it's a powerful partner that augments our creativity and amplifies our impact, and we’re looking for candidates who are excited to be a part of that. To get a complete picture of your experience and abilities, we’ll explore your foundational skills and how you collaborate with AI. Through our interview process, what matters most is that you can always explain your approach, showing us not just what you know, but how you think. You can read more about our AI interview philosophy and how we use AI in our recruiting process here . Pinterest is looking for a Principal Engineer to lead the technical strategy and execution for our Indexing & Retrieval Infrastructure across Core, Ads, and Shopping. This role sits at the center of our delivery infrastructure organization and will shape how fresh, relevant, and cost-efficient candidates are generated for the discovery experiences that power Pinterest at scale. What you’ll do: Define and drive the long-term technical vision for indexing and retrieval infrastructure across Core, Ads, and Shopping, aligning architecture investments to measurable improvements in freshness, quality, coverage, reliability, and cost efficiency. Lead cross-org initiatives to modernize Pinterest’s indexing architecture, including advancing unified real-time and incremental retrieval systems that support high-scale, high-quality candidat

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. What’s Encouraged Daily: Contribute to the development of new HBM products by assisting with the overall design, and layout. · Interpret product specifications and design circuits to meet the required functionality. · Design, implementation, and improvement of Complex Analog Mixed Circuits such as CMOS Amplifiers, Comparators, Bandgap references, V2I converters, LDOs, charge pumps, Oscillators , DLL, IO circuits (DDR/LPDDR), Delays, Process and temperature sensors in advanced semiconductor process nodes for advanced High Bandwidth Memory ( HBM ) products · Integration of modules with Power delivery network and propose design solution for optimum performance · Deep understanding of Array and its peripheral circuits. · Driving innovation into the future Memory generations within a dynamic work environment · Validate & optimize design for reliability (Device stress, Aging effect) · EM/IR simulation, optimize layout to achieve best circuit performance ·

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Lead, hire, mentor, and develop a team of Diffusion & Implant engineers, providing regular feedback, career development, and fostering a culture of collaboration, accountability, and technical excellence. Own and drive DF and IMP process module development, including cell development, process characterization, Integration, process margin improvement, and manufacturability for 3D NAND nodes. Drive execution of process development activities aligned with TD roadmap, ensuring timely delivery of robust, scalable, and high-performance solutions. Collaborate closely with Process Integration, Manufacturing Development, Equipment Engineering, and global TD teams to meet integration requirements and technology breakthroughs. Lead transfer of processes to high-volume manufacturing, supporting pilot ramp, yield improvement, and long-term process stability. Drive DOE-based experiments and data-driven methodologies to optimize process performance, expand process window, and improve cost effectiveness. Implement advanced process monitoring and control strategies to ensure stable, repeatable, and manufacturable performance. Identify and lead process simplification, cost reduction, and productivit

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. 業務内容 次世代DRAM技術開発におけるプロセスインテグレーション業務を担当いただきます。 将来世代DRAMノード向けプロセス技術の開発および統合 キャパシタモジュールの設計、開発、最適化 複数のプロセスモジュールにまたがるインテグレーション業務 DOE（実験計画法）の設計・実行、およびデータ解析によるプロセス条件の最適化 歩留まりおよび品質に関する課題の特定と解決 プロセス、設計、デバイス、品質部門との連携 応募資格 技術要件 半導体プロセスに関する基礎知識 プロセスインテグレーションまたは関連するエンジニアリング分野の知識 DRAMデバイスおよび構造に関する知識があれば尚可 半導体エンジニアリング分野における10年以上の経験 コミュニケーションスキル 海外チームとの会議に頻繁に参加するため、英語でのコミュニケーション能力 日常業務に必要な日本語コミュニケーション能力 関係部門との協業や調整を行うための対人コミュニケーション能力 求める人物像 高い分析力および問題解決力を有する方 チーム環境において主体的に業務を遂行できる方 技術課題に対して粘り強く取り組み、責任感を持って対応できる方 ============================================ ■ Job Responsibilities In this role, you will be responsible for process integration activities for next-generation DRAM technology development. Your key responsibilities will include: Development and integration of process technologies for Future DRAM nodes Design, development, and optimization of capacitor modules Integration across multiple process modules to ensure consistency and performance Design and execution of experiments (DOE) and data analysis to optimize

RDQ327R177 While candidates in the listed location(s) are encouraged for this role, candidates in other US locations will be considered. The Security Field Engineering team helps data teams solve the world's toughest problems by empowering customers to understand the security of the Databricks platform and by helping account teams address questions that come up during security reviews. Reporting to the Head of Security Field Engineering, you will meet with customers to answer questions, train other Databricks team members, build customer-facing content such as slide decks, white papers, and maybe write code that customers can use. Our team prioritizes scale -- we'd rather spend an hour building a doc than be in ten hours of meetings, rather deliver agent skills and knowledge base articles than be the rock star answering all the questions. If you want high growth, autonomy, and to touch all elements of security, look no further. The impact you will have: You will be viewed as a security expert as you work with field teams and customers to understand architectures, address concerns and handle compliance questions Your contributions may come in multiple ways, including customer interactions, scalable slides or white paper creation, internal enablement, process improvement, automation, or technical leadership—no one excels in every area, but all are valuable When you’re on the call, you will be directly appreciated. When you’re not, your impact will be felt across the company through the enablement, collateral, knowledge management, and systems you build You might not come from an assurance team, but you’ll come up to speed with common security and compliance regimes to save customers hours of effort and months of uncertainty You will identify customer pain points and work with product management and product marketing will improve our product and our messaging You will contribute to internal-facing services and automation that make life easier for our field staff

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Job Description Summary The Probe Product Engineer in STPG Product Engineering owns probe strategy and silicon learning at wafer test, spanning pre‑silicon design‑to‑probe staging, first‑silicon bring‑up, qualification, and high‑volume manufacturing (HVM). This role is accountable for defining probe coverage intent, establishing limits and guard‑bands grounded in silicon behavior, and driving yield, quality, and test‑cost outcomes. The focus is on interpreting design intent, device operation, and process interactions, and translating product risk into robust, manufacturable probe strategies aligned with downstream test and customer requirements. The engineer works closely with Design, DFT, Design Validation (DV), Process Integration, Backend Test, and Reliability teams to ensure probe solutions are technically sound, scalable, and product‑centric across the lifecycle. Key Responsibilities Probe Coverage Strategy & Ownership Define and own probe coverage intent by mapping design features, device behavior, and process risks into probe observability, screening mechanisms, trims, and guard‑bands. Define, release, and sustain probe test flows from first silicon through qualification and HVM, ensuring coverage objectives

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Roles and Responsibilities Verification of Analog and mixed signal circuits. Generation of a Full chip mixed signal simulation environment where analog, digital and FW co-exist. Schematic/behavioral model generation of certain blocks to make FC simulation feasible/efficient Device level electrical rule checks – SOA, snapback, sfb etc Static and dynamic simulations to identify the leakage paths SPF extraction and fanout, coupling checks Power cycling simulations – PL and Brown out events Chip level user mode simulations correlating analog subsystems, logic and FW algorithms Design data sheet review and generation of verification plan You will also work and support the efforts of groups such as Product Engineering, Test, Probe, Process Integration, Assembly and Marketing to proactively design products to optimize all manufacturing functions and assure the best cost, quality, root-cause analysis, reliability, time-to-market, and customer satisfaction. Requirements Understanding of MOS device physics mainly second order effects Basic knowledge of few analog circuits – CM, BGR, op-amp, regulators, ADC, DAC and charge pumps Familiarity with shell, Perl/python scripts Familiarity with virtuoso, hspice, xa and cosim Familiarity with HDLs – Verilog/SV and Verilog A/AMS Debug enthusiast with system level outlook Ability to grab complex workflows and constant drive to innovate

About Pinterest: Millions of people around the world come to our platform to find creative ideas, dream about new possibilities and plan for memories that will last a lifetime. At Pinterest, we’re on a mission to bring everyone the inspiration to create a life they love, and that starts with the people behind the product. Discover a career where you ignite innovation for millions, transform passion into growth opportunities, celebrate each other’s unique experiences and embrace the flexibility to do your best work. Creating a career you love? It’s Possible. At Pinterest, AI isn't just a feature, it's a powerful partner that augments our creativity and amplifies our impact, and we’re looking for candidates who are excited to be a part of that. To get a complete picture of your experience and abilities, we’ll explore your foundational skills and how you collaborate with AI. Through our interview process, what matters most is that you can always explain your approach, showing us not just what you know, but how you think. You can read more about our AI interview philosophy and how we use AI in our recruiting process here . Millions of people across the world come to Pinterest to find new ideas every day. It’s where they get inspiration, dream about new possibilities and plan for what matters most. Our mission is to help those people find their inspiration and create a life they love. As a Pinterest employee, you’ll be challenged to take on work that upholds this mission and pushes Pinterest forward. As a Principal Engineer on the AI Platform team, you'll help architect the infrastructure that powers both Generative AI and Recommender Systems across Pinterest's entire product suite. Our team builds the end-to-end engines for petabyte-scale data orchestration, model training and fine-tuning, and high-performance inference, ensuring our models scale seamlessly to hundreds of millions of inferences per second in service of over 600 million monthly active users.

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Summary This position supports Micron’s DRAM Tester Solutions group, focusing on physical design implementation for processors, controller architectures, and ASICs. The role is responsible for full‑chip and block‑level physical design closure, low‑power implementation, timing, power, and signal integrity signoff, and successful tape‑out across advanced technology nodes. Responsibilities: Lead block‑level and full‑chip physical design including floorplanning, placement, CTS, routing, and tape‑out. Drive timing closure across multiple modes and corners using industry‑standard STA tools. Perform power integrity, IR/EM, and power grid closure to meet signoff requirements. Develop and optimize APR flows, scripts, and methodologies for PPA improvements. Own subsystem or full-chip closure work while coordinating with cross-functional teams. Minimum Qualifications: Bachelor’s degree or Master’s degree or equivalent experience in Electrical Engineering, Electronics, or Computer Architecture. Minimum of 15 years of hands‑on ASIC physical design implementation experience. Proven experience with multiple production tape‑outs in advanced process nodes. Strong expertise in low‑power design techniques including UPF/CPF and multi‑voltage systems. Proficiency in scripting languages such as Tcl, Perl, or Python for flow automation. Preferred Qualifications: Experience with Synopsys and Cadence physical design and ti

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are part of Micron’s DRAM Technology Development group, where engineers operate at the leading edge of semiconductor process and product innovation. This role sits at the intersection of process technology, product requirements, and manufacturing execution, and is critical to enabling next generation DRAM technology. As a Principal Node Development Product Engineer, you will play a technical role in driving product readiness through close engagement with process integration, device, yield, test, design, and manufacturing teams. You will own deep process‑aware product knowledge, identify node‑specific risks, and translate silicon behavior into actionable decisions that ensure robust, scalable next generation DRAM products. Responsibilities Serve as a technical contributor during development stage of next gen DRAM! Drive process‑aware product optimization, identifying sensitivities, interactions, and integration risks Analyze silicon data (electrical, parametric, yield, reliability) to identify systematic process or integration limiters Partner with design, process integration, test, and device teams to debug yield and performance issues and converge on root cause Collaborate closely with manufacturing and TD to enable smooth node readiness, learning cycles, and factory ramp Translate process changes into product impact assessments, including PPA, yield, reliability, and test coverage Guide test content and monitoring strategies to ensure early detection of process

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We’re looking for a Field Application Engineer who’s wired for AI/ML, fluent in real-world problem-solving, and excited to build with the people actually using what we make. You will collaborate closely with the sales team and enterprise customers, leveraging your deep technical knowledge in AI to drive the adoption of our products and solutions. This is a customer-facing role that requires both technical expertise and excellent communication skills to convey complex technical concepts to non-technical stakeholders. This role is remote based out of North America with preference near one of our main hubs Santa Clara, CA; Boston, MA; or Toronto,ON. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are You’ve lived in the AI/ML trenches, whether as a field engineer, a solutions architect, or the one tapped in when things needed to “just work.” You speak both machine and human. Whether it’s a researcher or a skeptical executive, you know how to break things down and bring them to life. You’re fired up about generative models, LLMs, and the edge of what’s possible when software meets purpose-built silicon. Work directly with customers in mee

About Pinterest: Millions of people around the world come to our platform to find creative ideas, dream about new possibilities and plan for memories that will last a lifetime. At Pinterest, we’re on a mission to bring everyone the inspiration to create a life they love, and that starts with the people behind the product. Discover a career where you ignite innovation for millions, transform passion into growth opportunities, celebrate each other’s unique experiences and embrace the flexibility to do your best work. Creating a career you love? It’s Possible. At Pinterest, AI isn't just a feature, it's a powerful partner that augments our creativity and amplifies our impact, and we’re looking for candidates who are excited to be a part of that. To get a complete picture of your experience and abilities, we’ll explore your foundational skills and how you collaborate with AI. Through our interview process, what matters most is that you can always explain your approach, showing us not just what you know, but how you think. You can read more about our AI interview philosophy and how we use AI in our recruiting process here . As a principal engineer on the Online Systems team, you’ll join a team that powers Pinterest’s most business-critical online systems at massive scale, driving the reliability, efficiency, and evolution behind every core Pinner and Advertiser experience. You'll lead major efforts like multi-region deployment and Kubernetes migration, set the standard for operational excellence, and define the long-term vision for our online serving infrastructure, supporting machine learning and product innovation across the company. This is an opportunity for high-impact technical leadership, broad visibility, and cross-functional influence at the heart of Pinterest’s platform. What you’ll do: Improve reliability, scalability and infra efficiency for Pinterest’s critical online systems across storage and caching, online service and realtime analytics syste

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Lead end-to-end SSD firmware test architecture design and quality validation for enterprise/data center/automotive SSD products. Build high-efficiency automation platforms and CI/CD pipeline, drive critical issue resolution and product mass production. Key Responsibilities Own overall test architecture, validation strategy and quality system for enterprise SSD firmware. Design and implement test solutions covering functionality, performance, reliability, QoS, PLP, FTL, GC, power and security. Build and optimize automation test framework, long-stability test system and CI/CD pipeline to support mass validation. Lead root cause analysis and closure of critical FW issues including hang, drop, performance degradation and compatibility problems. Participate in product architecture review and provide technical suggestions on FW design, NAND selection and reliability targets. Drive test team capability improvement, process optimization and technical standardization. Track new storage technologies: PCIe 5.0/6.0, NVMe 2.0, ZNS, CXL, automotive and industrial storage. Requirements Bachelor’s/Masters

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities and Tasks: • Establish strategy, models and systems to improve wafer at risk reduction for RAM Defense line hardening. • Establish strategy, model and systems to improve RAM quality control and reduce defect OOC% variation. • Establish strategy, model and systems to improve RAM operation efficiency to achieve labor productivity improvement, Cycle time performance, tool utilization performance for lower cost. • Establish and improve BKM (Best Known Method) related to RAM defense line hardening and operation efficiency. • Ensure BKM sharing spans across all sites regardless of technology and/or site mission differences. • Implement abnormal analysis and improvement. • Lead Copy Smart Team (CST), facilitate taskforce discussion and drive RAM network alignment on strategy business process and roadmap to achieve area objectives and deliver to timelines/commitments. • Support and performs audit and establish metrics that can efficiently audit adoption rate and compliance to business process, BKM and strategy. • Actively provide recommendations to improve and optimize programs and processes to the respective program and/or process owners. • Manage projects with proper Project Management process with metric to track project success. • Track Fab performance metrics for benchmarking purposes. Identify gaps and area of improvements for Fabs. • Provide tactical support and coordination for the Fabs as required for issues of People, Safety, Time to Mat

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Principal Engineer in NAND TD RDA , you will lead a team in the use of next-generation defect detection equipment and processes to identify and solve issues. The goal of this position is to accelerate cycles of learning and technology transfer in Technology Development. We need leaders who are passionate about developing their team, delivering solutions to our internal customers, and driving our supplier's road maps to meet our future inspection needs. This position will provide the opportunity for you to collaborate with process integration, process development, data science, and yield analysis within and outside Technology Development. As a Technology Development RDA Lead, your leadership and innovation will have the ability to impact the team globally. You and your team will be responsible to support experimentation, data analysis, baseline health metrics, and systematic and random defect improvement through partnering with others in Technical Development and Gl