Principal Value Advisor Jobs

Principal Product Manager, Marketing/Consumer Squad — 4 Locations. Apply via Workday.

Principal Decision Scientist, Strategy & Innovation — NY - Work from hom. Apply via Workday.

Principal Software Applications Engineer — 2 Locations. Apply via Workday.

Principal, Strategy and Operations — 2 Locations. Apply via Workday.

Principal Analog Design Engineer — Mixed-Signal PHY (Clocking / High-Speed I/O) — 2 Locations. Apply via Workday.

Principal DFT Engineer, HBM — 2 Locations. Apply via Workday.

Principal Data Analyst — 6 Locations. Apply via Workday.

Principal Employee Relations Specialist - Canada - Bilingual — 2 Locations. Apply via Workday.

Principal Software Engineer - 3D Visualization (OpenGL) — 2 Locations. Apply via Workday.

Principal Software Engineer - UI/UX (Qt/QML) — 2 Locations. Apply via Workday.

Principal Creative Higher Education Engagement Manager (UK) — London. Apply via Workday.

Principal DRAM Product Applications Engineer — San Jose, CA. Apply via Workday.

Principal HIG ESD and Latch-up Engineer- HBM - TPG — 2 Locations. Apply via Workday.

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. What You'll Do Architect and implement scalable multi-agent systems: A2A collaboration, memory, reasoning, tool use, workflow orchestration, observability. Build agentic workflows on the Claude ecosystem: Claude Code–style engineering, MCP tool access, and AWS AgentCore runtime patterns. Design and optimize Vector RAG & GraphRAG: retrieval, semantic search, grounding, citation, graph traversal, and context engineering. Deliver technology-agnostic hybrid architecture: across AWS, GCP, Kubernetes, and on-prem/distributed data platforms. Partner across engineering, manufacturing, product, validation, and data teams; lead PoCs, mentor, and set standards. What You Bring (Required) Bachelor's or equivalent experience in CS, AI, Data Science, or a related field; 8+ years in software/AI-ML, enterprise, platform, or knowledge engineering. Validated delivery of enterprise-scale Agentic AI, Generative AI, and RAG/GraphRAG solutions. Hands-on Python plus agentic framewo

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. This role combines advanced DRAM circuit design with technology development, silicon learning, and yield improvement. We work across Design, Technology Development, Product Engineering, Test, Reliability, Quality, Manufacturing, and other teams to solve challenging memory-design problems and enable future technology generations In this position, you will contribute to the design and optimization of critical DRAM circuitry, including Sense Amplifiers, timing distribution, calibration, and training features. You will influence designs from early process-node development through silicon bring-up and production ramp, using simulation, silicon data, statistical analysis, and automation to improve performance, robustness, yield, and manufacturability Responsibilities: Design, analyze, verify, and optimize memory, logic, and analog circuits, including Sense Amplifiers, timing distribution, calibration, and training features Identify design marginalities and develop circuit- or architecture-level solutions that improve DRAM robustness, performance, scalability, and yield Support new process-node development, qualification, silicon bring-up, yield learning, and production ramp through modeling, simulation, silicon experiments, electrical failure analysis, and statistical analysis Guide layout, parasitic extraction, and modeling activities for Sense Amplifiers and Wordline drivers, including floor planning, placement, routing, signal-margin optimization, and memory-bit interaction Lead technical investigati