Probe Equipment Engineer Jobs

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Member of Technical Staff (MTS) – 3D NAND Process Integration Job / Role Summary The role drives advanced 3D NAND technology pathfinding and process integration within the Advanced NAND Technology team in Singapore. It leads the translation of device concepts, materials, and process architecture into validated, manufacturable technology solutions. The position coordinates end-to-end development from concept through technology validation, applies data-driven, AI-assisted, and model-based methods to resolve complex scaling challenges, and collaborates across Device, Probe, Test, Design, and Operations to improve performance, yield learning, execution, and future-node roadmap readiness. Main Responsibilities Lead 3D NAND integration, pathfinding, and advanced architecture enablement in support of the technology roadmap. Drive end-to-end technology development from concept through validation, including learning vehicles, chara

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. At Micron, we design the memory that moves the world — from advanced DRAM to complete silicon-to-systems solutions! Our design teams work at the leading edge of memory technology, and we collaborate across the globe to turn ambitious ideas into world-class products. If you want your work to show up in the devices billions of people rely on, this is the place to do it. As a Staff Design Engineer on our DRAM team, you'll shape the circuits at the heart of our next memory generations. You'll own design decisions that directly affect cost, quality, reliability, and time-to-market, and you'll partner with talented engineers across design, verification, product, and manufacturing. This is a role for someone who enjoys working close to silicon and wants real ownership over the products they help create. Responsibilities: Design, lay out, and optimize Memory, Logic, and Analog circuits for new memory products Handle parasitic modeling and support design validation, reticle experiments, and tape-out revisions Oversee the layout process, including floor-planning, placement, and routing Run verification through modeling and simulation using industry-standard simulators Partner with Marketing, Probe, Assembly, Test, Process Integration, and Product Engineering to ensure manufacturability, and use Generative AI tools to speed up design, analysis, and documentation while owning correctness and signoff Minimum Qualifications: Bachelor's degree in Electrical

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are transforming how the world uses information to enrich life for all. Within our DRAM organization, we develop next-generation memory technologies in an industry-leading 300mm R&D environment, bringing together expertise across process development, design, modeling, characterization, reliability, and manufacturing. Our team works collaboratively to advance memory scaling while improving performance and manufacturability. As a Process Integration Engineer, you will help enable state-of-the-art DRAM technologies and solve complex integration, device, yield, and circuit challenges. You will work closely with cross-functional engineering teams to optimize process flows, improve yield and margin, and translate technical data into solutions that enable future generations of memory technology. Responsibilities: Lead technology integration activities to enable manufacturability of advanced DRAM technologies Partner with process development, product engineering, design, yield, mask, and probe teams to resolve yield, performance, reliability, and margin challenges Design and implement R&D fab experiments and optimize process flows to meet product and technology requirements Analyze inline, defect, parametric

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Location 990 Bendemeer Road, Singapore 339942 Department Storage Technology and Products Group Product Engineering, Project Title NAND Silicon Design Validation and Automated Data Analysis Project Description The intern will undertake a structured engineering project focused on the silicon design validation of advanced NAND products. Under the guidance of experienced engineers, the intern will develop an understanding of NAND operations, Verilog simulation, validation planning, laboratory measurement techniques, and silicon validation data analysis. The intern will gain practical exposure to testers, oscilloscopes, probe stations, scripting tools, and approved in-house engineering software. The project will also provide opportunities to explore Artificial Intelligence and Machine Learning-enabled workflows for validation data collection, report generation, and anomaly detection. The intern’s activities will be limited to the assigned project and conducted with appropriate supervision. Objective of the Project Develop an understanding of NAND operations and silicon design validation methodologies. Apply circuit and feature knowledge to develop a structured validation plan. Collect an

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a SoC Design Engineer, you will be part of the Heterogeneous Integration Group (HIG), contributing to the design, development, and integration of next‑generation HBM SoC logic die. You will work closely with architecture, verification, physical design, firmware, and product teams to implement robust, high‑performance SoC solutions that meet ambitious power, performance, area, and schedule targets. You will also work to enable and integrate AI-driven tools and AI-enabled workflows into the team's methodologies. Key Responsibilities Design and implement RTL for SoC‑level blocks and subsystems used in HBM logic die. Integrate internal and third‑party IP (e.g., controllers, microcontrollers, NOC, RAS, MBIST, interfaces, adapters, buffers, PHY‑adjacent logic). Collaborate with SoC architects to translate architectural and micro‑architectural specifications into high‑quality RTL implementations. Participate in SoC‑level integration activities, including clocking, reset, power intent, and configuration infrastructure. Assist with pre‑silicon validation and post‑silicon bring‑up, including root‑cause analysis of silicon issues. Contribute to design documentation, block specifications, and design reviews. Collaborate multi-functionally with Product Engineering, Test, Probe, Process Integration, and Manufacturing to ensure robust and manufacturable builds. Minimum Qualifications Bachelor’s or master’s degree in electrical engineering, Computer Engin

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Location F10N, 1 North Coast Drive, Singapore 757432 Department Non-Volatile Memory Test Engineering Project Title AI-Driven Test Engineering Automation and Analytics for NAND Products Project Description As an Intern Test Solutions Engineer in Non-Volatile Memory Test Engineering, you will work on advanced semiconductor test engineering projects focused on NAND memory product development, manufacturing test optimization, and Artificial Intelligence-enabled engineering automation. The project provides hands-on exposure to wafer probe, burn-in, and assembly test solutions used in high-volume semiconductor manufacturing environments. You will collaborate with experienced test engineers and cross-functional teams to develop analytical and automation solutions that improve test quality, engineering productivity, cost efficiency, and decision-making. Through this project, you will apply data analytics, machine learning, scripting, and software development techniques to real engineering challenges while developing practical knowledge of semiconductor memory testing. Objective of the Project Develop data analytics and Artificial Intelligence-enabled solutions for NAND test engineer

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Location F10A Singapore, 1 North Coast Avenue Singapore 757432 Department High Bandwidth Memory Product and Systems Engineering, Industrial Engineering Management Project Title AI-Enabled High Bandwidth Memory Sample Planning and Workflow Optimization Project Description As an intern in the High Bandwidth Memory Product and Systems Engineering Industrial Engineering team, you will participate in a structured project to improve the visibility and planning of High Bandwidth Memory sample workflows through data analytics, dashboard development, and Artificial Intelligence. The project focuses on mapping the end-to-end sample workflow from Die Bank through probe, test, shipment, and the Reliability Lab. The intern will develop an AI-Enabled solution to predict sample arrival and reliability start dates, forecast burn-in resource demand, automate selected notifications, and provide operational insights through interactive dashboards. The internship provides hands-on exposure to semiconductor sample logistics, process documentation, predictive analytics, business intelligence, and workflow optimization. The intern will collaborate with engineering, planning, operations, and information techn

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. As a HIG PSE IE Senior Technician , you will support HBM IQP Reliability, Device Reliability, Package Reliability, Wafer Reliability, and product debug activities . The role includes reliability testing, failure analysis, laboratory operations, inventory and logistics management, audits, safety compliance, and continuous improvement initiatives. You will leverage Artificial Intelligence (AI) and AI-assisted tools to improve IQP reliability run rate management, enhance debug capabilities, support wafer-level reliability testing, and drive automation and digital transformation within the lab environment. Key Responsibilities Support Device Reliability, Package Reliability, and Wafer Reliability execution. Monitor and manage IQP reliability run rates, sample flow, and hardware readiness. Perform first-pass failure analysis and product debugging using probe stations and other debug tools. Utilize AI-assisted tools to improve debugging efficiency, root cause investigation, and operational planning. Support automation projects, data analysis, dashboard reporting, and process improvements. Manage procurement, inventory, logistics, and laboratory readiness activities. Support audits, document control, ESD

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. As a HIG PSE IE Senior Technician , you will support HBM IQP Reliability, Device Reliability, Package Reliability, Wafer Reliability, and product debug activities . The role includes reliability testing, failure analysis, laboratory operations, inventory and logistics management, audits, safety compliance, and continuous improvement initiatives. You will leverage Artificial Intelligence (AI) and AI-assisted tools to improve IQP reliability run rate management, enhance debug capabilities, support wafer-level reliability testing, and drive automation and digital transformation within the lab environment. Key Responsibilities Support Device Reliability, Package Reliability, and Wafer Reliability execution. Monitor and manage IQP reliability run rates, sample flow, and hardware readiness. Perform first-pass failure analysis and product debugging using probe stations and other debug tools. Utilize AI-assisted tools to improve debugging efficiency, root cause investigation, and operational planning. Support automation projects, data analysis, dashboard reporting, and process improvements. Manage procurement, inventory, logistics, and laboratory readiness activities. Support audits, document contr

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Join our Advanced DRAM organization and help shape the future of memory technology! We are a team of world class engineers and scientists working in a leading-edge R&D environment to solve some of the industry's most sophisticated semiconductor challenges and to transform breakthrough concepts into manufacturable solutions. As a Process Integration Engineer, you will help define the future of memory technology by identifying novel solutions to scaling, performance, and power challenges in advanced semiconductor devices. You will work with experts in process development, device engineering, modeling, characterization, and reliability to develop and integrate new technologies from concept through implementation in silicon. Responsibilities: Lead integration activities for advanced semiconductor devices, including charge storage devices, thin-film transistors (TFTs), and related device structures Evaluate device operating mechanisms, failure modes, noise sources, and variability to improve device performance and reliability Partner with cross-functional teams to identify and resolve performance, yield, reliability, and product margin challenges Design, implement, and analyze experiments in the R&D fab to optimize process flows and meet product requirements Analyze inline, parametric, and probe data to drive yield improvement, process margin, and cost reduction Communicate sophisticated technical issues and lead teams toward achieving project goals <

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is looking for a dynamic and driven Silicon Supply Planner to help power the future of AI and computing hardware. In this role, you will support end-to-end silicon supply and production planning across foundry and OSAT partners, from wafer starts through assembly and test output. You will help translate demand into executable supply plans, track production and capacity, manage supply risks, and coordinate cross-functional recovery actions across advanced AI and computing hardware programs. This role is remote, based in Taiwan, with candidates located in Kaohsiung preferred. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are You have 3-6 years of experience in semiconductor supply planning, production planning, operations, or a related supply chain role. We ideally seek candidates who are fluent in both Mandarin and English and have 3–6 years of relevant experience. You understand semiconductor manufacturing flows, including foundry processes such as FEOL and BEOL, and OSAT operations such as wafer probe, assembly, and test. You are experienced in demand and supply balancing, forecasting, production tracking, capacity planning,

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Lead the Yield Analysis organization to achieve fab yield and quality goals by establishing strategy, priorities, and execution plans focused on Yield Deviation, Yield Tail reduction, yield ramp acceleration, and long-term yield improvement. Own key yield metrics and communicate performance, risks, and recovery plans to site and executive leadership. Establish and drive KPI-based yield management systems including Yield Loss, Static Yield, Yield Tail, Deviation Loss, Root Cause Identification Rate, Time-to-Source, CAPA Closure Rate, PFA Cycle Time, and Issue Tracker Health. Develop forecasting methodologies, dashboards, and operating mechanisms that drive accountability and predictable yield improvement. Provide technical leadership for Model-Based Problem Solving (MBPS) and Root Cause Analysis (RCA) by coaching engineers to move beyond symptom identification and achieve verified physical root cause. Drive rigorous problem-solving methodologies including hypothesis testing, fault-tree analysis, 5-Why investigations, DOE development, and statistical validation. Lead cross-functional issue resolution teams by partnering with Process Integration, Process Engineering, RDA, Failure Analysis, Quality, and Manufacturing organizations to prioritize yield opportunities, accelerate containment actions, implement CAPAs, establish robust defense lines, and ensure sustainable issue closure. Drive advanced yield analytics and deep probe-data mining capabilities across the organization. Ensure teams effec

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Key Responsibilities Validation Execution Lead end‑to‑end Validation Run execution in a high‑pressure, fast‑paced environment , ensuring on‑schedule starts/completions , risk‑aware re‑plans , and efficient IQP/ETV material usage . Own time‑bound data crunching pipelines (automated log parsing, metrics aggregation, anomaly ranking) and deliver decision‑ready summary reports and sightings by agreed Cycle Time . Guarantee coverage completeness across MBIST and Native flows; drive Hot/Cold corners , TSV screen/AQLK , async timing boundary coverage, and evidence‑backed closure . Platform Leadership Develop and debug test programs on SM3/Cobra and Advantest V93K ; enforce code quality, reviews, and release discipline. Align hardware configs ( handler, socket, loadboard, probe card ) to test intent and throughput targets. Advanced Analysis, Verilog Simulation & Automation Perform power/thermal characterization ; correlate IDD/thermal data with performance/reliability; author recommendations for content changes and silicon fixes. Architect and execute

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Responsibilities Validation Execution Assist in executing Validation Runs on IQP/ETV materials under defined timelines, ensuring coverage completeness across MBIST and Native Mode flows. Support time-bound data crunching (log parsing, statistical summaries) and contribute to summary report preparation. Platform & Test Program Support Operate and debug programs on SM3/Cobra (MBIST) and Advantest V93K (Native) . Assist in hardware readiness: handler, socket, loadboard, and probe card setup. Technical Analysis & Simulation Validate high-speed I/O (>11 Gbps) and assist with eye diagram and signal integrity checks. Support Verilog simulation tasks (testbench execution, waveform review) to reproduce sightings and validate fixes. Data & Automation Develop basic scripts in Python for log parsing and data visualization. Maintain documentation in Confluence/Jira and version control in Git/Perforce. Debug & Collaboration Participate

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Key Responsibilities Validation Execution Lead end‑to‑end Validation Run execution in a high‑pressure, fast‑paced environment , ensuring on‑schedule starts/completions , risk‑aware re‑plans , and efficient material usage . Own time‑bound data crunching pipelines (automated log parsing, metrics aggregation, anomaly ranking) and deliver decision‑ready summary reports and sightings by agreed Cycle Time. Guarantee coverage completeness across Validation flows; drive Hot/Cold corners , screen , timing boundary coverage, and evidence‑backed closure . Platform Leadership Develop and debug test programs on ATEs like Advantest and In-house ATE; enforce code quality, reviews, and release discipline. Align hardware configs ( handler, socket, loadboard, probe card ) to test intent and throughput targets. Advanced Analysis, Verilog Simulation & Automation Perform power/thermal characterization ; correlate IDD/thermal data with performance/reliability; author recommendations for content changes and silicon fixes. Architect and execute Verilog simulations (bench cre