Process Integration And Defect Reduction Engineer Jobs

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Job Summary: As a Staff/Principal Engineer, you will be a part of groundbreaking next generation NAND research & development dry etch team driving critical modules listed below. The position promises ample opportunities for innovation, collaboration and testing a new dimension and scaling with next generation NAND . You will work directly with process integration and other process areas such as Wet etch, CVD, Diffusion, Metals, Lithography & Dry Etch. You will be involved with innovative and outstanding dry etch chambers & own the process roadmap to meet program and yield goals. Your responsibilities include, but not limited to: Main Responsibilities: As a CMP Process Development Engineer, you will develop and optimize chemical mechanical planarization procedures. These procedures aim to improve product quality and reliability for the next generation of Micron's memory parts. Focus on understanding and improving the process margins required for meeting the mature yield goal for 3D NAND parts Advance

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities: Develop and implement process integration strategies to achieve flawlessly operational semiconductor devices. Work together with diverse groups to identify the most effective methods for incorporating new technologies into current workflows. Conduct data analysis to optimize performance and yield, ensuring world-class quality standards are met. Troubleshoot and resolve process-related issues, applying your proven expertise to maintain high efficiency and reliability. Promote continuous progress projects to compete against and outperform industry norms. Actively apply AI tools to improve work efficiency and productivity. Minimum Qualifications: Master's degree or equivalent experience in Electrical Engineering, Chemical Engineering, Materials Science, or a related field. Proven experience in semiconductor process integration and development. Strong analytical and problem-solving skills. Ability to work well with diverse functional groups. Proficiency in data analysis and statistical process control. Preferred Qualifications: Master's degree or higher in a relevant field, or equivalent experience. Experience with AI tools and their application in semiconductor processes. Familiarity with advanced semiconductor materials and device physics. Proven a

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsible for designing and analyzing digital and analog circuits used in the development of memory products. Engage in developing groundbreaking silicon-to-systems solutions – right from technology development and advanced memory designs to product development, systems design and validation resulting in world class memory solutions. Collaborate with various internal design and verification teams all over the world and support the efforts of groups, including Product Engineering, Test, Probe, Process Integration, Assembly and Marketing to proactively design products that optimize all manufacturing functions and assure the best cost, quality, reliability, time-to-market, and customer satisfaction. Responsible for power delivery network evaluation and optimization of DRAM designs, as well as design and optimization block level power generators. Utilize both analog and digital CMOS design skills to work on the analog circuits. Responsible for working with Product Engineering to verify silicon performance vs simulation performance of circuits you design. Work with Process integration and transistor modeling personnel in designing the circuits to be used on Micron's next groundbreaking process node. Review product requirements and logic diagrams for device definition. Responsible for projects, or portions of projects, to design, fabricate, modify, and evaluate semiconductor devices and components. Employer will accept a Bachelor's degree in Computer Engineering, Electrical Engineering, Electronics Engineering, or related field, followed by fi

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Job Summary As a Data Scientist at Micron, you will employ techniques drawn from mathematics, statistics, and information technology to uncover patterns in data, drive predictive models, and develop actionable solutions for advanced semiconductor manufacturing. Your primary focus will be to support Process Integration and Process Engineering teams to enhance product yield and improve process variation. You will interact closely with multi-functional process areas to solve manufacturing line problems and conduct root cause analysis. In this position, you will help develop software programs, algorithms, and automated processes to cleanse, integrate, and evaluate large datasets from multiple disparate sources—such as inline, param, and probe data—translating them into insights that directly improve process capability and device yield. Key Responsibilities Yield & Process Optimization: Collaborate with semiconductor manufacturing engineering teams to analyze inline/param/probe data to identify top yield detractors and drive continuous improvement. Data Pipeline & Automation: Extract, cleanse, and analyze datasets from SQL databases, sensor networks, and fabrication tool logs to support semiconductor manufacturing operati

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Job Summary As a Data Scientist at Micron, you will employ techniques drawn from mathematics, statistics, and information technology to uncover patterns in data, drive predictive models, and develop actionable solutions for advanced semiconductor manufacturing. Your primary focus will be to support Process Integration and Process Engineering teams to enhance product yield and improve process variation. You will interact closely with multi-functional process areas to solve manufacturing line problems and conduct root cause analysis. In this position, you will help develop software programs, algorithms, and automated processes to cleanse, integrate, and evaluate large datasets from multiple disparate sources—such as inline, param, and probe data—translating them into insights that directly improve process capability and device yield. Key Responsibilities Yield & Process Optimization: Collaborate with semiconductor manufacturing engineering teams to analyze inline/param/probe data to identify top yield detractors and drive continuous improvement. Data Pipeline & Automation: Extract, cleanse, and analyze datasets from SQL databases, sensor networks, and fabrication tool logs to support semiconductor manufacturing operati

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. The Senior Engineer supports advanced NAND dry etch process development by improving process windows, optimizing recipes, and troubleshooting yield/quality issues in collaboration with Process Integration and other module teams. The role requires strong experimental discipline (DOE/SPC), structured problem-solving, and the ability to translate technology requirements into production-worthy process improvements. Main Responsibilities Perform advanced dry etch process development tasks including process window analysis, recipe optimization, and tool continuous improvement evaluation for 3D NAND technology. Troubleshoot process issues as part of cross-functional teams to improve yield and quality and take ownership of assigned improvement opportunities. Collaborate with Process Integration and other process development areas (Wet Etch, CVD/Diffusion, Metals, Lithography, CMP) to develop and integrate solutions. Conduct root cause / failure mode analysis and work with vendors/suppliers where needed to close hardware/process gaps. Support pilot-line execution and process transfer activities as required by program needs. Other Responsibilities Drive

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. As a MTS (Member of Technical Staff) at Micron, you will join a groundbreaking Next Generation NAND research and development Dry Etch team. You will lead critical modules listed below. This position provides many opportunities for creativity, collaboration, and advancing scaling with Next Generation NAND. You will work closely with process integration and other areas such as Wet Etch, CVD, Diffusion, Metals, Lithography, and CMP. You will operate powerful dry etch chambers and manage the process roadmap to achieve program and yield goals. Your responsibilities include, but are not limited to: Leading development of Dry Etch technology and essential modules Become a Dry Etch Area expert Develop/innovate dry etch processes to meet structural and electrical specifications Work closely with hardware teams to develop the equipment roadmap for current and upcoming NAND products Show expertise in dry etch technology fundamentals and possess a mechanistic understanding of how process parameters affect outcomes Collaborate and lead multi-functional teams to solve complex structural problems Present process and technology development plans for current and upcoming technology nodes Stay proactive in predicting when and how future iss

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are seeking a Principal IO/Clocking Design Engineer to be a part of our design team working on critical high-speed circuits common to all DRAM related memory products! In this position, you will be responsible for the development, design, optimization, verification, and fan out of these high-speed circuits to all DRAM related projects at Micron. You will work on equalization and bandwidth extension to push the speed limits of the circuit and process technology, analyze resulting IO impairments, clock jitter and duty error impact to DRAM system and timing budget, and develop effective engineering solutions. Responsibilities: Innovate, design, optimize and verify high-speed IO and clocking circuits used in new DRAM products. Apply proven high-speed circuit design techniques and enhance critical performance evaluation of the IO data path and clocking path at circuit level. Develop accurate modeling, analysis and simulation methodology to capture key circuit performance metrics and their impact to product specifications at full-chip and system level. Work with Product Engineering and SI team to compare silicon performance with simulation results and support correlation activities. Collaborate with process integration and transistor modeling teams on Micron's next groundbreaking process node. Minimum Qualifications: Minimum MSEE + 10 years or BSEE + 12 years of industry experience in analog and mixed-signal circuit design. Proficiency w

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are seeking a Principal IO/Clocking Design Engineer to be a part of our design team working on critical high-speed circuits common to all DRAM related memory products! In this position, you will be responsible for the development, design, optimization, verification, and fan out of these high-speed circuits to all DRAM related projects at Micron. You will work on equalization and bandwidth extension to push the speed limits of the circuit and process technology, analyze resulting IO impairments, clock jitter and duty error impact to DRAM system and timing budget, and develop effective engineering solutions. Responsibilities: Innovate, design, optimize and verify high-speed IO and clocking circuits used in new DRAM products. Apply proven high-speed circuit design techniques and enhance critical performance evaluation of the IO data path and clocking path at circuit level. Develop accurate modeling, analysis and simulation methodology to capture key circuit performance metrics and their impact to product specifications at full-chip and system level. Work with Product Engineering and SI team to compare silicon performance with simulation results and support correlation activities. Collaborate with process integration and transistor modeling teams on Micron's next groundbreaking process node. Minimum Qualifications: Minimum MSEE + 10 years or BSEE + 12 years of industry experience in analog and mixed-signal circuit design. Proficiency w

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are seeking a Principal/Member of Technical Staff (MTS) IO/Clock Design Engeer to join our DRAM IP Design team and contribute to the development of critical high-speed IP circuits used across Micron’s DRAM memory products. In this role, you will be responsible for the design, development, optimization, verification, and technical support of these high-speed IPs. You will focus on equalization and bandwidth extension to push the limits of circuit and process performance, analyze IO impairments as well as clock jitter and duty cycle distortion, and assess their impact on DRAM system timing. You will also develop and implement effective engineering solutions to address these challenges. Relocation to Micron headquarter in Boise, Idaho is required for this position. Responsibilities: Innovate, design, optimize and verify high-speed IO and clocking circuits used in new DRAM products. Apply robust high-speed circuit design techniques and enhance critical performance evaluation, including timing and jitter sensitivity, of the IO data path and clock path at circuit and full-chip level. Develop accurate modeling, analysis and simulation methodology to capture key circuit performance metrics and their impact to product specifications at full-chip and system level. Work with Product Engineering and SI team to compare silicon performance with simulation results and support correlation activities. Collaborate with process integration and transistor

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Our vision is to transform how the world uses information to enrich life for all . As a team member of technology development reliability group, you will be working with DRAM device/process development team and circuit design team. You will be responsible for analyzing reliability performance of hot carrier, bias temperature instability, electromigration etc. for each cell transistor, high performance CMOS and advanced interconnect. Also, you will be responsible for reliability model building and the consultation from device development team and circuit design team. The reliability is one of the important pillar for device scaling and state of the art technology development. Its work is based on understanding the semiconductor device physics, DRAM architecture knowledge, DRAM process integration knowledge. For the new reliability findings during the technology development phase, to point in the right direction is required. Responsibilities and Tasks: Develop and implement test methodologies to evaluate wafer-level & circuit-level reliability behavior and performance. Analyze results and create reports to deliver decision-ready, actionable recommendations for guiding technology development. Collaborate with Process Integration and characterization teams to correlate reliability signature with process conversions and parametric test data. Integrate other data sources (inline metro, param,

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. As a S MTS ( Seni o r Member of Technical Staff) , you will be a part of revolutionary Next Generation NAND research & development Dry Etch team driving Advanced NAND and dry etch technology forward . The position promises ample opportunities for innovation, collaboration and testing a new dimension and scaling with Next Generation NAND . A SMT S Dry Etch Engineer is a senior individual contributor responsible for defining, developing, and transferring advanced dry etch processes for Micron NAND technologies. You will work directly with process integration and other process areas such as Wet Etch, CVD, Diffusion, Metals, Lithography & CMP . You will work on state of the art <

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. As a DMTS (Distinguished Member of Technical Staff), you will participate in a groundbreaking Next Generation NAND research and development Dry Etch team moving Advanced NAND and dry etch technology forward. The position provides ample chances for innovation, cooperation, and exploring new scaling methods with Next Generation NAND. A DMTS Dry Etch Engineer is a senior individual contributor and top industry expert who defines, develops, and transfers advanced dry etch processes for Micron NAND technologies. You will work directly with process integration and other areas including Wet Etch, CVD, Diffusion, Metals, Lithography, and CMP. You will operate innovative dry etch chambers and lead the process roadmap to achieve program and yield targets. Your responsibilities include, but are not limited to: Leading advancements in Dry Etch technology and essential module development Act as a technical expert for dry etch process, hardware and applications in NAND technology development at F10, Singapore. Your position encourages delivering broad technical vision, deep domain expertise, and perspective advised by extensive knowledge of dry etch physics/chemistry. Define the equipment roadmap. Work together with suppliers and develop a mechanism-focused logical hardware ro

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Department Intro: The Advanced Packaging Technology Development (APTD) team at Micron leads the creation of powerful memory and storage solutions that power the AI era. We work hands-on with global R&D groups, suppliers, and manufacturing teams to turn breakthrough ideas into real, production-ready technologies. We thrive on innovation and collaboration! Position Overview: This role will be part of a highly collaborative and innovative Advanced Packaging Wafer Edge Trim, Backgrind & Thinning R&D team, responsible for developing and scaling critical mechanical wafer processing modules. This role offers broad opportunities for technical innovation, early stage pathfinding, and ownership of process solutions that enable next generation advanced packaging technologies. You will work closely with process integration and adjacent process areas including Bonding/De-bonding, CMP, Wet Etch, Lithography, Assembly, and Test, while driving process readiness to meet bold program, performance, and yield targets. Responsibilities: Develop and optimize wafer edge trim, backgrind, and thinning processes to meet the mechanical, electrical, and reliability requirements of Micron’s advanced memory products. Improve process capability, yield, cost efficiency, and wafer integrity through data‑driven optimization and equipment or consumable innovation. Conduct root‑cause and failure‑mode analyses to understand wafer damage mechanisms such as edge chipping, micro‑cracks, subsurface damage,

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron’s Design Engineering Group (DEG) is where bold ideas become real technology. We push the limits of memory and storage innovation, and we thrive in a collaborative environment where engineers learn, build, and solve challenges together. We are driven by curiosity, creativity, and the pursuit of better solutions every day! As a Design Engineer, you will help shape the next generation of Micron’s memory products. You’ll work closely with global design, verification, and product teams to bring innovative circuit designs from concept to silicon. Your work will directly influence product performance, quality, and reliability—and contribute to advancements that define the semiconductor industry. Responsibilities: Design, optimize, and verify block‑level circuits for DRAM projects Compare silicon performance with simulation results and support correlation activities Collaborate with process integration and modeling teams on new process node development Partner with global design groups and provide layout guidance through post‑layout simulation Minimum Qualifications: Bachelor’s degree in Electrical Engineering with 2&#43; years of semiconductor design or manufacturing experience Demonstrated experience in mixed-signal, digital, or analog IC design Experience designing regulators, charge pumps, oscillators, current references, bandgaps, or comparators Proficiency with SPICE and Verilog modeling and simulation Experience working wi