Process Integration And Defect Reduction Engineer Jobs

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Job Summary As a Process Integration Module Engineer in the Process Integration department, you will be responsible for coordinating improvements in Yield, Quality, and Output for the NAND Flash production line. Day-to-day responsibilities include but not limit to crafting and analyzing process experiments, teaming with YE and PQA to investigate yield and quality problems, and working with production and process engineering teams to ensure the smooth operation of the fab. Main Responsibilities Collaborate with multi-functional teams from PIE, Process & Equipment Engineering, WLR, TD to improve product yields and reliability within your assigned process loop. Communicate module related issues to the Fab engineering and leadership teams. Design, execute, and analyze experiments to improve fab process, yield, and quality. Collect and interpret complex data to optimize Fab processes and increase yields. Engage and/or lead cross-area engineering teams to tackle process issues. Work closely with global partners to stay ahead of on module related topics and process alignment projects. Collaborate with other PI module

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Join Micron’s DRAM R&D Memory Group and help shape the future of memory technology. Our team develops the innovations that enable next-generation DRAM scaling in an industry-leading 300mm research facility located alongside our expanding manufacturing campus. We work at the intersection of device physics, process technology, and product innovation to solve some of the semiconductor industry’s most complex challenges. As a Process Integration Engineer, you will play a key role in developing and integrating critical technologies that enable future DRAM generations. You will define structural and electrical requirements, collaborate with cross-functional engineering teams, and drive solutions from concept through manufacturing transfer. This is an opportunity to influence core memory technology while working in a highly collaborative and technically rigorous environment. Responsibilities: Develop and integrate novel process flows for critical DRAM modules, including structural, electrical, and design rule requirements Design and execute experiments (DOE), analyze data using statistical methods, and apply findings to improve device performance and yield Partner with Design, Product Engineering, Process Development, Modeling, Yield Enhancement, Failure Analysis, Parametric, and Quality teams to resolve technical challenges Summarize complex issues, drive alignment across stakeholders, and implement effective solutions Collaborate with Manufacturing to successfully transfer new

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. At Micron, we believe in encouraging a culture of innovation and excellence. The PDE Process Integration (PI) Senior Manager role offers an outstanding chance to lead a distributed team in defining, standardizing, and driving High Bandwidth Memory (HBM) New Product Introduction (NPI) success across several locations. This position blends strategic leadership, scaling of operations, and coordination across sites. It aims to ensure consistent PI readiness, faster yield ramp, and strong risk management from development through High Volume Manufacturing (HVM). Job Responsibilities Define and drive PI strategy, standards, and guidelines across HBM programs. Coordinate PI execution across multiple HBM NPI programs, ensuring delivery against network-level achievements and ramp targets. Ensure robust risk identification, early detection mechanisms, and mitigation strategies. Serve as the central PI leader collaborating with various engineering and manufacturing organizations. Champion the adoption of AI-enabled tools for yield analysis and risk prediction. Organizational Leadership & Talent Strategy Guide and grow a group of PI managers and senior engineers spanning several locations or departments.

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. As a Senior/Staff NAND Module Process Integration Engineer in the Singapore R&D department at Micron Technology Inc., you will be responsible for designing, developing, integrating, and implementing innovative and effective process solutions to improve next-generation 3D NAND Product Yield and Quality with competitive cost and performance within the required timeline. Your responsibilities will include, but are not limited to, the following: Module Ownership : Lead one or more process modules related to the development and operation of a 3D NAND semiconductor integrated circuit. Specification definition : Define structural specifications and process requirements for assigned modules. Strategic Direction: Set a clear direction and vision for the module and have a well-defined continual improvement plan. Proactive Issue Resolution: Be proactive in identifying potential structure, electrical and reliability issues and addressing them early with process control. Solve problems with a model-based approach. Performance Optimization: Focus on structural development, electrical performance, parametric verification, and process control and manufacturability assessment and optimization. Material

What is JetZero ? Today’s aircraft contribute around 4% of global CO2 emissions, equivalent to the emissions of 200 million cars. This is only going to increase: Air travel is forecasted to double by 2050, while meaningful efficiency gains using current airplanes have hit a wall. JetZero is developing a b lended - wing body (BWB) aircraft . It uses up to 50% less fuel and will be built to accommodate zero-emission hydrogen propulsion. JetZero is the inevitable solution to sustainable air travel. The JetZero Team We are experienced aerospace professionals and engineers, excited about the future. That future will only be possible if we share our vision and what it means to people’s lives: carbon-free flight that ' i s better for both passengers and airlines around the world . JetZero is seeking an experienced Senior Aircraft Integration Engineer to support JetZero’s build and integration efforts at Mojave Air and Space Port. This position will accomplish JetZero’s integration of systems and subsystems alongside the manufacturing efforts of Scaled Composites. Aircraft Integration Engineers, including Senior level, will support development of work instructions and provide the on-site technical direction for in-process build and integration efforts in Mojave. Duties include shop coordination of weekly tasking with Scaled Composites, as well as overall management of JetZero’s onsite team execution. Other on-site duties include development of JetZero processes and procedures and coordination with JetZero’s off-site functional managers. Senior Aircraft Integration Engineer will also assist in leading the Aircraft Integration Engineering team. What You'll Do: Under the direction of JetZero’s Build Manager, support development and refinement of work instructions necessary to effectively integrate systems and subsystems into the Demonstrator airframe. In coordination with the Demonstrator Chief Engineer, provide on-site adjud

EnCharge AI is a leader in advanced AI hardware and software systems for edge-to-cloud computing. EnCharge’s robust and scalable next-generation in-memory computing technology provides orders-of-magnitude higher compute efficiency and density compared to today’s best-in-class solutions. The high-performance architecture is coupled with seamless software integration and will enable the immense potential of AI to be accessible in power, energy, and space constrained applications. EnCharge AI launched in 2022 and is led by veteran technologists with backgrounds in semiconductor design and AI systems. The Role We are seeking a thorough SOC Physical Verification & Integration Specialist to drive the physical assembly and signoff of our next-generation SOCs. In this role, you will own the physical integration strategy from the floorplan stage through to tapeout, ensuring seamless assembly of massive multi-hierarchical blocks. You will act as the critical bridge between block-level implementation, top-level integration, and final foundry signoff, ensuring that complex physical bottlenecks are resolved without compromising power, performance, or area (PPA). Key Responsibilities Top-Level Physical Integration: Drive the full-chip physical assembly of very large-scale SOCs (e.g., multi-billion transistor designs). Manage top-level floorplanning, bump planning, global power grid (PG) integration, and top-level clock/routing integration. Hierarchical Verification Methodology: Architect and deploy highly efficient, hierarchical physical verification (PV) flows. Define the boundary conditions, abstraction models, and interface rules required to assemble heavily partitioned, massive-scale designs. Signoff Execution & Debugging: Own full-chip DRC, LVS, ERC, Antenna, ESD, and Latch-up signoff using industry-standard tools (e.g., Siemens Calibre) at advanced process nodes (5nm, 3nm, or below). Cross-Functional Collaboration: Partner tightly with the Physical Design (PD

Integration meets Innovation At Celigo, we believe integration should empower — not exhaust — innovation. As a modern Integration and Automation Platform (iPaaS), we’re on a mission to simplify how companies integrate, automate, and optimize processes. Powered by game-changing technology like runtime AI and prebuilt, mission-critical integrations, Celigo is redefining how businesses connect their world. We are seeking a Senior Integrations Engineer with expertise in Enterprise System Integrations and Business Process Automation. In this role, you will design, build, and deploy scalable integration solutions and automations, as well as develop AI chatbots using various technologies across multiple domains. The Global Technology Operations team is dedicated to digitally transforming and scaling Celigo's business, enhancing productivity, and improving operational efficiency. We work closely with top talent across the company to drive both our business operations and product development. As an Integrations Engineer, you will support the business and finance teams by seamlessly connecting systems and data. Additionally, you will build automations using integrator.io and AI concepts to eliminate redundant tasks, enabling teams to focus on higher-value activities. What would you do if hired? Champion the Celigo product through transformational integrations that enable scalable business growth. Design, build, and deliver scalable data pipelines leveraging modern cloud architectures. Collaborate with business process experts to develop solutions for complex systems and data platforms that drive revenue growth. Ensure your integrations adhere to engineering best practices, emphasizing data quality, accuracy, operability, and security. Contribute to the development of AI chatbots for internal stakeholders. Build and maintain trusted relationships with technical and business teams. Manage multiple projects concurrently, including operational tasks. Serve as the owner and final

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron Idaho Semiconductor Manufacturing (Triton) LLC Identify, diagnose and resolve DRAM (Dynamic Random Access Memory) process integration related problems; Coordinate and execute process, equipment and material evaluation / optimization initiatives and implement changes at process step; Lead / participate in continuous yield improvement and cost reduction activities; Validate and fan out new process baseline qualified, including new process, tools and/or materials for new product introduction; Support SPC/FDC/RMS/APC. Employer will accept a Master’s degree in Mechanical Engineering, Electrical Science, Material Science, Physics, Chemical Engineering, or related field. Position requires: 1. Validate and qualify processes, tools, and materials for product introduction 2. Manage and audit material suppliers to meet quality, cost, and risk objectives 3. Support internal and external audits 4. Sustain fab healthiness with daily monitoring 5. Drive effective process technology improvement that enables best-in-class yield, quality and cost As a world leader in the semiconductor industry, Micron is dedicated to your personal wellbeing and professional growth. Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future. We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that b

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It's a unique legacy of innovation that's fueled by great technology and amazing people. Today, we're harnessing the boundless possibilities of AI to build the next era of computing. An era in which our GPU acts as the brain of computers, robots, and self-driving cars that can understand the world. Accomplishing unprecedented goals calls for imagination, inventiveness, and exceptional talent from around the world. As a NVIDIAN, you'll be immersed in a diverse, encouraging environment where everyone is inspired to do their best work. Join our team and discover how you can build a lasting impact on the world. NVIDIA's Silicon Co-Design Group (SCG) leads the full product development lifecycle, from early architecture definition through silicon bringup to product release. The ArchDev team is the hub for silicon and system-level feature development, driving tradeoff analysis, system integration, and POR alignment across the entire organization. This is where ideas become chips, and chips become products that define the state of the art — and we're building that future with some of the most motivated engineers in the industry. We're looking for a Senior Memory Systems Engineer to own HBM and LPDDR integration in sophisticated SoCs. This role covers the full stack, including silicon, package, embedded software, testing, and product development. The engineer will resolve the toughest system-level memory challenges throughout the process, building solutions that hold up at scale. What you'll be doing: HBM & LPDDR System Integration and Bringup: Drive HBM and LPDDR system integration, bringup, characterization, and debug for next-generation SoCs — taking memory subsystems through the full arc from first silicon to production-ready at scale. Full-Stack Memory Closure: <s

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are the CMOS Device Integration Team at Micron, where we push the limits of memory technology every day. We work at the intersection of device physics, process integration, and product performance to enable the next wave of DRAM, HBM, and Compute-in-Memory innovation. If you’re excited by challenging technical problems and real-world impact, you’ll feel right at home here! In this role, you’ll serve as a technical leader shaping the future of Micron’s most advanced memory products. As a Distinguished Member of Technical Staff, you’ll drive CMOS device and module development that directly impacts array efficiency, data rates, and product scalability. Your expertise and influence will help guide technology decisions that power AI, high-performance computing, and emerging applications. Responsibilities: Develop and integrate advanced CMOS devices for next-generation DRAM, HBM, and emerging memory architectures Perform detailed electrical characterization of CMOS devices and circuits to drive performance improvements Partner with Design, TCAD, Modeling, Process, Reliability, and Layout teams to deliver integrated technology solutions Provide technical leadership, strategic recommendations, and clear presentations to guide technology direction Minimum Qualifications: Master’s degree or PhD in Electrical Engineering or equivalent practical experience 10 or more years of hands-on experience in advanced CMOS device design and/or integration 1

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. At Micron, the Process Pathfinding organization develops next-generation semiconductor memory technologies and innovative device architectures. The team focuses on advancing process technologies that enable future memory products through fundamental research, process integration, and collaboration across engineering fields. This is an outstanding opportunity to contribute to innovative semiconductor development in a fast-paced, knowledge-focused environment. As a DRAM Dry Etch Process Pathfinding Intern, you will support the development of advanced plasma etch processes for emerging memory technologies. Working alongside experienced engineers and multi-functional partners, you will gain hands-on experience with dry etch equipment, semiconductor process development, materials characterization, and data-driven problem solving. This role provides exposure to advanced manufacturing environments while contributing to process solutions that improve device performance and reliability. Responsibilities Conduct experiments and fundamental research to develop innovative dry etch solutions for next-generation memory technologies. Partner with the Pathfinding team to develop and optimize dry etch processes that meet physical and electrical performance requirements. Apply analytical, statistical, and problem-solving methods to evaluate process performance, hardware capability, and process capability, and aid in

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Description As Front End Central Product Integration, CPIE ( Central Product Integration Engineering) HBM (High Bandwidth Memory) PI Principal Engineer/Senior Manager at Micron Technology, Inc, you will be responsible for providing leadership to the global Micron network to drive leading edge HBM Product yield, quality improvement, new product introduction (NPI) through technical expertise, business process management and project execution, collaborating with Japan, Taiwan, Singapore and US team, driving product maturity within a defined schedule while maintaining the highest standards of quality. Responsibilities and Tasks STRATEGIC LEADERSHIP Work with FAB to drive for best-in-class (BIC) Yield ramping. Work with key business partners to develop strategic Process Integration tools, systems, methodologies, capabilities and roadmaps. Ensure such support and roadmaps meet business expectations to enable achievement of strategic objectives and Micron’s business plan. Create an environment with your group that encourages innovation and technical leadership. TACTICAL LEADERSHIP Conduct ongoing metrics reviews of critical group deliverables to business. Ensure work reviews are conduct

About the Team OpenAI Finance is responsible for ensuring the organization is set up for success in pursuit of its mission. The Finance Program Management Office (FinPMO) is responsible for driving and scaling cross-functional finance programs and M&A integrations. FinPMO partners closely across Accounting, Strategic Finance, Corporate Development, Equity, Procurement, Treasury, Risk, and Legal to ensure financial change through M&A and other new business models is executed in a controlled, auditable, and operationally effective way. FinPMO plays a critical role in managing M&A including financial deal diligence, finance operations, post-close integrations, reporting and controls. We help quarterback the M&A process to help ensure corporate integrations are executed cleanly, risks are managed proactively, and leadership has clear deal visibility. About the Role As a M&A Finance Integration Lead, you will own and scale OpenAI’s finance integration model. This is a highly cross-functional, transactions driven role for someone who can bring structure to ambiguity, translate deal complexity into executable workplans, and drive successful M&A outcomes across multiple teams. We’re looking for someone to be the central point of accountability to oversee finance workstreams across the full M&A lifecycle. You’ll ensure integrations are executed cleanly, financial risks are mitigated early, and our books, controls, and systems remain stable as OpenAI scales. This role is based in San Francisco, CA. We use a hybrid work model of 3 days in the office per week and offer relocation assistance to new employees. In this role you will: Define and build standardized, scalable M&A finance integration frameworks. Drive consistent execution across multiple, simultaneous M&A integrations. Ensure timely, accurate M&A diligence including historical financials, revenue, equity, tax, and procurement. Lead integration planning for deal close readiness a

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Primary Responsibilities AI-Driven Process & Yield Innovation Initiate and lead new AI/data solutions to uncover process, test, and design improvement opportunities, with specialization including but not limited to: UE_ROW & all quality indices Front End-PTS integration High-value-bits (PG2&#43;) yield Any yield improvement area spanning process, equipment, test, and design domains Develop AI-enabled modeling, monitoring, and benchmarking frameworks that push tool performance to best-in-class standards Champion process equipment prognostics and process integration optimization through machine learning and agentic AI frameworks Identify test optimization opportunities that directly translate into higher product grade yield Proactively discover and pursue new yield improvement vectors through data-driven insights and AI-assisted root cause analysis AI Agent Skill Development & Management Take end-to-end ownership of AI agent skill development — from requirements gathering and skill design to testing, deployment, and continuous improvement Architect and manage a portfolio of AI agents and skills tailored to semiconductor engineering use cases — including process monitoring, yield analysis, equipment diagnostics, and test optimization Prototype AI-assisted solution mock-ups, validate feasibility, and demonstrate measurable

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are the DRAM Technology Development team at Micron, pushing the limits of memory scaling and performance. Our work spans cutting-edge lithography and tight collaboration across integration, etch, deposition, and CMP to bring new nodes to life. If you enjoy solving complex patterning challenges on advanced tools including EUV we’d love to have you! In this role, you will lead photolithography process development for next-generation DRAM. You’ll own process modules, drive roadmap decisions, and translate concept to manufacturable solutions on pilot lines and into high-volume fabs. This is a hands-on, high-impact position working closely with cross-functional teams and equipment/material partners! Responsibilities: Develop and optimize photo processes to meet device physical and electrical requirements while reducing cost and variability Lead a lithography module; create manufacturing-friendly solutions across 365nm, 248nm, 193i, and EUV Partner with integration and unit process teams; drive vendor engagement for new materials and equipment solutions Analyze failures and process limits; perform root cause and DOE-based improvements Document plans, results, and drive transfer to production fabs Minimum Qualifications: Bachelor’s degree in engineering, physics, or related field and 7&#43; years of semiconductor experience, or MS/PhD with 6&#43; years in photolithography Deep knowledge of imaging