Production Supervisor Jobs

We anticipate the application window for this opening will close on - 2 Oct 2026 Careers that change lives start here. Medtronic is a global leader in healthcare technology with a Mission to alleviate pain, restore health, and extend life. Our 95,000 employees work across more than 150 countries to put patients first — developing innovative medical technologies that improve the lives of 72+ million patients each year. Your unique talents will help shape the future of healthcare while building a career grounded in purpose, growth, and impact. A Day in the Life Job Specific Summary In this exciting role as a Manufacturing Engineer for Medical Devices Operations you will have responsibility for executing detailed process analysis to assure that the operations are working in accordance with standard procedures and quality regulations. Also, you will have to perform equipment and process evaluations to determine methods for collecting objective data to identify opportunities of improvements and determine actions to increase current performance of the operations. Provide technical assistance to manufacturing and maintenance personnel to correct discrepancies, to update or to improve the equipment, machines and tooling used on production. At Medtronic, we bring bold ideas forward with speed and decisiveness to put patients first in everything we do. In-person exchanges are invaluable to our work. We’re working 5 days a week onsite as part of our commitment to fostering a culture of professional growth and cross-functional collaboration as we work together to engineer the extraordinary. Responsibilities may include the following and other duties may be assigned. Team with manufacturing, maintenance and quality personnel on a daily basis to review / disposition production defects and provid

At Gilead, we’re creating a healthier world for all people. For more than 35 years, we’ve tackled diseases such as HIV, viral hepatitis, COVID-19 and cancer – working relentlessly to develop therapies that help improve lives and to ensure access to these therapies across the globe. We continue to fight against the world’s biggest health challenges, and our mission requires collaboration, determination and a relentless drive to make a difference. Every member of Gilead’s team plays a critical role in the discovery and development of life-changing scientific innovations. Our employees are our greatest asset as we work to achieve our bold ambitions, and we’re looking for the next wave of passionate and ambitious people ready to make a direct impact. We believe every employee deserves a great leader. People Leaders are the cornerstone to the employee experience at Gilead and Kite. As a people leader now or in the future, you are the key driver in evolving our culture and creating an environment where every employee feels included, developed and empowered to fulfil their aspirations. Join Gilead and help create possible, together. Job Description The Senior Director, Applied AI Solutions, leads the applied AI function within the AI Research Center (ARC), part of Gilead’s Clinical Data Science (CDS) organization in Drug Development. As CDS’s center of excellence for applied AI, this leader is accountable for the technical and product path from a prioritized AI use case defined by CDS functional organizations to a trusted, reusable capability in production — spanning discovery, experimentation, technical validation, first production release, adoption support, and measured value. The ownership model is deliberate. Business ownership of priorities, requirements, funding, process change, and workflow outcomes remains with the CDS and Develo

At Gilead, we’re creating a healthier world for all people. For more than 35 years, we’ve tackled diseases such as HIV, viral hepatitis, COVID-19 and cancer – working relentlessly to develop therapies that help improve lives and to ensure access to these therapies across the globe. We continue to fight against the world’s biggest health challenges, and our mission requires collaboration, determination and a relentless drive to make a difference. Every member of Gilead’s team plays a critical role in the discovery and development of life-changing scientific innovations. Our employees are our greatest asset as we work to achieve our bold ambitions, and we’re looking for the next wave of passionate and ambitious people ready to make a direct impact. We believe every employee deserves a great leader. People Leaders are the cornerstone to the employee experience at Gilead and Kite. As a people leader now or in the future, you are the key driver in evolving our culture and creating an environment where every employee feels included, developed and empowered to fulfil their aspirations. Join Gilead and help create possible, together. Job Description We are in search of an Associate Director , Statistical Programming to join our team! Statistical Programming– Analysis Programming: Statistical programmers work collaboratively with internal colleagues and external vendors to ensure the efficient, high-quality production of analysis datasets and statistical outputs for study reports and integrated summaries in support of Gilead’s regulatory, scientific and business objectives. This is a HYBRID position at our Foster City, CA OR Raleigh, NC locations. This is NOT a fully remote position. Job Responsibilities: Works collaboratively with Clin

At Freddie Mac, our mission of Making Home Possible is what motivates us, and it’s at the core of everything we do. Since our charter in 1970, we have made home possible for more than 90 million families across the country. Join an organization where your work contributes to a greater purpose. Position Overview: We need a highly innovative Technical Lead! How confident are you that you can build sophisticated analytic systems? If you believe you could contribute to the development of innovative principles and ideas in a matrixed environment, please keep reading as we are seeking an individual contributor who has experience with Java and Python and can lead and nurture an inspiring environment in our Virginia office. Our Impact: The Investments and Capital Markets (I&CM) division is looking for a capable technology lead for its trading and analytics development team. This could be you! To thrive in this division, you must have a comprehensive understanding of system implementation and design, experience working in capital markets, and be enthusiastic about leading development of new paradigms in software system architecture. Your Impact: As a Trading Analytics Development Tech Lead, you will develop and maintain software using Java and Python tech stack that adheres to software engineering best practices. You will influence technical decisions, mentor developers, resolve engineering blockers, and partner with engineering managers to help teams deliver secure, reliable, and maintainable solutions. You will provide hands-on directions for full-stack applications, APIs, microservices, and integration services while reinforcing engineering discipline across design, development, testing, deployment, observability, and production readiness. Partner closely with Product Owners, engineering managers, architecture, business stakeholders, and cross-functional tec

The Silicon Co-Design Group (SCG) sits at the crossroads of architecture, design, marketing, operations, and productization. Our work spans early architecture through final product delivery across Datacenter, Gaming, Robotics, Automotive, and Embedded markets. We work closely across functions to deliver chips that change what is possible. System Integration sits at the intersection of all of them. It is the layer where every architecture, design, software, and manufacturing decision meets reality. When something breaks late in a program, it usually breaks here first. We are hiring a Senior Manager to lead this team in the US and partner closely with teams globally. Your work will sit on the critical path of every NVIDIA silicon program, and the bar you set for system integration is the bar we ship to! The two hardest, highest-leverage problems in this seat: Find critical silicon issues earlier — often before software is production-ready. Left-shifting post-silicon coverage is the highest-value thing System Integration can do. Standing up wide-area testing as a repeatable capability is a core part of the role. Keep programs on milestone when upstream dependencies slip. Validation plans collide with reality every program! The team needs new strategies, not just contingency plans, to keep moving when software, firmware, or methodology slip. You will design and run those strategies. What you’ll be doing: Plan and execute post-silicon feature integration, PVT validation, and wide-area testing across NVIDIA’s GPU, SoC, and CPU programs. Build wide-area and in-system test as a repeatable capability that shifts post-silicon coverage left, so issues surface before we are production-ready. Lead resolution of the most complex system-level issues, RMAs, and HW/SW interaction problems with creative workarounds and focused lab experimentation. Deve

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It's a unique legacy of innovation that's fueled by great technology and amazing people. Today, we're harnessing the boundless possibilities of AI to build the next era of computing. An era in which our GPU acts as the brain of computers, robots, and self-driving cars that can understand the world. Accomplishing unprecedented goals calls for imagination, inventiveness, and exceptional talent from around the world. As a NVIDIAN, you'll be immersed in a diverse, encouraging environment where everyone is inspired to do their best work. Join our team and discover how you can build a lasting impact on the world. NVIDIA's Silicon Co-Design Group (SCG) leads the full product development lifecycle, from early architecture definition through silicon bringup to product release. The ArchDev team is the hub for silicon and system-level feature development, driving tradeoff analysis, system integration, and POR alignment across the entire organization. This is where ideas become chips, and chips become products that define the state of the art — and we're building that future with some of the most motivated engineers in the industry. We're looking for a Senior Memory Systems Engineer to own HBM and LPDDR integration in sophisticated SoCs. This role covers the full stack, including silicon, package, embedded software, testing, and product development. The engineer will resolve the toughest system-level memory challenges throughout the process, building solutions that hold up at scale. What you'll be doing: HBM & LPDDR System Integration and Bringup: Drive HBM and LPDDR system integration, bringup, characterization, and debug for next-generation SoCs — taking memory subsystems through the full arc from first silicon to production-ready at scale. Full-Stack Memory Closure: <s

NVIDIA's accelerated computing platforms move data at speeds that push the limits of what silicon and physics allow. Whether a high-speed interface trains reliably, maintains accurate margins, and survives every platform topology it will ever see is a question we answer ourselves. This role does that work. The Silicon Co-Design Group leads the boundary between what was designed and what was built. When a GPU, CPU, or SoC ships with interfaces that work at scale, this team is the reason. Most engineers debug within a layer. You will own the full stack. When an interface fails to train, the link margin is unexpectedly tight, or a customer reports a critical silicon issue, you trace the problem through protocol behavior, signal integrity, firmware, platform topology, and silicon marginalities. You then confirm that the fix works. Your methodology shapes how NVIDIA validates high-speed interfaces across generations. Your decisions affect yield, production ramp, and field quality. This is not a coordination role. The engineers who do it well hold protocol depth and system breadth simultaneously, never lose the thread across hardware, firmware, and software, and have the judgment to know when to go deeper and when to act. They are rare. Should that describe you, read on. What you'll be doing: Own post-silicon bring-up, characterization, validation, and debug of PCIe, NVLink, C2C, and other HSIO interfaces across NVIDIA GPUs, CPUs, and SoCs from first power-on through production readiness. Close the hardest failures. Drive root cause across protocol behavior, signal integrity, firmware and driver interactions, platform topology, and silicon marginalities and own every fix through to confirmation. Define validation strategy. Set test coverage, debug priorities, margining methodology, and stress criteria f

NVIDIA silicon runs the world's AI infrastructure. The frequency it delivers across every voltage, process corner, and workload is not assumed. It is measured, correlated, and validated. This role does that work. The Silicon Co-Design Group is where architecture intent becomes silicon reality. We own the boundary between what was designed and what was built, and we are the team that knows the difference. When a program ships at frequency and at quality, this team is a reason why. You will be the person who follows through between simulation and silicon. When the model is wrong, a frequency corner that doesn't hold, a Vmin that walks, a critical path that timing analysis missed, you find out why, and your data is what the rest of the program acts on. Architecture, design, and product teams do not guess. They use your numbers. The engineers who do this well are rare. They think like circuit designers, work like experimentalists, and reason like data scientists. If that is you, read on. What you'll be doing: Own silicon speed characterization from first power-on through production sign-off, covering frequency, Vmin, Vmax, and timing margins across the full PVT space. Close the correlation gap. Tie pre-silicon timing analysis and critical path predictions to measured silicon, quantify where the model diverges from reality, and produce analysis that architecture and design can act on with confidence. Trace failures to their source, whether a microarchitectural bottleneck, a critical path that doesn't close under voltage, a clocking issue, or a process corner the model didn't anticipate, and drive the resolution. Own and build AI agents that work at your direction: automated test orchestration, intelligent data pipelines, and analysis flows that expand coverage and compress cycle time without sacrificing difficulty. Know where AI accelerates real work and whe

We’re building a world of health around every individual — shaping a more connected, convenient and compassionate health experience. At CVS Health®, you’ll be surrounded by passionate colleagues who care deeply, innovate with purpose, hold ourselves accountable and prioritize safety and quality in everything we do. Join us and be part of something bigger – helping to simplify health care one person, one family and one community at a time. POSITION SUMMARY CVS Health is seeking a Senior Full Stack Engineer, Agentic AI Platform to join and lead engineering efforts for Lumina, CVS Health's enterprise knowledge and agentic AI platform. The Senior Full Stack Engineer, Agentic AI Platform will provide both technical and people leadership while driving the evolution of a platform that delivers trusted, secure, and governed AI experiences across the enterprise. As a Senior Full Stack Engineer, Agentic AI Platform, you will own the technical direction, architecture, scalability, and operational excellence of Lumina while leading a team of engineers and data scientists responsible for building and supporting the platform. This is a hands-on leadership role requiring active contribution to production code, architectural decision-making, code reviews, and engineering best practices, while simultaneously coaching and developing team members. The Senior Full Stack Engineer, Agentic AI Platform will play a critical role in advancing agentic AI capabilities, retrieval-augmented generation (RAG) systems, Model Context Protocol (MCP) integrations, enterprise search, knowledge ingestion, and AI governance. You will drive platform enhancements that improve retrieval quality, strengthen security and access controls, expand automation capabilities, and ensure the platform remains reliable, observable, and scalable as adoption accelerates across CVS

Our Purpose Mastercard powers economies and empowers people in 200&#43; countries and territories worldwide. Together with our customers, we’re helping build a sustainable economy where everyone can prosper. We support a wide range of digital payments choices, making transactions secure, simple, smart and accessible. Our technology and innovation, partnerships and networks combine to deliver a unique set of products and services that help people, businesses and governments realize their greatest potential. Title and Summary Lead Network Architect (Cisco, F5, Palo Alto) Who is Mastercard? Mastercard is a global technology company in the payments industry. Our mission is to connect and power an inclusive, digital economy that benefits everyone, everywhere by making transactions safe, simple, smart, and accessible. Using secure data and networks, partnerships and passion, our innovations and solutions help individuals, financial institutions, governments, and businesses realize their greatest potential. Our decency quotient, or DQ, drives our culture and everything we do inside and outside of our company. With connections across more than 210 countries and territories, we are building a sustainable world that unlocks priceless possibilities for all. Overview The Systems and Platform Architecture team is looking for a Lead Network Architect to design and provide oversight through all stages of the development life cycle from bid, concept through architecture, design, build, test and delivery into production. Role Typically, the role will require the holder to: • Produce High Level Designs for Platform infrastructure solutions. • Maintain the technology roadmap for Platform / Unix Solutions in line with end of support dates. • Work closely with cross functional teams including Delivery, Engineering and Operatio

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Job / Role Summary The Staff Engineer owns defined Realtime Defect Analysis (RDA) scope within NAND Technology Development, developing and sustaining advanced defect detection and inspection strategies that accelerate learning, improve yield, and support technology transfer to manufacturing. This role leads defect analysis, inspection recipe and sampling optimization, excursion containment, and cross-functional issue resolution. The position collaborates with Process Integration, Yield, Data Science, Global Manufacturing, and equipment suppliers to strengthen process monitoring, standardize Best Known Methods, and align inspection capability with future NAND technology nodes. Main Responsibilities Own the site-level RDA strategy and annual roadmap aligned with NAND Technology Development nodes. Lead analysis of experimental and production flows to detect, classify, and trend systematic and random defects. Establish, track, and report program health metrics, including baseline he

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Principal Engineer - Process Development, CMP, NAND Job / Role Summary The Principal Engineer provides technical leadership for Chemical Mechanical Planarization (CMP) process development supporting advanced 3D NAND and future technology nodes. This role leads process characterization, margin improvement, integration, and transfer readiness, while driving cross-functional alignment with global development, manufacturing, equipment, and supplier teams. The position resolves complex process, yield, defectivity, and manufacturability challenges, influences module and site-level technical direction, and advances robust CMP capability for high-volume production through disciplined experimentation, process control, and technology roadmap execution. Main Responsibilities · Lead CMP process characterization and advanced process development for 3D NAND and future technology nodes. · Define and execute CMP process strategies that improve process margin, robustness, manufacturability, yield, and performance. · Lead complex experiments and data analysis to validate process windows, technology scaling readiness, and integration requirements. · Drive transfer of developed CMP processes to high-volume manufacturing at Fab10N and lead cross-func

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Join our dynamic and innovative Team at Micron site in Vimercate, Italy! Department intro: Process and Device Technology Development (PDTD) is a core R&D organization within Micron’s Technology Development group responsible for developing the next generation of semiconductor memory technologies. The team drives innovation in process integration, device architecture, materials, characterization, modeling, and reliability for NAND products. Working closely with design, manufacturing, product engineering, and research partners, PDTD enables the technologies that become Micron’s future memory products. Position overview The mission of a device engineer working in Process and Device Technology Development team at Micron Technology Inc. is analyzing, modeling and improving the device electrical characteristics for the next generation NAND technologies in order to meet the performance and reliability specs required for NAND products within project timelines. Responsibilities: Contribute to device characterization and modeling for next generation NAND technologies. Define and execute new test flows to measure critical array electrical characteristics and define automatic electrical monitors for volume production. Understand NAND ce

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. This role is for fresh-graduate or candidates with experience under 2 years. Key Responsibilities: You will work closely with multiple teams that make up IT, Information security and Technology to drive impactful change. Design, engineering and implementation of application security solutions in a scalable way for a worldwide enterprise. Analyze and troubleshoot systems issues. Ensure that the potential impact of software development changes is well understood, using data to support understanding of upstream and downstream dependencies. Collaborate closely with cross-functional teams for end-to-end testing and performance analysis of real-time data applications, solve issues, proactively identify new opportunities, and drive initiatives through to completion Preferred Qualifications: - Strong programming skills in C, C&#43;&#43;, C#, or Perl - Ability to read, debug, and maintain existing production code - Experience with software design, development, testing, and troubleshooting - Passion for problem-solving and continuous improvement AI Relevant Job Responsibilities: Integrates AI-assisted tools and insights into daily work to improve efficiency, quality, or effectiveness, exercising sound judgment and complying with organizational standards and legal requirements. Contributes to a culture of continuous improvement b

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Description Job Purpose The Facilities Senior Manager is responsible for continuous, safe, and compliant operation of all fab facilities and critical utilities supporting semiconductor manufacturing in Operation, Maintenance, Engineering and Hook Up. This includes bulk and high-purity gas distribution systems, chemicals, Ultra‑Pure Water (UPW), wastewater treatment, HVAC and cleanroom environmental control, electrical systems, and building infrastructure in a 24×7, This role directly impacts yield, uptime, safety, and customer audit outcomes . Core Responsibilities Fab Facilities & Critical Utilities Operations/Maintenance and Engineering Lead operations of bulk & specialty gas systems, chemical distribution systems, UPW, process cooling water, wastewater treatment, Electrical System, Building Infrastructure HVAC, and cleanroom environmental systems . Ensure continuous availability of all utilities required for Manufacturing with minimal production impact. On Time Hook Up of Production tools Own facility incident response and serve as first responder for site‑wide facilities and hook up events. 2. Cleanroom & Environmental Control Maintain clean room temperature, humidity, pressure, and contamination control within fab‑defined limits. Coordinate filter maintenance, airflow verification, and critical environmental alarms to protect yield‑sensitive operation