Senior Bring Up Methodology Lead Jobs

About us Graphcore is one of the world’s leading innovators in Artificial Intelligence compute. It is developing hardware, software and systems infrastructure that will unlock the next generation of AI breakthroughs and power the widespread adoption of AI solutions across every industry. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. Together, they share a bold vision: to enable Artificial Super Intelligence and ensure its benefits are accessible to everyone. Responsibilities and Duties We are seeking a highly skilled System Tests & Diagnostics Engineer to develop, extend, and integrate specialized silicon validation and diagnostics tools for next-generation AI SoCs. Unlike traditional validation roles focused on executing test plans, this position is responsible for developing the diagnostic software and stress tools that expose hardware failures, characterize silicon behavior, and improve platform observability throughout bring-up and validation. You will work closely with Arm engineers to understand and extend existing diagnostics technologies while developing Graphcore-specific capabilities for future AI hardware. Role Summary You will work with existing Arm-developed diagnostics technologies and extend them to support Graphcore's next-generation AI silicon. You will be responsible for developing system-level diagnostics and stress tools that integrate with an existing framework to detect data integrity, computational correctness, performance, and reliability issues across CPUs, AI accelerators, memory, storage, PCIe, firmware, BMC, and other platform components. Examples include silent data corruption (SDC) tests, power transient stress tools, and platform diagnostics, with opportunities to develop new diagnostics as future hardware capabilities evolve. This role requires close collaboration with hardware architects, firmware enginee

We are seeking a highly skilled and hard-working Senior Test Developer / test engineer to join our multifaceted Enterprise Software QA team. This role offers an outstanding opportunity to leave your mark on the design, construction, optimization and testing of large-scale infrastructure for various foundational NVIDIA unified cloud services and data center offerings. If you are a dedicated engineer with strong expertise in cloud infrastructure and distributed systems and want to apply your skills with AI tools, this role could fit you perfectly. You will thrive in an exciting, innovative environment. What you'll be doing: Work with development teams on test plans for all layers of SW stack for cloud infrastructure, execution, reviews, failure analysis and assessing overall quality and risk. Work with customer PMs on software issues including technical feedback from OEMs and CSPs. Develop key benchmarks to track execution and deploy process improvements to improve efficiency Leverage AI skills to expedite the test scope, test plan, execution and automation workflows. Lead NVIDIA Cloud and Data Center bring up activities which will involve validation, reporting, working with engineering to debug issues, providing design input at times, adding coverage in different areas. Design, develop and maintain CI/CD pipelines for continuous testing in cloud environments when needed. Perform performance, scalability, and reliability testing of cloud services. Implement and maintain test environments in cloud platforms such as AWS, Azure, or Google Cloud. Supervise the infrastructure to alert on significant events, ensuring the highest level of system performance and reliability. Work with various different partner teams to ensure availability of clusters to test on and take the lead in resolve all issues. Working with tea

Everpure (NYSE: P) has evolved from storage pioneer to data platform, closing fiscal 2026 with $3.7 billion in revenue, its first billion-dollar quarter, and accelerating growth into FY27. Our strategic agenda spans the companies defining the next era of technology - hyperscalers, AI labs, the AI hardware supply chain, data platform providers, and the broader AI ecosystem. This type of work—work that changes the world—is what the tech industry was founded on. So, if you're ready to seize the endless opportunities and leave your mark, come join us. THE ROLE We are seeking an experienced Platform Software Engineer for our Systems Software Team. You will be working as part of a dynamic team and will be responsible for designing, developing, and testing system software functionality for Pure’s upcoming platforms. The work spans the gamut of Systems software and you will have the opportunity to work in a wide range of areas and features ranging from Platform drivers to networking and storage layers. WHAT YOU'LL DO Plan and influence the lifecycle of new Hardware Platforms. Work on problems ranging from design, bring up, to deployment, upgrades and fleet level reliability. Participate in the full lifecycle of new hardware platforms from early bring up through manufacturing release. Work closely with peer teams to debug complex HW/FW of new server hardware, including CPUs, chipsets, and peripheral components. Debug complex HW/FW issues across x86, PCIe, NVMe, and networking using lab tools (oscilloscope, logic analyzer, JTAG) and kernel/driver traces. Design, implement and improve remote server management capabilities (e.g., using standards like Redfish) and enhance Reliability, Availability, and Serviceability (RAS) features. Design, write and maintain software components in C/C++, Python, Golang and RUST. Collaborate with vendors on requirements specification and follow through to system delivery. Work closely with hardware engineers, system architects, and o

NVIDIA is now looking for a Senior Memory System Engineer to join our ASIC Memory Subsystem team! As a Senior Systems Engineer at NVIDIA, you'll join a group of hardworking engineers to develop and architect innovative Memory Solution for Tegra SoCs. In this position, you'll make a real impact in a multifaceted, technology-focused company. You will work with memory controller/PHY and Platform / System architect, Firmware, SI/PI, Memory suppliers to design and architect cutting edge, high speed and lower power memory technology for NVIDIA CPUs and SOCs. What You Will Be Doing: Analyze future DDR/LPDDR/HBM technologies to determine optimum performance, power, function and RAS in memory for Next generation SOC and Systems. Collaborate with ASIC Architects, Designers, Software and Firmware SW/FW teams to drive memory technology and associated requirements for memory controllers. Define Memory module, Package, and PCB layouts appropriate to the system workloads Debug and bring up memory evaluation / validation and failure issues on memory technology. Collaborate with DRAM suppliers and industry partners on to develop memory and memory related component technology. What We need to see: Bachelor's degree or master’s degree in Electrical Engineering, Computer Engineering (CE), or a related field (or equivalent experience) 10 years of proven track record in DRAM design, module design, or memory sub system design. Deep understanding and strong fundamental of memory design, features, ECC algorithm, SI and PI (Training algorithm) in DDR, LPDDR, and HBM. Strong understanding of memory sub system level interaction with Cache, Memory controller and PHY. Experience in the design, bring-up and validation for memory failure analysis Experience with Python, C/C

Join the NVIDIA's Solutions Engineering team that is reshaping the future of driving! Our goal is to build and deploy scalable solutions for autonomous vehicles and as a result, create safer and more efficient roads. Our team is hands-on, passionate about practical results, and values diversity. You will help craft the application software architecture by working closely with external partners developing on our platform and on collaborations across multiple teams within NVIDIA working on autonomous vehicles. You will also advance and refine the overall drivability of our solution, focusing on integration challenges and using your deep analytical skills to tease through the complexity of the system to find effective solutions. NVIDIA is widely considered to be one of the technology world’s most desirable employers, and is committed to fostering a diverse work environment and proud to be an equal opportunity employer. If you are passionate in bringing autonomous vehicles into the world and see the solution come together, we would like to hear from you! What you'll be doing: Shape the application architecture internally, with a focus on perception & sensor fusion, by collaborating closely with architecture and software development teams. Integrate and adapt NVIDIA solutions in target vehicles, ensuring that both perception and sensor fusion are adapted and tuned to meet the desired driving performance and functionality. Lead bring-up activities and provide technical support to resolve functional and perception & sensor fusion related issues. Perform and leverage in-vehicle and simulation test drives for functional and performance analysis on the recorded data. Work with our partners to efficiently integrate hardware and software components, understand the system architecture, profile performance, identify bottlenecks, and drive optimization <

Who We Are HP IQ is HP’s new AI innovation lab. Combining startup agility with HP’s global scale, we’re building intelligent technologies that redefine how the world works, creates, and collaborates. We’re assembling a diverse, world-class team—engineers, designers, researchers, and product minds—focused on creating an intelligent ecosystem across HP’s portfolio. Together, we’re developing intuitive, adaptive solutions that spark creativity, boost productivity, and make collaboration seamless. We create breakthrough solutions that make complex tasks feel effortless, teamwork more natural, and ideas more impactful—always with a human-centric mindset. By embedding AI advancements into every HP product and service, we’re expanding what’s possible for individuals, organisations, and the future of work. Join us as we reinvent work, so people everywhere can do their best work. About The Role The System Software team is responsible for firmware, operating system software, hardware-accelerated algorithms, and core developer frameworks supporting our products. We serve as the glue between our hardware teams and our higher-level software teams, and delight in finding creative solutions to complex, interdisciplinary problems as we bring our product visions to life. As a firmware engineer on our team, you will develop firmware for low-power embedded microcontrollers to coordinate sensors, ensure security and privacy, manage power subsystems, and more. You will also have plenty of opportunity to develop and grow your own management and leadership skills as you coordinate development efforts with vendors, consultants, and manufacturing partners. What You Might Do Design and develop firmware and embedded system architecture for leading-edge ARM-based MCUs in our prototypes and products Collaborate with the EE, RF, Security, Cloud Services, and AI models team to build high-performance, secure, reliable systems Bring up and debug new hardware in the lab and support

Who We Are HP IQ is HP’s new AI innovation lab. Combining startup agility with HP’s global scale, we’re building intelligent technologies that redefine how the world works, creates, and collaborates. We’re assembling a diverse, world-class team—engineers, designers, researchers, and product minds—focused on creating an intelligent ecosystem across HP’s portfolio. Together, we’re developing intuitive, adaptive solutions that spark creativity, boost productivity, and make collaboration seamless. We create breakthrough solutions that make complex tasks feel effortless, teamwork more natural, and ideas more impactful—always with a human-centric mindset. By embedding AI advancements into every HP product and service, we’re expanding what’s possible for individuals, organisations, and the future of work. Join us as we reinvent work, so people everywhere can do their best work. About The Role HP IQ's Connectivity team is seeking an Embedded Firmware Engineer with strong hands-on experience across RTOS and embedded Linux platforms. You'll bring up new hardware, develop and support firmware across core device subsystems, and help scale products from prototype to fleet deployment. A key part of this role is enabling on-device intelligence — bringing AI models, sensing algorithms, and local processing to lightweight, power-constrained devices at the edge. What You Might Do Design, develop, and debug firmware across RTOS and embedded Linux platforms. Lead hardware bring-up — board bring-up, driver integration, and firmware support through to production. Develop and maintain firmware for subsystems such as connectivity, power and other sensors. Integrate lightweight model inference and sensing/proximity algorithms within tight compute, memory, and power budgets. Support fleet-scale deployment: OTA updates, field diagnostics, and post-launch sustainment. Collaborate with hardware, systems, and QA teams to troubleshoot system-level issues and drive root-cause fixes to closure. Ess

Identity has become a critical to an organizations security posture. This is true across their entire digital landscape include cloud, traditional on prem and emerging technologies like agentic ai. Britive is at the forefront of a modern approach to delivering identity security with the only modern privileged access management platform that provides unified Privileged Access Visibility, Dynamic Privilege Management and Secrets Governance across infrastructure, platforms & SaaS. Our patent-pending technology is deployed at companies of all sizes around the world, including Fortune 500 companies. We have repeatedly ranked among the hottest Cloud Security startups. Britive is founded by CyberSecurity industry veterans with a successful prior exit and is backed by top-tier VCs. Key Responsibilities Ensuring Quality standards across various projects in Britive by adhering to quality engineering practices, testing and release planning for Quality Engineering team across releases. Performing manual testing and help maintain quality standards of software. Collaborate with QA team members, development, UI/UX engineers, and project managers to build a creative, powerful and unified user experience for our cloud access application. Analyze product requirements and develop test designs, including test strategy, test setups by identifying right test cases. Reviewing all product artifacts related to testing (e.g. plans, requirements, specifications, tests, test results, traceability, design reviews, reports, etc.). Involved in all quality engineering activities including working with Performance Testing Team and ensuring all the testing activities for the release are adhered too. Continually work on improving metrics gathering and bring up initiatives to improve the Quality Engineering team. What will you need? Required Skills: Prior experience working in a security software product comp

About us Graphcore is one of the world’s leading innovators in Artificial Intelligence compute. It is developing hardware, software and systems infrastructure that will unlock the next generation of AI breakthroughs and power the widespread adoption of AI solutions across every industry. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. Together, they share a bold vision: to enable Artificial Super Intelligence and ensure its benefits are accessible to everyone. Responsibilities and Duties We are seeking a highly skilled System Tests & Diagnostics Engineer to develop, extend, and integrate specialized silicon validation and diagnostics tools for next-generation AI SoCs. Unlike traditional validation roles focused on executing test plans, this position is responsible for developing the diagnostic software and stress tools that expose hardware failures, characterize silicon behavior, and improve platform observability throughout bring-up and validation. You will work closely with Arm engineers to understand and extend existing diagnostics technologies while developing Graphcore-specific capabilities for future AI hardware. Role Summary You will work with existing Arm-developed diagnostics technologies and extend them to support Graphcore's next-generation AI silicon. You will be responsible for developing system-level diagnostics and stress tools that integrate with an existing framework to detect data integrity, computational correctness, performance, and reliability issues across CPUs, AI accelerators, memory, storage, PCIe, firmware, BMC, and other platform components. Examples include silent data corruption (SDC) tests, power transient stress tools, and platform diagnostics, with opportunities to develop new diagnostics as future hardware capabilities evolve. This role requires close collaboration with hardware architects, firmware enginee

EnCharge AI is a leader in advanced AI hardware and software systems for edge-to-cloud computing. EnCharge’s robust and scalable next-generation in-memory computing technology provides orders-of-magnitude higher compute efficiency and density compared to today’s best-in-class solutions. The high-performance architecture is coupled with seamless software integration and will enable the immense potential of AI to be accessible in power, energy, and space constrained applications. EnCharge AI launched in 2022 and is led by veteran technologists with backgrounds in semiconductor design and AI systems. Senior Emulation Engineer Location: India - Remote Job Description: At EnCharge AI, we are building the next generation of AI compute silicon — purpose-built for high-performance, low-power, and scalable AI inference. As an Emulation Engineer, you will play a critical role in validating complex AI accelerator architectures on emulation platforms before tape-out. This position is ideal for someone passionate about bridging the gap between hardware and software in fast-paced, deep tech environments. Responsibilities: • Set up and maintain Siemens Veloce emulation and prototyping platforms • Adapt SoC designs for Emulation and Prototyping • Develop and debug emulation testbenches and system-level environments • Support pre-silicon validation, power/performance analysis, and early software bring-up. Participate in silicon bring-up and validation. • Collaborate with design and verification teams to isolate design issues and accelerate debug. • Optimize performance of the emulation workloads and reduce turnaround time. • Work with firmware/software teams to enable use of emulators for OS and driver testing. Required Background: • BS/MS/Ph.D. in EE, CS, or related field with 7+ years of SoC design experience. • Experience with emulation platforms (Veloce, Palladium, or ZeBu) and FPGA-based prototyping systems (proFPGA, HAPS, or Protium) • Experience with emula

NVIDIA's DGX Cloud (DGXC) powers AI for strategic research and product workloads. The company seeks a Senior Technical Program Manager (TPM) to lead complex, cross-functional programs powering NVIDIA’s next-generation AI software platforms. In this role, you will drive software initiatives across platform services, cloud infrastructure, and system integration. The focus is on enabling scalable, reliable, and supportable software for AI workloads. You will be responsible for managing high-impact engineering programs within a dynamic, fast-paced roadmap, aligning priorities across teams, and ensuring timely, high-quality delivery. This role requires strong technical competence, a proactive approach, and the ability to operate effectively across multiple levels of the organization. This is a software-first TPM role. The ideal candidate has extensive experience managing software initiatives. They also understand the full-stack environment, including infrastructure dependencies, system bring-up, integration readiness, and operational needs to support software across stack layers. What You'll Be Doing: Lead end-to-end execution of software platform initiatives, including planning, execution, delivery, and operationalization. Work together with software, infrastructure, product, and operations teams to ensure alignment on goals, deliverables, achievements, and schedules. Lead cross-functional initiatives encompassing cloud-native services, platform software, system integration, and release delivery. Help connect software roadmap execution to full-stack readiness, including dependencies across infrastructure, bring-up, validation, and downstream operational support. Identify cross-functional dependencies, mitigate risks, and drive resolution of complex technical and programmatic issues. Establish clear success metrics and reporting mechanis

About the Team OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform. About the Role We are looking for a highly experienced RTL engineer to own critical on- and off-chip interconnect components for our custom AI accelerator platform. You will drive the microarchitecture and RTL implementation of scalable on-chip communication fabrics connecting high-bandwidth compute, memory, and I/O subsystems as well as purpose-built off-chip interfaces and protocols needed to enable custom computing at scale. This is a senior, hands-on engineering role with broad technical ownership. You will drive design from requirements through the full silicon lifecycle, from architecture definition and performance analysis through RTL implementation, verification closure, physical design convergence, bring-up, and production readiness. You will plan and oversee the work of junior engineers and help drive and develop productive engineering relationships with external partners and help manage partner execution. This role is based in San Francisco, CA. We use a hybrid work model of 3 days in the office per week and offer relocation assistance to new employees. In this role, you will: Own the microarchitecture, RTL design, and delivery of major SoC interconnect components, including network-on-chip fabrics, switches, routers, bridges, protocol adapters, arbiters, and traffic-management logic as well as off-chip protocol bridges and interfaces. Drive third party engagements to develop novel networking and interface protocols and silicon IP while ensuring high quality and de

Experienced or Senior Digital Design Engineer Company: The Boeing Company Boeing Defense, Space & Security (BDS) seeks a Digital Design Engineer to join our team in Huntsville, AL and play a vital role in the Patriot Advanced Capability-3 (PAC-3) program, one of the world's most advanced air and missile defense systems. This is your opportunity to work in a dynamic environment where your skills will directly contribute to protecting critical assets and ensuring mission success. If you are passionate about defense technology and want to make a real impact, we want to hear from you! Position Responsibilities: Design high speed digital circuits and perform signal integrity analysis Focus on electronic systems and electrical design, simulation and verification/validation testing of high-speed printed circuit boards (PCB) throughout full product development cycle Providing design guidelines and support for system architecture design, board layout, product bring-up, debug, validation, and factory builds This position requires obtaining a U.S. Security Clearance for which the U.S. Government requires U.S. Citizenship. An interim U.S. secret clearance Pre Start and final U.S. secret clearance Post Start is required. Basic Qualifications (Required Skills/Experience): Bachelor of Science degree in Engineering (with a focus in Electrical, Mechanical or Aeronautical), Computer Science, Data Science, Mathematics, Physics, Chemistry or non-US equivalent qualifications directly related to the work statement 3 or more years of related work experience Experience in digital circuit design Preferred Qualificatio

About the Team DoorDash Labs, established in 2018, serves as the innovation hub for DoorDash, focusing on developing automation and robotics solutions to enhance last-mile logistics. The team's mission is to create technologies that support and augment human networks, aiming to improve efficiency for Dashers, merchants, and consumers alike. We’re ruthlessly focused on business impact. We are a highly senior team composed of former pioneers from a variety of different robotics industries. As of 2025, DoorDash has completed 10B lifetime deliveries. We’re focused on how to do the next 10B even better. About the Role We’re looking for a Senior/Staff electrical and firmware engineer who designs the board and writes the firmware for connected consumer and enterprise devices, including tablets, POS systems, peripherals, and emerging robotics applications. In this role, you will take connected devices from ambiguous user or business needs through system architecture, rapid prototyping, board design, firmware implementation, bring-up, field deployment, and production transition. The ideal candidate has a passion for building and shipping reliable hardware at scale and thrives in an environment that demands technical depth and high-quality execution across multiple concurrent programs. This is a build-heavy role on a small, senior team. You’re excited about this opportunity because you will… Own connected devices end to end, including: Own connected devices from an ambiguous product need through field deployment. Work across the hardware and firmware boundary instead of handing work between specialists. Explore uncertain product ideas through rapid prototypes and experiments. Make consequential tradeoffs on a small, senior team with direct exposure to users and field behavior. Key Responsibilities Translate user and business needs into an integrated electrical and firmware architecture. Design compute-based, mixed-signal boards incorporating processors

About the Team: OpenAI, in close collaboration with our capital partners, is embarking on a journey to build the world’s most advanced AI infrastructure ecosystem. Our Stargate program develops and deploys massive, state-of-the-art data center campuses in partnership with industry leaders today—and through future OpenAI infrastructure projects tomorrow. We design for scale, speed, and reliability, and we need experienced technicians who can translate network blueprints into physical reality. About the Role: We are seeking a Senior Data Center Networking Technician who thrives in fast-moving build environments and is eager to roll up their sleeves during active datacenter deployments. Your first assignment will focus on the physical bring-up of network infrastructure at a large partner-operated campus, collaborating with partner teams and their delivery vendors to achieve agreed performance and reliability targets. As that campus reaches steady state, you will transition to lead network deployment for future OpenAI data center projects, defining standards and guiding implementation across multiple locations. Candidates must be able to sit onsite in Abilene, Texas 5 days per week Key Responsibilities Serve as OpenAI’s technical lead technician during the current campus build, partnering with internal engineers and external contractors on design reviews, installation plans, and acceptance criteria. Spend significant time on the data-center floor performing inspections, assisting with cable routing/termination when needed, conducting fiber testing (OTDR, power levels, continuity), and resolving installation challenges in real time. Troubleshoot and optimize cabling routes, patching, and equipment turn-up to ensure clean, reliable handoff to network operations. Contribute to design discussions and peer reviews for structured cabling and physical network layouts, providing practical field feedback to engineering teams. Develop repeatable engineering standards, as-built do