Senior Dram Rtl Design Engineer Jobs

Senior DRAM RTL design engineer — Hyderabad - Phoenix Aquila, India. Apply via Workday.

Senior DRAM System Engineer — Taichung - Fab 16, Taiwan. Apply via Workday.

Senior DRAM Design Engineer — Boise, ID - Main Site. Apply via Workday.

Senior DRAM Systems Architecture — 2 Locations. Apply via Workday.

Senior DRAM Product Engineer — Manassas, VA - Fab 6. Apply via Workday.

Design Methodology – Senior / Staff DRAM Power Integrity Engineer — Hyderabad - Phoenix Aquila, India. Apply via Workday.

Semiconductor Design Engineer, DRAM: Senior, Staff, or Principal — Boise, ID - Main Site. Apply via Workday.

Senior Process Integration DRAM, PI Technician — Boise, ID - Main Site. Apply via Workday.

Senior Engineer, DRAM PI — Hiroshima - Fab 15, Japan. Apply via Workday.

Senior Engineer, DRAM PI — Hiroshima - Fab 15, Japan. Apply via Workday.

Senior Engineer, DRAM PATHFINDING PI — Hiroshima - Fab 15, Japan. Apply via Workday.

Senior Circuit Design Engineer, DRAM — Boise, ID - Main Site. Apply via Workday.

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Key Responsibilities Overlay Strategy, Roadmap & Technical Leadership Own the overlay roadmap including bond overlay technologies. Serve as the technical authority for overlay, defining overlay specifications, error budgets, mark strategies, technical signoff criteria, and scaling requirements for future technology nodes. Develop innovative overlay solutions that enable advanced bonding while meeting performance, yield, manufacturability, and scaling objectives. Drive advancement of overlay metrology, automation, process control, modeling, and analytics capabilities in partnership with Process and Metrology teams. Apply advanced analytics, Artificial Intelligence, simulation, and experimental methodologies to accelerate learning, identify root causes, and improve overlay performance. Technology Development & Problem Solving Lead simulation and experimental process development activities, balancing modeling with hands-on characterization and technology development. Develop and maintain overlay error budgets, validation plans, experiments, and technical assessments that connect process behavior to device and integration requirements. Solve complex overlay challenges involving alignment, distortion, deformation, process interactions, and bonded wafers. Translate technical findings into actionable process improvements, technology decisions, and roadmap recommendations. <

Principal / Senior / Engineer, DRAM Reliability — Hiroshima - Fab 15, Japan. Apply via Workday.

Principal / Senior / Engineer, E-characterization DRAM — Hiroshima - Fab 15, Japan. Apply via Workday.