Senior Firmware Phy Verification Engineer Jobs

NVIDIA's invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern deep learning - the next era of computing - with the GPU acting as the brain of computers, robots, and self-driving cars that can perceive and understand the world. Today, we are increasingly known as &#34;the AI computing company.&#34; We're looking to grow our company and establish teams with the most thoughtful people in the world. We are looking for an excellent Senior Engineering Manager to lead a large firmware engineering organization delivering end-to-end manageability firmware for NVIDIA's next generation Data Center Compute Systems. This role owns HGX product line and OpenBMC-based management firmware and MCU firmware components in data center platforms, including architecture, execution, quality, reliability, telemetry, and customer readiness. We are seeking an experienced senior leader with strong technical depth, broad system perspective, and a proven ability to lead large teams through complex product cycles. This role is onsite in Santa Clara, CA, USA. If you're creative and autonomous, we want to hear from you! What you'll be doing: Lead a large firmware engineering organization delivering OpenBMC based firmware and MCU firmware for next-generation Data Center Compute Systems. Own HGX platform as a lead for Firmware and System software readiness working across the organization. Define and drive the long-term firmware roadmap, balancing architectural innovation with product execution and delivery milestones. Drive architecture strategy across BMC, MCU, platform software, manageability, health management, and data center firmware interfaces. <spa

Senior/ Staff Engineer, Firmware Test (SSD) — MSB, Singapore. Apply via Workday.

Senior/ Staff Engineer, Firmware Test (SSD) — MSB, Singapore. Apply via Workday.

Senior Engineer , SSD Firmware — Hyderabad - Phoenix Aquila, India. Apply via Workday.

Senior Engineer, SSD Firmware — 2 Locations. Apply via Workday.

Senior/ Staff Engineer, Firmware Test (SSD) — MSB, Singapore. Apply via Workday.

Senior/ Staff Engineer, Firmware Test (SSD) — MSB, Singapore. Apply via Workday.

Staff/ Senior Engineer, Firmware Test (SSD) — MSB, Singapore. Apply via Workday.

Staff/ Senior Engineer, Firmware Test (SSD) — MSB, Singapore. Apply via Workday.

Staff/ Senior Engineer, Firmware Test (SSD) — MSB, Singapore. Apply via Workday.

Staff/ Senior Engineer, Firmware Test (SSD) — MSB, Singapore. Apply via Workday.

Staff / Senior Security Engineer, Firmware Test, SSD — MSB, Singapore. Apply via Workday.

Everpure (NYSE: P) has evolved from storage pioneer to data platform, closing fiscal 2026 with $3.7 billion in revenue, its first billion-dollar quarter, and accelerating growth into FY27. Our strategic agenda spans the companies defining the next era of technology - hyperscalers, AI labs, the AI hardware supply chain, data platform providers, and the broader AI ecosystem. This type of work—work that changes the world—is what the tech industry was founded on. So, if you're ready to seize the endless opportunities and leave your mark, come join us. THE ROLE You will be the pivotal, end-to-end owner driving the product lifecycle for our cutting-edge data center storage solutions. Your mission is to translate product vision into Mass Production (MP) reality, managing all aspects of the hardware (Mechanical and Electrical Engineering) and the full software stack (firmware, OS). This highly visible role requires you to orchestrate global, cross-functional engineering, manufacturing, and supply chain teams while leading executive-level phase gate reviews to ensure our products deliver optimal performance and compliance, on time and on budget. WHAT YOU'LL DO End-to-End Release Ownership: Own the overall release plan, including scope, milestones, and dependencies. You’ll be the primary point of contact for release lines across Product, Engineering, QA, and Security. Strategic Program Leadership: Manage multiple concurrent workstreams involving cross-functional stakeholders. You will own the "big picture," ensuring that high-level technical architecture aligns with execution. Release Integrity: Own release branch health metrics. You’ll lead bug scrubs, triage critical issues, and define the criteria for merging new payloads (leveraging your experience with Git-based workflows). Operational Excellence: Drive the Product Lifecycle (PLC) phase exit reviews (Phases 0–3). You will define exit criteria, ensure they are met, and formally drive approvals. Risk & Conflict Resolut

About us Graphcore is one of the world’s leading innovators in Artificial Intelligence compute. It is developing hardware, software and systems infrastructure that will unlock the next generation of AI breakthroughs and power the widespread adoption of AI solutions across every industry. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. Together, they share a bold vision: to enable Artificial Super Intelligence and ensure its benefits are accessible to everyone. Responsibilities and Duties We are seeking a highly skilled System Tests & Diagnostics Engineer to develop, extend, and integrate specialized silicon validation and diagnostics tools for next-generation AI SoCs. Unlike traditional validation roles focused on executing test plans, this position is responsible for developing the diagnostic software and stress tools that expose hardware failures, characterize silicon behavior, and improve platform observability throughout bring-up and validation. You will work closely with Arm engineers to understand and extend existing diagnostics technologies while developing Graphcore-specific capabilities for future AI hardware. Role Summary You will work with existing Arm-developed diagnostics technologies and extend them to support Graphcore's next-generation AI silicon. You will be responsible for developing system-level diagnostics and stress tools that integrate with an existing framework to detect data integrity, computational correctness, performance, and reliability issues across CPUs, AI accelerators, memory, storage, PCIe, firmware, BMC, and other platform components. Examples include silent data corruption (SDC) tests, power transient stress tools, and platform diagnostics, with opportunities to develop new diagnostics as future hardware capabilities evolve. This role requires close collaboration with hardware architects, firmware enginee

NVIDIA has been redefining computer graphics, desktop gaming, and enhanced computing capabilities for more than 25 years. Today, we are tapping into the unlimited potential of AI to define the next era of computing. As a NVIDIAN, you will work on problems that sit at the boundary of architecture, silicon, firmware, software, and production, where strong judgment matters as much as technical depth. We're the Silicon Design for Productization (DFP) Team, within the broader Silicon Co-Design Group, and we turn power and thermal design into executable productization methodology. Power and thermal are among the most complicated problems we work on at NVIDIA because they sit at the intersection of architecture, workload behavior, silicon variation, firmware policy, platform constraints, and product goals. Small decisions here have an outsized impact on performance, efficiency, reliability, bring-up speed, and ultimately what the product can deliver in the field. We define how features move from concepts to bring-up, characterization, validation, and release. In this role, you will help us build that bridge. We're looking for an engineer who reasons from first principles, flourishes with ownership in a fast-paced environment, and uses AI with sound judgment. What you’ll be doing: Lead the effort across multi-functional teams to keep the program’s power and thermal productization strategy clear, executable, and on track. Create methodology and silicon test plan based controller designs and architecture, including characterization process, debug tools, fuse/firmware settings and lab requirements. Drive resolution for challenging silicon issues through structured hypotheses, measurement plans, and root-cause closure. Steward the Power and Thermal playbook when the existing productization methodology