Senior Firmware Phy Verification Engineer Jobs

Job Details: Job Description: About the Role The Client Computing and Physical AI Group (CCG) is shaping the future of AI-enabled computing experiences. We are seeking a highly motivated Senior Customer Solutions Architect, Graphics & AI to drive customer adoption of Intel's graphics and AI technologies across next-generation client platforms. In this role, you will serve as a trusted technical advisor to strategic customers and ecosystem partners, helping define, architect, validate, and optimize innovative graphics and AI solutions. You will work across hardware, firmware, software, and platform teams to translate customer requirements into scalable product solutions while influencing future technology roadmaps. This position blends deep technical expertise, customer engagement, cross-functional leadership, and innovation to accelerate the deployment of Intel AI and graphics technologies. What You’ll Do Key responsibilities will include but not limited to: Be the center point of contact for technical collaborations with the customer and with various internal teams. Own end to end architecture of customer solution in alignment with product and IP architectures, and its translation to product requirements. Co define test vehicle and validation strategy, and collaboratively manage the execute schedule and resource negotiation. Drive technology tradeoff decisions ensuring customer needs are met, along with satisfying standards and specifications, and execution reality. Be the customer voice and collaborate heavily with internal execution teams and manage customer dashboards. Participate and contribute in identifying critical technology solutions for future product needs and influence roadmap.

Job Details: Job Description: The Role and Impact As a Systems and Solutions Engineer, you will drive the design, development, and integration of systems that combine software, firmware, board, and silicon/SoC components to meet specific customer needs. In this role, you will play a key part in defining, implementing, and optimizing solutions to ensure high performance, reliability, and quality across the system lifecycle. Your work will directly impact the seamless functionality and user experience of cutting-edge technologies, enhancing Intel's position in delivering innovative systems to global customers. Business Group You will be joining the Silicon and Platform Engineering Group (SPE), an organization committed to advancing Intel's mission of delivering world-class silicon and platform solutions. The group focuses on developing integrated systems that align with customer needs and support Intel's broader goals of leadership in technology innovation. SPE collaborates across diverse domains to ensure Intel platforms meet performance, reliability, and scalability requirements. Key Responsibilities - Design and develop software, firmware, and hardware solutions that integrate seamlessly across system components. - Lead the definition and implementation of system architecture, translating business opportunities into technical requirements and use cases. - Evaluate technical risk and optimize systems for ease of use, reliability, security, availability, and sustainability. - Drive technical solutions to address customer challenges, deploying systems and conducting benchmarks to validate performance. - Collaborate with cross-functional teams to influence next-generation requirements and solutions, guiding research and academic collaborations as needed. - Conduct lab experiments to simulate real-life environments, analyze prototype performance, and refine system

Everpure (NYSE: P) has evolved from storage pioneer to data platform, closing fiscal 2026 with $3.7 billion in revenue, its first billion-dollar quarter, and accelerating growth into FY27. Our strategic agenda spans the companies defining the next era of technology - hyperscalers, AI labs, the AI hardware supply chain, data platform providers, and the broader AI ecosystem. This type of work—work that changes the world—is what the tech industry was founded on. So, if you're ready to seize the endless opportunities and leave your mark, come join us. THE ROLE As a Hardware Manufacturing Test Engineer at Everpure, you will spearhead manufacturing test enablement for our next-generation enterprise hardware platforms from New Product Introduction (NPI) through high-volume production ramp. Operating with high autonomy, you will design robust test strategies and collaborate cross-functionally with Firmware, Diagnostics, and global factory teams to deliver market-ready, high-yield hardware infrastructure. Your expertise will directly optimize manufacturing throughput, improve release quality, and accelerate the global deployment of the industry-defining Everpure Platform. WHAT YOU'LL DO Own NPI & Sustaining Test Readiness: Drive end-to-end manufacturing test strategy, test sequence definition, and coverage validation for multiple hardware infrastructure variants to ensure seamless factory execution and build readiness. Lead Debug & Yield Optimization: Independently lead technical triage and resolve complex system-level test fallout during critical build phases, analyzing failure paretos to isolate root causes across hardware, firmware, and test infrastructure. Scale Test Architecture & Frameworks: Enhance and standardize the Design for Manufacturing (DFM) hardware test architecture by deploying reusable automation frameworks and consolidating test execution into shared platforms to minimize factory cycle times. Drive Vendor & Cross-Functional Alignment: Colla

About us Graphcore is one of the world’s leading innovators in Artificial Intelligence compute. It is developing hardware, software and systems infrastructure that will unlock the next generation of AI breakthroughs and power the widespread adoption of AI solutions across every industry. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. Together, they share a bold vision: to enable Artificial Super Intelligence and ensure its benefits are accessible to everyone. Responsibilities and Duties We are seeking a highly skilled System Tests & Diagnostics Engineer to develop, extend, and integrate specialized silicon validation and diagnostics tools for next-generation AI SoCs. Unlike traditional validation roles focused on executing test plans, this position is responsible for developing the diagnostic software and stress tools that expose hardware failures, characterize silicon behavior, and improve platform observability throughout bring-up and validation. You will work closely with Arm engineers to understand and extend existing diagnostics technologies while developing Graphcore-specific capabilities for future AI hardware. Role Summary You will work with existing Arm-developed diagnostics technologies and extend them to support Graphcore's next-generation AI silicon. You will be responsible for developing system-level diagnostics and stress tools that integrate with an existing framework to detect data integrity, computational correctness, performance, and reliability issues across CPUs, AI accelerators, memory, storage, PCIe, firmware, BMC, and other platform components. Examples include silent data corruption (SDC) tests, power transient stress tools, and platform diagnostics, with opportunities to develop new diagnostics as future hardware capabilities evolve. This role requires close collaboration with hardware architects, firmware enginee

About the job Build the debugger that helps developers unlock more from Graphcore AI processors. As a Senior Software Engineer in our Debugger team, you will help define and implement Graphcore’s next-generation debugging capability. Your work will support developers building and optimising workloads on our advanced AI processors. You will adapt and expand debugger functionality, resolving complex issues across software and hardware boundaries. The tools you build will help internal and external users understand behaviour, improve performance and move faster. You will work closely with software, firmware, hardware, partner and customer teams. This role offers rare depth across processor architecture, toolchains and real developer workflows. The team and culture Work happens close to the technology, with engineers expected to investigate deeply, speak up and take ownership. The team uses Agile ways of working to keep progress visible and decisions moving. You will collaborate across software, firmware and hardware teams to identify debug feature opportunities. Decisions are shaped by technical evidence, user needs and the judgement of engineers closest to the problem. What we’re looking for · Experience using debuggers to resolve complex program issues. · Strong low-level programming skills in C, C++ or Rust. · Strong understanding of processor architectures. · Ability to communicate clearly across software, firmware and hardware teams. · A proactive, self-driven approach to improving product quality and functionality. · Familiarity with compiler toolchains, debugging protocols, Python, IDE development or PyTorch. While we have outlined a set of requirements, we value transferable skills and diverse experiences. We also welcome engineers returning to the profession after a career break, including through returnship routes. Benefits · Flexible working: Balance your work and personal life with greater flexibility · Generous leave: Take time to rest, recharge and enjoy

NVIDIA has been redefining computer graphics, PC gaming, and accelerated computing for more than 25 years. Today, we are tapping into the unlimited potential of AI to define the next era of computing. As an NVIDIAN, you will address challenges spanning architecture, silicon, firmware, software, and production — and excellent judgment matters as much as technical depth! We are the Silicon Power Team within the Silicon Co-Design Group. We architect and deliver groundbreaking solutions for productizing NVIDIA's chips across consumer, professional, server, embedded, mobile, and automotive markets. Silicon characterization, correlation to arch and design expectations, product spec finalization, and productization techniques and infrastructure are our day-to-day work — always on the bleeding edge of the industry. Small decisions here have outsized impact on performance, efficiency, reliability, bring-up speed, and ultimately what the product delivers in the field. We are hiring a Senior Silicon Power Engineer to own power-feature productization on a flagship silicon program. This is not a coordination role, and it is not a compliance role — it is the seat where power features either work at scale or become the reason a program slips. The two highest-leverage problems in this seat: Close the hardest multi-functional power failures before they gate a program. Take ambiguous, cross-boundary issues across architecture, firmware, validation, and platform to root-cause closure — with productized fixes and reusable methodology the next program can inherit. Build AI-enabled characterization as a real capability, not a demo. Every bring-up generates terabytes of characterization, shmoo, and telemetry data. Deploy AI workflows for data analysis, metric extraction, trend detection, and cross-bring-up correlation — with the guardrails and validation discipline to make them trustworthy enough to gate production decisions! <

NVIDIA is seeking a Senior Technical Program Manager to join the CSP Engagements team, focused on deep technical engagement with hyperscale cloud service providers for NVIDIA’s next‑generation datacenter systems such as Vera Rubin NVL72. This role is intended for experienced systems and embedded software leaders—including software engineering managers, technical leads, or senior architects—who have led datacenter server and platform software programs and can operate as a trusted technical partner to hyperscale CSP engineering teams. As a member of the CSP Engagements team, you will act as the primary technical engagement leader between NVIDIA’s system software organizations and CSP platform, system software, and AI teams, ensuring alignment, readiness, and successful large‑scale deployment of NVIDIA‑based datacenter solutions. What you will be doing: Lead deep technical engagements with hyperscale CSPs as the primary NVIDIA point of contact for system software, firmware, and platform readiness for NVIDIA datacenter products. Partner directly with CSP system software, firmware, and infrastructure engineering leaders to align on software architecture, bring‑up plans, deployment readiness, and production requirements for NVIDIA‑based server and rack‑scale platforms. Represent CSP technical priorities internally, advocating for customer requirements and tradeoffs across NVIDIA’s system software, firmware, hardware, silicon, and product teams are aligned to customer needs, timelines, and constraints. Own the end‑to‑end CSP engagement lifecycle, from early technical alignment and pre‑production readiness through large‑scale deployment, escalation management, and sustained production support. Drive bi‑directional technical communication: translating CSP system‑level requirements into actionable focus areas for NVIDIA engineering teams, while clearly communicating N

As one of the technology industry's most desirable employers, NVIDIA has been redefining accelerated computing, computer graphics and leading the Artificial Intelligence revolution. NVIDIA's innovation is fueled by its great technology—and amazing people. We are seeking a Senior Silicon and System Product Lead to influence, innovate and take our next generation products to the market. As part of the Silicon Solutions Team, we architect and deliver groundbreaking system solutions that integrate all aspects of the system from silicon design, software design to operations and final deployment in multiple market segments that NVIDIA serves. This position offers an unique opportunity to collaborate with multiple organizations in the company and grow your career in a high impact role. We need a passionate, hard-working and creative individual to lead the products all the way from market analysis to delivering the features on the final product. What you'll be doing: Drive product performance and power targets, trade-off features/configurations and provide innovative solutions to complex silicon and system level problems. Evaluate new market segments and use cases; translate market requirements to engineering problem statements and metrics. Innovate Performance, power, yield and quality optimizations and features for the world’s fastest power-shipping products in the GPU and SoC market segments spanning gaming, automotive, datacenter and DL/AI. Develop methodologies and requirements for multi-functional teams to drive silicon and system product features to production. Incorporate productization feedback to improve the next generation. Lead the team for feature requirements and schedule from architecture to silicon phase of projects. Work alongside system architects, designers, marketing teams, chip and board designers, software/firmware engineers, HW/S

The Silicon Co-Design Group (SCG) sits at the crossroads of architecture, design, marketing, operations, and productization. Our work spans early architecture through final product delivery across Datacenter, Gaming, Robotics, Automotive, and Embedded markets. We work closely across functions to deliver chips that change what is possible. System Integration sits at the intersection of all of them. It is the layer where every architecture, design, software, and manufacturing decision meets reality. When something breaks late in a program, it usually breaks here first. We are hiring a Senior Manager to lead this team in the US and partner closely with teams globally. Your work will sit on the critical path of every NVIDIA silicon program, and the bar you set for system integration is the bar we ship to! The two hardest, highest-leverage problems in this seat: Find critical silicon issues earlier — often before software is production-ready. Left-shifting post-silicon coverage is the highest-value thing System Integration can do. Standing up wide-area testing as a repeatable capability is a core part of the role. Keep programs on milestone when upstream dependencies slip. Validation plans collide with reality every program! The team needs new strategies, not just contingency plans, to keep moving when software, firmware, or methodology slip. You will design and run those strategies. What you’ll be doing: Plan and execute post-silicon feature integration, PVT validation, and wide-area testing across NVIDIA’s GPU, SoC, and CPU programs. Build wide-area and in-system test as a repeatable capability that shifts post-silicon coverage left, so issues surface before we are production-ready. Lead resolution of the most complex system-level issues, RMAs, and HW/SW interaction problems with creative workarounds and focused lab experimentation. Deve

NVIDIA’s Silicon Co-Design Group is the team that gets every GPU, SoC, and CPU silicon program from first power-on to high-volume production. We are hiring a Senior Manager to lead our Test, Manufacturability, Reliability & Quality (TMRQ) organization. This is not a coordination role . Your work decides if a product can be built at scale and trusted in the field. These include production test development (SLT, BLT), control run flow, system reliability stress (HTOL), platform- and board-level manufacturing issue closure, and field diagnostic test development. You lead a team of individual contributors and a first-line manager at the layer where silicon, platform, and software collide with manufacturing reality. Decisions you make show up in yield curves, production ramp , and customer escapes. You are the leader the program turns to when a build is stuck, a control run is fallout-heavy, or a field return points back at silicon . The exceptional hire also uses AI deliberately — with demonstrated workflow impact and the judgment to know where it compresses real work and where it introduces risk. What you will be doing: Keep programs moving. Own the technical execution and velocity of SLT, BLT, Board/Chip/Rack CR, and system reliability stress (HTOL) across every GPU, SoC, and CPU silicon program. Close the hardest multi-functional failures. Resolve Vmin and binning escapes, performance shortfalls, and power anomalies by driving root-cause across design, methodology, DFT, ATE, package, software/firmware, and manufacturing — and own the WARs and productized fixes through to confirmation. Give leadership the clarity to act. Convert raw integration signals — CR fallout, BLT/SLT yield, SHTOL/CHTOL data, RMA trends, customer escalations — into decision-ready options that enable executive leadership to act with confidence on POR, QS/PS gates, a

Define the physical limits of what a chip can do, then break them! NVIDIA's Silicon Co-Design Group sits at the crossroads of architecture, silicon, systems, and manufacturing, where first principles thinking translates directly into product outcomes at scale. As GPU power density and thermal limits approach physical boundaries, the gap between system architecture needs and manufacturable, testable capabilities widens with every generation, and this role exists to close it. You wouldn't be maintaining existing solutions, you'd be identifying where physical constraints will erode NVIDIA's competitive edge before anyone else sees it coming, then building the cross-domain responses that ensure the next generation leapfrogs those limits entirely. The problems here don't have known answers yet: Every generation of NVIDIA silicon pushes closer to the limits of physics. The Co-Design Architect role isn't about optimizing within known bounds; it's about redrawing those bounds entirely. If you want your work to shape what's physically possible in the world's most demanding computing products, this is where that work happens. What you'll be doing: Power, Thermal & Packaging Limits Analysis: Gather and analyze the hard constraints of packaging, power delivery, and thermal dissipation against roadmap demands, predicting when those constraints will reduce competitiveness and acting before they do. Cross-Domain Solution Development: Develop solutions that span silicon features, packaging innovation, firmware and hardware co-design, and DFX updates, ensuring future products are not only performant but testable to the highest quality and reliability standards. Packaging Technology Evaluation: Assess emerging packaging technologies for their voltage/frequency, noise, reliability, and testability implications, determining which are worth adopting an

Are you ready to contribute to world-class innovation and push the boundaries of what's possible? At NVIDIA, you'll have the opportunity to be part of a team that is driving groundbreaking impacts across various markets. As a Thermal Solutions Development Engineer, you will play a pivotal role in our Silicon Codesign Group, transforming thermal solution concepts into lab-ready builds and beyond. What you will be doing: Build thermal solutions for engineering characterization and validation of next-gen GPU/SOC products, ensuring flawless delivery from concept to lab. Drive end-to-end development and deployment of thermal solutions, collaborating with internal teams and external vendors on build requirements, prototype evaluation, test system integration, and software automation. Improve thermal design processes by incorporating feedback and findings, developing workflow and maintaining our world-class standards. Work closely with system architects, chip and board designers, and software/firmware engineers in a dynamic and high-energy environment to bring industry-defining products to market. Apply AI-enabled approaches and AI tools to accelerate design iteration, test planning, and characterization/validation triage (e.g., requirements/spec summarization, experiment prioritization, log/telemetry summarization, anomaly/outlier detection), improving cycle time, coverage, and traceability while validating outputs against physics, specs, and lab measurements. Partner with AI/tooling teams as the thermal domain SME to define use-cases, success criteria, and evaluation methods; provide feedback to improve tool reliability and usability. What we need to see:

NVIDIA's Silicon Co-design Group (SCG) sits at a rare intersection: we own the full product development lifecycle, from early architecture definition through silicon bringup to product release. Our ArchDev team is the hub for silicon and system-level feature development, driving tradeoff analysis, system integration, and POR alignment across the entire organization. If you want to see your work go from whiteboard to world-class silicon, this is where that happens. What You'll Be Doing: Architect and integrate system-level performance and power management features, controllers, and policies to optimize product efficiency across datacenter and client products . Build feature roadmaps to address low-power, low-noise, and performance-per-watt product needs through prototyping, use-case analysis, and cost/benefit trade-offs. Partner with architecture, ASIC, board/platform, software/firmware, and marketing teams to drive design decisions and debug complex issues. Track industry trends and market needs and translate them into forward-looking roadmaps that keep NVIDIA's products ahead of the curve. Lead debug efforts, develop workarounds, and support bringup , validation, manufacturing, and customer escalations. What We Need to See: <

Job Details: Job Description: About the Role Join Intel's Client Computing and Physical AI Group and help enable the next generation of mobile and desktop client platforms. We are seeking a Senior Customer Solutions Engineer to serve as a key technical leader responsible for customer platform enablement, architecture collaboration, and execution across Intel's client platform ecosystem. In this role, you will work closely with OEM customers, engineering teams, and program stakeholders to drive the successful delivery of innovative platform technologies. You will play a critical role in platform planning, issue resolution, customer engagement, and cross-functional execution from product definition through product launch and production. What You’ll Do Key responsibilities will include but not limited to: Serve as the primary technical interface between customers and Intel engineering teams, driving platform enablement and customer success. Lead cross-functional execution across platform technologies including hardware, firmware, graphics, connectivity, and I/O technologies. Drive resolution of critical platform issues, customer escalations, and technical challenges throughout the product lifecycle. Represent customer readiness, platform health, and execution status in program reviews and leadership forums. Develop technical assessments, customer enablement plans, and supporting documentation to accelerate design wins and product launches. Drive technical program execution across customer and engineering teams by aligning milestones, dependencies, risks, priorities, and deliverables. Behavioral traits that we are looking for: Strong customer focus and the ability to build trusted partners

About us Graphcore is one of the world’s leading innovators in Artificial Intelligence compute. It is developing hardware, software and systems infrastructure that will unlock the next generation of AI breakthroughs and power the widespread adoption of AI solutions across every industry. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. Together, they share a bold vision: to enable Artificial Super Intelligence and ensure its benefits are accessible to everyone. Graphcore’s teams are drawn from diverse backgrounds and bring a broad range of skills and perspectives. A melting pot of AI research specialists, silicon designers, software engineers and systems architects, Graphcore enjoys a culture of continuous learning and constant innovation. Job Summary We are seeking a Staff Hardware Engineer to provide advanced operational, diagnostic, and engineering support for Graphcore’s Arm-based hardware platforms across lab and data center environments. This role focuses on supporting hardware bring-up, validation, and troubleshooting of complex AI compute platforms, including server blades, racks, and rack-scale infrastructure. The successful candidate will collaborate closely with engineering, platform, and data center teams to ensure the reliability and performance of next-generation AI systems. The Team The Systems Engineering and Hardware Engineering teams are responsible for enabling the bring-up, validation, and operational reliability of Graphcore’s AI infrastructure platforms. The team works closely with server engineering, firmware teams, platform architects, and data center operations to support the development, testing, and deployment of next-generation AI compute systems. This collaborative environment enables rapid problem-solving and continuous improvement of Graphcore’s hardware platforms from early development through production deployment.