Senior Lead Full Stack Engineer Intelligence Systems Jobs

Define the physical limits of what a chip can do, then break them! NVIDIA's Silicon Co-Design Group sits at the crossroads of architecture, silicon, systems, and manufacturing, where first principles thinking translates directly into product outcomes at scale. As GPU power density and thermal limits approach physical boundaries, the gap between system architecture needs and manufacturable, testable capabilities widens with every generation, and this role exists to close it. You wouldn't be maintaining existing solutions, you'd be identifying where physical constraints will erode NVIDIA's competitive edge before anyone else sees it coming, then building the cross-domain responses that ensure the next generation leapfrogs those limits entirely. The problems here don't have known answers yet: Every generation of NVIDIA silicon pushes closer to the limits of physics. The Co-Design Architect role isn't about optimizing within known bounds; it's about redrawing those bounds entirely. If you want your work to shape what's physically possible in the world's most demanding computing products, this is where that work happens. What you'll be doing: Power, Thermal & Packaging Limits Analysis: Gather and analyze the hard constraints of packaging, power delivery, and thermal dissipation against roadmap demands, predicting when those constraints will reduce competitiveness and acting before they do. Cross-Domain Solution Development: Develop solutions that span silicon features, packaging innovation, firmware and hardware co-design, and DFX updates, ensuring future products are not only performant but testable to the highest quality and reliability standards. Packaging Technology Evaluation: Assess emerging packaging technologies for their voltage/frequency, noise, reliability, and testability implications, determining which are worth adopting an

Are you ready to contribute to world-class innovation and push the boundaries of what's possible? At NVIDIA, you'll have the opportunity to be part of a team that is driving groundbreaking impacts across various markets. As a Thermal Solutions Development Engineer, you will play a pivotal role in our Silicon Codesign Group, transforming thermal solution concepts into lab-ready builds and beyond. What you will be doing: Build thermal solutions for engineering characterization and validation of next-gen GPU/SOC products, ensuring flawless delivery from concept to lab. Drive end-to-end development and deployment of thermal solutions, collaborating with internal teams and external vendors on build requirements, prototype evaluation, test system integration, and software automation. Improve thermal design processes by incorporating feedback and findings, developing workflow and maintaining our world-class standards. Work closely with system architects, chip and board designers, and software/firmware engineers in a dynamic and high-energy environment to bring industry-defining products to market. Apply AI-enabled approaches and AI tools to accelerate design iteration, test planning, and characterization/validation triage (e.g., requirements/spec summarization, experiment prioritization, log/telemetry summarization, anomaly/outlier detection), improving cycle time, coverage, and traceability while validating outputs against physics, specs, and lab measurements. Partner with AI/tooling teams as the thermal domain SME to define use-cases, success criteria, and evaluation methods; provide feedback to improve tool reliability and usability. What we need to see:

NVIDIA has been redefining computer graphics, desktop gaming, and enhanced computing capabilities for more than 25 years. Today, we are tapping into the unlimited potential of AI to define the next era of computing. As a NVIDIAN, you will work on problems that sit at the boundary of architecture, silicon, firmware, software, and production, where strong judgment matters as much as technical depth. We're the Silicon Design for Productization (DFP) Team, within the broader Silicon Co-Design Group, and we turn power and thermal design into executable productization methodology. Power and thermal are among the most complicated problems we work on at NVIDIA because they sit at the intersection of architecture, workload behavior, silicon variation, firmware policy, platform constraints, and product goals. Small decisions here have an outsized impact on performance, efficiency, reliability, bring-up speed, and ultimately what the product can deliver in the field. We define how features move from concepts to bring-up, characterization, validation, and release. In this role, you will help us build that bridge. We're looking for an engineer who reasons from first principles, flourishes with ownership in a fast-paced environment, and uses AI with sound judgment. What you’ll be doing: Lead the effort across multi-functional teams to keep the program’s power and thermal productization strategy clear, executable, and on track. Create methodology and silicon test plan based controller designs and architecture, including characterization process, debug tools, fuse/firmware settings and lab requirements. Drive resolution for challenging silicon issues through structured hypotheses, measurement plans, and root-cause closure. Steward the Power and Thermal playbook when the existing productization methodology

NVIDIA silicon runs the world's AI infrastructure. The frequency it delivers across every voltage, process corner, and workload is not assumed. It is measured, correlated, and validated. This role does that work. The Silicon Co-Design Group is where architecture intent becomes silicon reality. We own the boundary between what was designed and what was built, and we are the team that knows the difference. When a program ships at frequency and at quality, this team is a reason why. You will be the person who follows through between simulation and silicon. When the model is wrong, a frequency corner that doesn't hold, a Vmin that walks, a critical path that timing analysis missed, you find out why, and your data is what the rest of the program acts on. Architecture, design, and product teams do not guess. They use your numbers. The engineers who do this well are rare. They think like circuit designers, work like experimentalists, and reason like data scientists. If that is you, read on. What you'll be doing: Own silicon speed characterization from first power-on through production sign-off, covering frequency, Vmin, Vmax, and timing margins across the full PVT space. Close the correlation gap. Tie pre-silicon timing analysis and critical path predictions to measured silicon, quantify where the model diverges from reality, and produce analysis that architecture and design can act on with confidence. Trace failures to their source, whether a microarchitectural bottleneck, a critical path that doesn't close under voltage, a clocking issue, or a process corner the model didn't anticipate, and drive the resolution. Own and build AI agents that work at your direction: automated test orchestration, intelligent data pipelines, and analysis flows that expand coverage and compress cycle time without sacrificing difficulty. Know where AI accelerates real work and whe

NVIDIA's Silicon Co-design Group (SCG) sits at a rare intersection: we own the full product development lifecycle, from early architecture definition through silicon bringup to product release. Our ArchDev team is the hub for silicon and system-level feature development, driving tradeoff analysis, system integration, and POR alignment across the entire organization. If you want to see your work go from whiteboard to world-class silicon, this is where that happens. What You'll Be Doing: Architect and integrate system-level performance and power management features, controllers, and policies to optimize product efficiency across datacenter and client products . Build feature roadmaps to address low-power, low-noise, and performance-per-watt product needs through prototyping, use-case analysis, and cost/benefit trade-offs. Partner with architecture, ASIC, board/platform, software/firmware, and marketing teams to drive design decisions and debug complex issues. Track industry trends and market needs and translate them into forward-looking roadmaps that keep NVIDIA's products ahead of the curve. Lead debug efforts, develop workarounds, and support bringup , validation, manufacturing, and customer escalations. What We Need to See: <

We are seeking a highly technical and strategic Senior Developer Relations Manager to join our team, with a focus on engaging developer ecosystems across emerging technology domains. In this pivotal role, you will work directly with software solution providers, developers, and industry professionals to champion the adoption of NVIDIA’s advanced AI and computing platforms in the area of Agentic AI, Generative AI and Sovereign AI. The ideal candidate brings a blend of deep technical expertise combined with a passion for developer advocacy and a talent for communicating how NVIDIA technology can solve complex, real-world challenges. What you'll be doing: Develop and maintain deep technical expertise in Agentic AI, Generative AI and AI Models for multimodality data & models. Serve as the trusted technical advisor, problem solver, and champion for the developer ecosystem in Sovereign AI, with cross-functional partners to drive adoption of NVIDIA technologies. Accelerate critical workloads by demonstrating and integrating the NVIDIA software stack (tools, libraries, SDKs, NIMs, and blueprints) into partner products, platforms, and pipelines. Guide partners through onboarding and integration by providing technical resources—such as sample code, guides, and demo pipelines—to accelerate Sovereign AI-specific technology adoption and foster co-innovation of next-generation solutions. Map and monitor the developer ecosystem to identify growth opportunities, collaborating with engineering, product management, and marketing to inform roadmaps and optimize partner adoption strategies. Engage partner technical leaders to drive best-practice integrations and resolve technical challenges, using regular syncs to track adoption, surface new workflows, and channel critical field insights back to NVIDIA product teams. Deep understanding of Sovereign AI Technology and Use Cases enabling both governme

Work Flexibility: Onsite ​​​ Schedule 1st Shift: Mon – Fri, 8am – 5pm Overtime based on business needs What you will do As the Senior EMC & RF Test Technician, you will contribute to global regulatory compliance efforts through the execution of testing activities, development of in-house laboratory capabilities, and support of projects that ensure products meet evolving international product safety and EMC standards.​​ ​​​Perform and document electromagnetic compatibility (EMC) and radio frequency (RF) testing on new and existing medical devices to demonstrate compliance with applicable domestic and international standards. ​Operate, maintain, troubleshoot, and verify EMC and RF laboratory equipment, including shielded rooms, EMC chambers, antennas, receivers, signal generators, amplifiers, and associated test instrumentation. ​Configure, build, modify, and verify product test setups and support equipment to meet EMC and RF testing requirements. ​Support the development, expansion, and continuous improvement of in-house EMC and RF testing capabilities to meet evolving technology and compliance requirements. ​Collaborate with engineering teams to develop test strategies, execute compliance testing, and support product development activities. ​Investigate, troubleshoot, and document test failures, observations, and anomalies, communicating findings and recommendations to engineering and project teams. ​Create, update, and maintain test procedures, protocols, job-aids, work instructions, and laboratory documentation in accordance with quality system requirements. ​Evaluate, recommend, procure, and maintain laboratory equipment, software, and tools necessary to support current and future EMC and RF testing capabilities. ​Identify and implement improvements t

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Description As an Expansion Program Integration & Readiness Engineer, you will build the future of Micron's global manufacturing by enabling the flawless delivery of strategic semiconductor expansion programs. This role uniquely positions you to bring diverse teams together, transforming ideas into operational capabilities that drive Micron's success! You will engage from early concept planning through factory startup and production ramp, influencing critical decisions to ensure that business objectives are achieved safely, efficiently, and predictably. You will collaborate with partners across Manufacturing, Facilities, Construction, Engineering, Supply Chain, Procurement, Finance, and Quality to solve complex challenges, drive continuous improvement, and build lasting business impact. This is an opportunity for a motivated leader who enjoys working across organizations, building positive relationships, and helping teams achieve ambitious goals. Responsibilities In your role as an Expansion Program Integration & Readiness Engineer, you will: Lead strategic expansion and readiness programs that enable future manufacturing growth. Partner with teams across the organization to deliver business-critical achievements and operational readiness objectives. Drive coordinated planning, risk management, issue resolution, and decision-making processes. Build alignment across multiple organizations while encouraging collaboration, tra

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Ready to join a growing team!!! Micron Technology’s vision is to transform how the world uses information to enrich life and our dedication to people, innovation, tenacity, teamwork, and customer focus allows us to fulfill our mission to be a global leader in memory and storage solutions. This means conducting business with integrity, accountability, and professionalism while supporting our global community. We are the only company manufacturing today's major memory and storage technologies: DRAM, NAND and Emerging memory. We are looking for an energetic, ambitious, individual with strong work ethic and integrity to join us as the Scribe Design Senior Engineer. The Scribe Design Non-Array (SDNA) team is responsible for the design, layout, and verification of CMOS electrical test structures that enable CMOS device development, Compact modeling, Reliability modeling and Fab process monitoring. In this role you will work with a group of Engineers in India, Japan, and the US. As part of a global team, you will contribute to physical layout, floor planning and verifying through DRC and in-house verification tools. This role will allow you to work on all technology types at Micron. Responsibilities and Tasks include, but are not limited to: Proactively identify problem areas for improvement, propose, and develop innovative solutions. Continuously evaluate and implement new tools and technologies to improve the current automation flows. Demons

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The Senior Internal Trust and Protection Analyst will play a pivotal role in identifying, assessing, and mitigating risks posed by employees, contractors and others with access to sensitive information. This candidate will also help develop corporate strategy, review policy and procedures, evaluate insider risk control gaps, and develop training related to insider risk and intellectual property protection. This role acts as a subject matter expert throughout the entire insider risk lifecycle. It covers detection, triage, investigation, case adjudication, and mitigation. The position requires strong analytical, technical, and communication skills. It also demands proficiency in industry-standard investigation methods and working with cross-functional teams to improve Micron’s security posture. You will balance robust security measures with maintaining a positive work culture and ensuring the preventive actions do not erode employee trust and morale! Responsibilities: Lead end-to-end investigations into the most sophisticated and sensitive insider risk matters at Micron, including suspected intellectual property theft, major theft, trade secret misappropriation, economic espionage, unauthorized data ex-filtration, fraud, and workplace violence threats. Develop and implement comprehensive investigative plans, including evidence collection strategies, coordination with Micron's various investigation partners, and structured witness and subject interviews using advanced elicitation techniques.</

NVIDIA is a leading artificial intelligence computing company, and we are paving the way with innovations in self-driving cars, machine learning, supercomputing, gaming, and visualization. We give automakers, tier-1 suppliers, automotive research institutions, and start-ups the power and flexibility to develop and deploy breakthrough artificial intelligence systems for self-driving vehicles. Our unified computing architecture enables training deep neural networks in the data center, and then seamlessly runs them on NVIDIA DRIVE Platforms inside the vehicle. The Hypervisor and RTOS Team within NVIDIA DRIVE Software plays a critical role in NVIDIA's expansion into the world of artificial intelligence and autonomous vehicles. Our job is to facilitate the sharing and separation of system resources while achieving real-time, safety, and security requirements. We develop Hypervisor and RTOS with a strong focus on automotive quality, safety and security needed for the real-time, highly available system level components of world-class Autonomous Vehicles. We are making extensive use of formal methods to automate our workflow and increase the quality of our SW. We are hiring now for the position of Senior System Software Engineer for Hypervisor and RTOS What you’ll be doing: Design and develop new features for RTOS and hypervisor software stack. Bring up and optimize RTOS and hypervisor stacks on new NVIDIA Tegra SoCs. Develop high-integrity software using best-in-class engineering, safety, and security practices. Debug complex system-level issues across hardware, firmware, RTOS, and virtualization layers. Lead team-wide technical initiatives by building alignment, coordinating execution, and driving them to completion. What we need to see: BS, MS in CS/CE/EE or a related engineering field or equivalent experience </

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Own and drive custom analog and mixed-signal layout for critical LPDDR PHY blocks, including Datapath, bias networks, IO front ends, and reference circuits, ensuring robust operation across PVT, low noise coupling, and high matching accuracy 3-12 years of solid hands-on experience in custom analog and high-speed layout design, with proven expertise in implementing and delivering critical analog blocks and LPDDR/high-speed interfaces at advanced technology nodes Lead high-speed LPDDR (LPDDRx) interface layout execution , solving complex signal integrity challenges such as skew control, impedance matching, shielding, crosstalk mitigation, and jitter sensitivity in advanced nodes Architect and implement scalable array-based layout strategies for DQ/DQS byte lanes, CA lanes, and replica paths, ensuring strict symmetry, pitch matching, repeatability, and multi-channel scalability Drive integration of custom digital and mixed-signal blocks within the PHY (training logic, calibration engines, test/debug circuitry), ensuring optimal clocking, congestion management, and isolation from sensitive analog regions Lead layout-aware co-design with circuit teams , enabling early closure of timing, noise, IR, EM, and parasitic effects, and influencing design decisions from a layout perspective Establish robust power distribution, grounding, and isolation strategies , including guard rings, deep N-well usage, decoupling, and domain separation for

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. CAD Engineer Our vision is to transform how the world uses information to enrich life. Join an inclusive team focused on one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we create helps make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while contributing to integrity, sustainability, and giving back to our communities. Because doing so can spark the very innovation we are pursuing. Job Description: As a CAD Engineer at Micron Technology, Inc., you will be working in a collaborative, production support role evaluating, improving EDA and debugging both in-house and commercial Electronic Design Automation (EDA) tools and flows for the physical layout, verification and design of CMOS integrated circuits. You will work closely with the Layout design teams to increase their productivity and work efficiency. Responsibilities and Tasks include, but not limited to: Work closely with memory layout teams and solve their daily challenges and provide complete solutions for the future. Proactively identify problem areas for improvement, propose, and develop innovative solutions. Develop methodologies for highly reliable layout with faster Time to Market approach. Lead layout flows implementation using AI‑assisted and automated workflows, applying copilot‑based assistants, agentic AI flows, and rule‑aw

Senior Designer — Singapore. Apply via Workday.

Senior Machine Learning Developer Location: Montreal, Quebec, Toronto, or Ontario About Numa Numa is building the platform to power AI-native dealerships, rearchitecting automotive service and sales with advanced AI agents that automate customer interactions, streamline operations, and reimagine how dealerships work. Numa integrates AI into every aspect of dealership functions—from rescuing customer calls and voicemails that generate more revenue, to reducing customer resolution times that drive overall customer satisfaction (CSI), to improving dealership team productivity and accountability. Numa has raised $50 million from leading investors (Google, Threshold, Costanoa, Mitsui, and Touring Capital). The Role We’re hiring a Senior Machine Learning Developer to build and ship ML/AI systems that interact with real customers thousands of times a day. Our voice agents book service appointments, rescue missed calls, and route callers through natural conversations. You’ll work across products and platforms. You’ll ship AI features including prompts, agents, tools, and production ML models, while building the evaluations and tooling that help teams ship with confidence. You’ll also contribute to our ML platform, including model serving, LLM infrastructure, and production observability. At Numa, we believe great ML is about more than building bigger models. It’s about knowing whether a change is good enough to ship. Our evaluation-first approach makes that measurable in CI and production. What You’ll Do Build conversational AI systems for phone and SMS that understand customer needs, take action, and know when to act autonomously Develop tooling such as memory, knowledge graphs, and validated customization that help agents reason and adapt to dealership needs Train, evaluate, and deploy ML models using Ray Serve and Dagster for prediction, classification, ranking, and capacity forecasting, and keep them healthy in production Create offline and online evalua