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Level Up Your Career with Zynga! At Zynga, we bring people together through the power of play. As a global leader in interactive entertainment and a proud label of Take-Two Interactive, our games have been downloaded over 6 billion times—connecting players in 175+ countries through fun, strategy, and a little friendly competition. From thrilling casino spins to epic strategy battles, mind-bending puzzles, and social word challenges, our diverse game portfolio has something for everyone. Fan-favorites and latest hits include FarmVille™, Words With Friends™, Zynga Poker™, Game of Thrones Slots Casino™, Wizard of Oz Slots™, Hit it Rich! Slots™, Wonka Slots™, Top Eleven™, Toon Blast™, Empires & Puzzles™, Merge Dragons!™, CSR Racing™, Harry Potter: Puzzles & Spells™, Match Factory™, and Color Block Jam™—plus many more! Founded in 2007 and headquartered in California, our teams span North America, Europe, and Asia, working together to craft unforgettable gaming experiences. Whether you're spinning, strategizing, matching, or competing, Zynga is where fun meets innovation—and where you can take your career to the next level. Join us and be part of the play! Position Overview: Zynga is looking for an experienced Senior Game Designer to work on one of our new mobile games. This role leads and participates in direct design and creative input on content and event design in the game. What You'll Do: Design theming and content for new events in the game Implement new content and events on a cadence Create flexible sheets and models to balance cadenced events Own, drive, and collaborate with other disciplines for Live Ops development Analyze real-time feedback and metrics, and adjust designs accordingly while maintaining live game balance Design and improve tools to make the design pipeline faster and more efficient for the team Be the advocate of good event design on the team Design new event types for the game Work closely with other disciplines to design and prototype

About Us Comfrt is one of the fastest growing DTC brands, dedicated to blending mental wellness, inclusivity, and elevated comfort into every piece we create. Our mission goes beyond clothing. We strive to build a community where everyone feels supported and seen. About the Job The Senior Manager, Retail Planning owns the merchandise planning behind Comfrt's growing store fleet. You will plan what our stores carry, how much, and when, buying from our ecommerce inventory to set each store up to hit its sales and margin targets.Sitting at the bridge between our ecommerce inventory and our physical stores, you will build the sales, inventory, and receipt plans (open-to-buy), allocate and replenish product across locations, and give store teams the right assortment and stock depth to succeed. This is a hands on, analytical role for someone who loves turning data into a plan, and a plan into full shelves and strong sell through, in a fast moving, high growth environment. Responsibilities Retail Merchandise Planning & OTB Build and own store sales, inventory, and receipt (open-to-buy) plans by store, month, and category, aligned to each store's four wall targets. Forecast and reforecast in season, adjusting to sales trends, sell through, and seasonality. Set preseason and in season plans for core and new products, and manage inventory through peak periods such as Black Friday and holiday. Partner with Finance, Planning and Retail leadership to tie the merchandise plan to the store P&L and inventory investment. Allocation, Replenishment & Inventory Flow Allocate product from our ecommerce and DC inventory into stores by size profile, sell through, and store capacity. Own replenishment of core and never out styles so bestsellers never gap on the floor. Manage store-to-store and store-to-DC transfers to keep inventory balanced across the fleet. Plan markdowns and clearance to protect margin and clear aged inventory. Partner with the DC and operations teams

At Gilead, we’re creating a healthier world for all people. For more than 35 years, we’ve tackled diseases such as HIV, viral hepatitis, COVID-19 and cancer – working relentlessly to develop therapies that help improve lives and to ensure access to these therapies across the globe. We continue to fight against the world’s biggest health challenges, and our mission requires collaboration, determination and a relentless drive to make a difference. Every member of Gilead’s team plays a critical role in the discovery and development of life-changing scientific innovations. Our employees are our greatest asset as we work to achieve our bold ambitions, and we’re looking for the next wave of passionate and ambitious people ready to make a direct impact. We believe every employee deserves a great leader. People Leaders are the cornerstone to the employee experience at Gilead and Kite. As a people leader now or in the future, you are the key driver in evolving our culture and creating an environment where every employee feels included, developed and empowered to fulfil their aspirations. Join Gilead and help create possible, together. Job Description The Senior Director, Applied AI Solutions, leads the applied AI function within the AI Research Center (ARC), part of Gilead’s Clinical Data Science (CDS) organization in Drug Development. As CDS’s center of excellence for applied AI, this leader is accountable for the technical and product path from a prioritized AI use case defined by CDS functional organizations to a trusted, reusable capability in production — spanning discovery, experimentation, technical validation, first production release, adoption support, and measured value. The ownership model is deliberate. Business ownership of priorities, requirements, funding, process change, and workflow outcomes remains with the CDS and Develo

At Gilead, we’re creating a healthier world for all people. For more than 35 years, we’ve tackled diseases such as HIV, viral hepatitis, COVID-19 and cancer – working relentlessly to develop therapies that help improve lives and to ensure access to these therapies across the globe. We continue to fight against the world’s biggest health challenges, and our mission requires collaboration, determination and a relentless drive to make a difference. Every member of Gilead’s team plays a critical role in the discovery and development of life-changing scientific innovations. Our employees are our greatest asset as we work to achieve our bold ambitions, and we’re looking for the next wave of passionate and ambitious people ready to make a direct impact. We believe every employee deserves a great leader. People Leaders are the cornerstone to the employee experience at Gilead and Kite. As a people leader now or in the future, you are the key driver in evolving our culture and creating an environment where every employee feels included, developed and empowered to fulfil their aspirations. Join Gilead and help create possible, together. Job Description At Gilead our pursuit of a healthier world for all people has yielded a cure for hepatitis C, revolutionary improvements in HIV treatment and prevention as well as advancements in therapies for viral and inflammatory diseases and certain cancers. We set and achieve bold ambitions in our fight against the world’s most devastating diseases, united in our commitment to confronting the largest public health challenges of our day and improving the lives of patients for generations to come. As a Senior Medical Science Liaison at Gilead you will be part of the Breast team of Medical Science Liaisons reporting to a regional Field Director. The MSL will disseminate

Our Purpose Mastercard powers economies and empowers people in 200+ countries and territories worldwide. Together with our customers, we’re helping build a sustainable economy where everyone can prosper. We support a wide range of digital payments choices, making transactions secure, simple, smart and accessible. Our technology and innovation, partnerships and networks combine to deliver a unique set of products and services that help people, businesses and governments realize their greatest potential. Title and Summary Senior Technical Program Manager (Planning – Payments Domain) Who is Mastercard? Mastercard is a global technology company in the payments industry. Our mission is to connect and power an inclusive, digital economy that benefits everyone, everywhere by making transactions safe, simple, smart, and accessible. Using secure data and networks, partnerships and passion, our innovations and solutions help individuals, financial institutions, governments, and businesses realize their greatest potential. Our decency quotient, or DQ, drives our culture and everything we do inside and outside of our company. With connections across more than 210 countries and territories, we are building a sustainable world that unlocks priceless possibilities for all. Overview The Mastercard Network & Digital Payment Services team is looking for a Senior Technical Program Manager to own planning and delivery execution across our product and platform portfolio. You will run the planning function for the organization — roadmap, forecast, budget, headcount, and delivery commitments — across multiple concurrent programs. As Senior Technical Program Manager, you will work with product managers, tech leads, architects, and operations and engineering leaders to deliver complex programs. You will define roadmap deli

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people. Today, we’re tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what’s never been done before takes vision, innovation, and the world’s best talent. As an NVIDIAN, you’ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world. As a Formal Verification Engineer at NVIDIA, you will verify the build and implementation of the industry's leading GPUs. In this position, your responsibilities will be to verify the micro-architecture using formal verification tools, define the verification scope, and ensure correctness. You will employ sophisticated formal techniques to acquire sufficiently bounded proofs while working with architects, designers, and pre- & post-silicon verification teams to accomplish your tasks. You will efficiently complete the formal verification effort for the entire project cycle, delivering high-quality results on schedule, and clearly conveying those results to the team. What you will be doing: Identify key behaviors for verification to write clear testplans for sophisticated designs. Implement testplans using the latest formal techniques, including the development of environment assumptions, assertions, and cover properties. Develop abstraction models to overcome complexity challenges and acquire full proofs, or bounded proofs with sufficient coverage. Drive formal tools to realize their best performance. Debug RTL to identify causes of failure scenarios. Contribute to flow and script development

The DFP Engineer – Manufacturing role defines and implements the validation and screening of new silicon features within high‑volume manufacturing flows. You will translate product requirements into executable test methodologies, infrastructure, and detailed manufacturing test plans that ensure quality, yield, and efficiency at scale. This role sits at the intersection of multiple multi-functional teams to make manufacturing test an outstanding part of the overall codesign and DFP lifecycle. What you will be doing: Own end-to-end manufacturing test methodology across all test stages. Translate system specs and product POR into DFP requirements, test content, coverage, and flows. Define and maintain the DFP roadmap, including infrastructure and turning point planning. Partner multi-functionally to implement test content, debug hooks, and coverage improvements. Drive alignment on manufacturability, test time, binning strategies, and cost vs. coverage trade-offs. Embed testability requirements into design to enable robust screening and debug. Define data and analytics frameworks to support yield analysis and continuous improvement. Lead DFP documentation as the single source of truth and feed findings into future methodologies. What we need to see: MS in Electrical Engineering, Computer Engineering, or related field (or equivalent experience) 6&#43; years in silicon post‑silicon validation and/or high‑volume manufacturing test for complex SoCs, GPUs, CPUs, or similar. Hands‑on experience with test content bring‑up, limit setting, correlation to characterization, and yield/coverage optimization. Proficiency with scripting and data analysis (e.g., Python, MATLAB, R, SQL) for test data analytics, limit tuning, and yield/debug analysis. <

The SCG Architecture team is hiring a Senior Power Integrity Co-Design Engineer to architect and deliver di/dt mitigation across silicon, package, board, and platform. This role bridges architecture, silicon, and platform — translating product noise targets into shipped specifications, and feeding silicon findings back into the next generation's build. Success in this role requires strong systems thinking and a willingness to accept ambiguity. It also requires the ability to apply AI as a force multiplier while maintaining rigorous engineering judgment. What you'll be doing: Architect voltage-noise mitigation across the full stack — silicon, package, board, platform — and own the codesign trade-offs between them. Co-design noise features with Speed, Power, Reliability, Circuit Design , Power-Arch, ASIC, and platform teams. You're the connective tissue across the codesign web. Work with other team members to define product-level voltage noise targets, drive them to closure, and sign them off at shipment. Build and take ownership of the Sim-to-Si correlation methodology for noise. You know when a model is lying and when silicon is. Model and prototype next-gen noise features — transient sense, droop response, mitigation IP, and codify them so every future program inherits them. Lead show-stopper noise bugs during bringup. The critical issues stop with you. Drive architecture-level codesign tradeoffs across V/F Power Noise Reliability Thermal (Noise-Variation) and (Noise-to-Closure) boundary work, where the highest-leverage innovation lives. What we need to see: BS / MS / PhD in EE, CE, or related (or equivalent experience). 5&#43; years in silicon power integrity, voltage noise, or PDN. Deep expertise in at least one of

Build the infrastructure that keeps every NVIDIA chip aligned from first spec to final shipment. NVIDIA's Silicon Co-Design Group sits at the convergence of architecture, silicon, systems, and manufacturing. The System–Manufacturing Architecture (SMAC) team coordinates between system specifications and manufacturing test specifications from pre-silicon POR through production release across GPU, SoC, and CPU programs. When that alignment drifts, silicon faces the consequences: escapes, yield loss, and performance loss. We're hiring a Senior Manufacturing & System Co-Design Workflow Engineer to lead the methodology and infrastructure that maintains holistic, systematic alignment, at scale across the full portfolio. The strongest candidates in this role design the workflow before being asked to fix a program, and build the checks and automation that confirm alignment holds long after they've moved on to the next problem. What you’ll be doing: SMAC Workflow Methodology: Define manufacturing spec types, including schema and semantics, derived from system PORs and features. Own the methodology that governs how specification work gets structured, versioned, and validated across the program lifecycle. Production Python Pipelines & Automated Checks: Develop production-grade Python pipelines and automated checks that catch specification drift between system POR and manufacturing test programs ,ATE, SLT, BLT, L10&#43;, before silicon exposes the discrepancy. The goal is that misalignments surface in the workflow, not on the tester. E2E Program Integration & TPM Attestation: Wire SMAC work into the end-to-end program spine, milestones, gates, and artifacts, and define explicit TPM-driven attestation when checks lag. Alignment can't be assumed; it must be proven at every stage. Agent-Ready Tooling & CI Infrastructure: Integrate tooling into an agent-ready

Define the physical limits of what a chip can do, then break them! NVIDIA's Silicon Co-Design Group sits at the crossroads of architecture, silicon, systems, and manufacturing, where first principles thinking translates directly into product outcomes at scale. As GPU power density and thermal limits approach physical boundaries, the gap between system architecture needs and manufacturable, testable capabilities widens with every generation, and this role exists to close it. You wouldn't be maintaining existing solutions, you'd be identifying where physical constraints will erode NVIDIA's competitive edge before anyone else sees it coming, then building the cross-domain responses that ensure the next generation leapfrogs those limits entirely. The problems here don't have known answers yet: Every generation of NVIDIA silicon pushes closer to the limits of physics. The Co-Design Architect role isn't about optimizing within known bounds; it's about redrawing those bounds entirely. If you want your work to shape what's physically possible in the world's most demanding computing products, this is where that work happens. What you'll be doing: Power, Thermal & Packaging Limits Analysis: Gather and analyze the hard constraints of packaging, power delivery, and thermal dissipation against roadmap demands, predicting when those constraints will reduce competitiveness and acting before they do. Cross-Domain Solution Development: Develop solutions that span silicon features, packaging innovation, firmware and hardware co-design, and DFX updates, ensuring future products are not only performant but testable to the highest quality and reliability standards. Packaging Technology Evaluation: Assess emerging packaging technologies for their voltage/frequency, noise, reliability, and testability implications, determining which are worth adopting an

Senior Low Latency Developer – Equities Connectivity Engineer the future of global finance. At Citi, our Tech team doesn’t just support finance – we are helping to redefine it. Every day, $5 trillion crosses through our network. We do business in 180&#43; countries operating at a scale few can match. From deploying advanced AI to helping shape global markets, we build systems that matter. Look to join a team where your work helps influence economies, your ideas can drive innovation and outcomes, and your growth is backed by mentorship, continuous learning and flexibility with potential hybrid work opportunities. Help solve real-world challenges that touch millions and get the opportunity to build the future of finance with Citi Tech. Equities Technology Equities Technology at Citi is undertaking a bold, multi‑year transformation to build a best‑in‑class global platform across execution, prime, clearing and cross‑product margining. We are re‑engineering our technology estate to achieve world‑leading performance and resiliency, enabling new capabilities in advanced execution, global market connectivity, and modernized post‑trade, clearing and margin processes. Our ambition is to deliver a seamlessly integrated, highly automated platform that drives outstanding client outcomes and accelerates growth across our global franchise. As part of the team, you’ll collaborate closely with high‑caliber engineers and deeply engaged business and product partners - working together to define and deliver the next generation of Equities technology at Citi . Role Overview Citi's Equities Technology organization is seeking an experienced, hands-on engineer to join the Equities Electronic-Execution (Electronic Trading) technology team. The person in this role will be responsible for the development and operational excellence of Citi's next-generation low-latency connectivity platforms.

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people. Today, we’re tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what’s never been done before takes vision, innovation, and the world’s best talent. As a NVIDIAN, you’ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world. Silicon Co-Design Group (SCG) is a wide-ranging, multi-functional, integral team at NVIDIA. We sit at the crossroads of design, architecture, marketing, operations, and productization. Our contributions span from the arch stage and extend to defining final products. We architect innovative solutions for Datacenter, Server, Gaming, Robotics, Automotive, and Embedded markets. We are fast-paced, dynamic, share a sense of humor, and collaborate extensively to push the boundaries of what is possible. We do all of this with an eye on making groundbreaking, impactful market disruptions! We are seeking an experienced Senior Manager to lead Product Co-Design and Verification in areas of Speed, Reliability and Power Compliance. You will oversee speed/timing/reliability system design, Simulation-to-Silicon power/speed verification, features for product compliance and test chip development crating future product roadmaps. The ideal candidate will have deep technical expertise in semiconductor/VLSI design and a background in translating product requirements into design and vice versa. This is a highly visible, multi-functional role to produce outstanding products that ship at SOL and meet the high NVIDIA quality we demand and customers expect. <p

Become a part of our caring community The Senior Portfolio Enablement Lead is a strategic portfolio transformation role responsible for shaping and enabling Humana's portfolio operations, Agile Release Train (ART) design, and Ways of Working across the portfolio. Acting as a trusted advisor to senior executives (SVPs, VPs, and portfolio leaders), the role translates transformation strategy into scalable execution by diagnosing portfolio delivery challenges, guiding organizational design, and improving alignment, flow, and value delivery. As a Senior Portfolio Enablement Lead, you will: Partner with portfolio and organization leadership to develop and enable portfolio, aligned to enterprise portfolio operations to achieve portfolio initiatives their outcomes. Perform quantitative and qualitative assessments, including stakeholder analysis and change impact assessments, to develop data-driven change strategies for key stakeholder groups. Build and manage portfolio transformation roadmaps to drive executive buy-in and sponsor engagement across technology and business/product leadership and leadership to drive understanding and adoption of key changes Develop Release Train Engineers to our Humana Ways of Working and enterprise tooling subject matter experts for Agile Release Trains and Scrum Teams Measure effectiveness of change interventions through defined metrics and continuously evolve plans to optimize adoption outcomes Regularly report activity status to organizational, portfolio and transformation leadership; proactively escalate and help resolve risks and issues Partners with leaders to align all continuous improvement goals and objectives Partner with Release Train Engineers in the portfolio to monitor activity level of continuous improvement, adoption of Humana Ways of Working, risks patterns

Abbott is a global healthcare leader that helps people live more fully at all stages of life. Our portfolio of life-changing technologies spans the spectrum of healthcare, with leading businesses and products in diagnostics, medical devices, nutritionals and branded generic medicines. Our 122,000 colleagues serve people in more than 160 countries. JOB DESCRIPTION: About Abbott Abbott is a global healthcare leader, creating breakthrough science to improve people’s health. We’re always looking towards the future, anticipating changes in medical science and technology. Working at Abbott At Abbott, you can do work that matters, grow, and learn, care for yourself and your family, be your true self, and live a full life. You’ll also have access to: Career development with an international company where you can grow the career you dream of. Employees can qualify for free medical coverage in our Health Investment Plan (HIP) PPO medical plan in the next calendar year. An excellent retirement savings plan with a high employer contribution Tuition reimbursement, the Freedom 2 Save student debt program, and FreeU education benefit - an affordable and convenient path to getting a bachelor’s degree. A company recognized as a great place to work in dozens of countries worldwide and named one of the most admired companies in the world by Fortune. A company that is recognized as one of the best big companies to work for as well as the best place to work for diversity, working mothers, female executives, and scientists. <br /

NVIDIA silicon runs the world's AI infrastructure. The frequency it delivers across every voltage, process corner, and workload is not assumed. It is measured, correlated, and validated. This role does that work. The Silicon Co-Design Group is where architecture intent becomes silicon reality. We own the boundary between what was designed and what was built, and we are the team that knows the difference. When a program ships at frequency and at quality, this team is a reason why. You will be the person who follows through between simulation and silicon. When the model is wrong, a frequency corner that doesn't hold, a Vmin that walks, a critical path that timing analysis missed, you find out why, and your data is what the rest of the program acts on. Architecture, design, and product teams do not guess. They use your numbers. The engineers who do this well are rare. They think like circuit designers, work like experimentalists, and reason like data scientists. If that is you, read on. What you'll be doing: Own silicon speed characterization from first power-on through production sign-off, covering frequency, Vmin, Vmax, and timing margins across the full PVT space. Close the correlation gap. Tie pre-silicon timing analysis and critical path predictions to measured silicon, quantify where the model diverges from reality, and produce analysis that architecture and design can act on with confidence. Trace failures to their source, whether a microarchitectural bottleneck, a critical path that doesn't close under voltage, a clocking issue, or a process corner the model didn't anticipate, and drive the resolution. Own and build AI agents that work at your direction: automated test orchestration, intelligent data pipelines, and analysis flows that expand coverage and compress cycle time without sacrificing difficulty. Know where AI accelerates real work and whe