NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people. Today, we’re tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what’s never been done before takes vision, innovation, and the world’s best talent. As an NVIDIAN, you’ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world. As a Formal Verification Engineer at NVIDIA, you will verify the build and implementation of the industry's leading GPUs. In this position, your responsibilities will be to verify the micro-architecture using formal verification tools, define the verification scope, and ensure correctness. You will employ sophisticated formal techniques to acquire sufficiently bounded proofs while working with architects, designers, and pre- & post-silicon verification teams to accomplish your tasks. You will efficiently complete the formal verification effort for the entire project cycle, delivering high-quality results on schedule, and clearly conveying those results to the team. What you will be doing: Identify key behaviors for verification to write clear testplans for sophisticated designs. Implement testplans using the latest formal techniques, including the development of environment assumptions, assertions, and cover properties. Develop abstraction models to overcome complexity challenges and acquire full proofs, or bounded proofs with sufficient coverage. Drive formal tools to realize their best performance. Debug RTL to identify causes of failure scenarios. Contribute to flow and script development
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The DFP Engineer – Manufacturing role defines and implements the validation and screening of new silicon features within high‑volume manufacturing flows. You will translate product requirements into executable test methodologies, infrastructure, and detailed manufacturing test plans that ensure quality, yield, and efficiency at scale. This role sits at the intersection of multiple multi-functional teams to make manufacturing test an outstanding part of the overall codesign and DFP lifecycle. What you will be doing: Own end-to-end manufacturing test methodology across all test stages. Translate system specs and product POR into DFP requirements, test content, coverage, and flows. Define and maintain the DFP roadmap, including infrastructure and turning point planning. Partner multi-functionally to implement test content, debug hooks, and coverage improvements. Drive alignment on manufacturability, test time, binning strategies, and cost vs. coverage trade-offs. Embed testability requirements into design to enable robust screening and debug. Define data and analytics frameworks to support yield analysis and continuous improvement. Lead DFP documentation as the single source of truth and feed findings into future methodologies. What we need to see: MS in Electrical Engineering, Computer Engineering, or related field (or equivalent experience) 6+ years in silicon post‑silicon validation and/or high‑volume manufacturing test for complex SoCs, GPUs, CPUs, or similar. Hands‑on experience with test content bring‑up, limit setting, correlation to characterization, and yield/coverage optimization. Proficiency with scripting and data analysis (e.g., Python, MATLAB, R, SQL) for test data analytics, limit tuning, and yield/debug analysis. <
The SCG Architecture team is hiring a Senior Power Integrity Co-Design Engineer to architect and deliver di/dt mitigation across silicon, package, board, and platform. This role bridges architecture, silicon, and platform — translating product noise targets into shipped specifications, and feeding silicon findings back into the next generation's build. Success in this role requires strong systems thinking and a willingness to accept ambiguity. It also requires the ability to apply AI as a force multiplier while maintaining rigorous engineering judgment. What you'll be doing: Architect voltage-noise mitigation across the full stack — silicon, package, board, platform — and own the codesign trade-offs between them. Co-design noise features with Speed, Power, Reliability, Circuit Design , Power-Arch, ASIC, and platform teams. You're the connective tissue across the codesign web. Work with other team members to define product-level voltage noise targets, drive them to closure, and sign them off at shipment. Build and take ownership of the Sim-to-Si correlation methodology for noise. You know when a model is lying and when silicon is. Model and prototype next-gen noise features — transient sense, droop response, mitigation IP, and codify them so every future program inherits them. Lead show-stopper noise bugs during bringup. The critical issues stop with you. Drive architecture-level codesign tradeoffs across V/F Power Noise Reliability Thermal (Noise-Variation) and (Noise-to-Closure) boundary work, where the highest-leverage innovation lives. What we need to see: BS / MS / PhD in EE, CE, or related (or equivalent experience). 5+ years in silicon power integrity, voltage noise, or PDN. Deep expertise in at least one of
Build the infrastructure that keeps every NVIDIA chip aligned from first spec to final shipment. NVIDIA's Silicon Co-Design Group sits at the convergence of architecture, silicon, systems, and manufacturing. The System–Manufacturing Architecture (SMAC) team coordinates between system specifications and manufacturing test specifications from pre-silicon POR through production release across GPU, SoC, and CPU programs. When that alignment drifts, silicon faces the consequences: escapes, yield loss, and performance loss. We're hiring a Senior Manufacturing & System Co-Design Workflow Engineer to lead the methodology and infrastructure that maintains holistic, systematic alignment, at scale across the full portfolio. The strongest candidates in this role design the workflow before being asked to fix a program, and build the checks and automation that confirm alignment holds long after they've moved on to the next problem. What you’ll be doing: SMAC Workflow Methodology: Define manufacturing spec types, including schema and semantics, derived from system PORs and features. Own the methodology that governs how specification work gets structured, versioned, and validated across the program lifecycle. Production Python Pipelines & Automated Checks: Develop production-grade Python pipelines and automated checks that catch specification drift between system POR and manufacturing test programs ,ATE, SLT, BLT, L10+, before silicon exposes the discrepancy. The goal is that misalignments surface in the workflow, not on the tester. E2E Program Integration & TPM Attestation: Wire SMAC work into the end-to-end program spine, milestones, gates, and artifacts, and define explicit TPM-driven attestation when checks lag. Alignment can't be assumed; it must be proven at every stage. Agent-Ready Tooling & CI Infrastructure: Integrate tooling into an agent-ready
Define the physical limits of what a chip can do, then break them! NVIDIA's Silicon Co-Design Group sits at the crossroads of architecture, silicon, systems, and manufacturing, where first principles thinking translates directly into product outcomes at scale. As GPU power density and thermal limits approach physical boundaries, the gap between system architecture needs and manufacturable, testable capabilities widens with every generation, and this role exists to close it. You wouldn't be maintaining existing solutions, you'd be identifying where physical constraints will erode NVIDIA's competitive edge before anyone else sees it coming, then building the cross-domain responses that ensure the next generation leapfrogs those limits entirely. The problems here don't have known answers yet: Every generation of NVIDIA silicon pushes closer to the limits of physics. The Co-Design Architect role isn't about optimizing within known bounds; it's about redrawing those bounds entirely. If you want your work to shape what's physically possible in the world's most demanding computing products, this is where that work happens. What you'll be doing: Power, Thermal & Packaging Limits Analysis: Gather and analyze the hard constraints of packaging, power delivery, and thermal dissipation against roadmap demands, predicting when those constraints will reduce competitiveness and acting before they do. Cross-Domain Solution Development: Develop solutions that span silicon features, packaging innovation, firmware and hardware co-design, and DFX updates, ensuring future products are not only performant but testable to the highest quality and reliability standards. Packaging Technology Evaluation: Assess emerging packaging technologies for their voltage/frequency, noise, reliability, and testability implications, determining which are worth adopting an
NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It’s a unique legacy of innovation that’s fueled by great technology—and amazing people. Today, we’re tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what’s never been done before takes vision, innovation, and the world’s best talent. As a NVIDIAN, you’ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world. Silicon Co-Design Group (SCG) is a wide-ranging, multi-functional, integral team at NVIDIA. We sit at the crossroads of design, architecture, marketing, operations, and productization. Our contributions span from the arch stage and extend to defining final products. We architect innovative solutions for Datacenter, Server, Gaming, Robotics, Automotive, and Embedded markets. We are fast-paced, dynamic, share a sense of humor, and collaborate extensively to push the boundaries of what is possible. We do all of this with an eye on making groundbreaking, impactful market disruptions! We are seeking an experienced Senior Manager to lead Product Co-Design and Verification in areas of Speed, Reliability and Power Compliance. You will oversee speed/timing/reliability system design, Simulation-to-Silicon power/speed verification, features for product compliance and test chip development crating future product roadmaps. The ideal candidate will have deep technical expertise in semiconductor/VLSI design and a background in translating product requirements into design and vice versa. This is a highly visible, multi-functional role to produce outstanding products that ship at SOL and meet the high NVIDIA quality we demand and customers expect. <p
NVIDIA silicon runs the world's AI infrastructure. The frequency it delivers across every voltage, process corner, and workload is not assumed. It is measured, correlated, and validated. This role does that work. The Silicon Co-Design Group is where architecture intent becomes silicon reality. We own the boundary between what was designed and what was built, and we are the team that knows the difference. When a program ships at frequency and at quality, this team is a reason why. You will be the person who follows through between simulation and silicon. When the model is wrong, a frequency corner that doesn't hold, a Vmin that walks, a critical path that timing analysis missed, you find out why, and your data is what the rest of the program acts on. Architecture, design, and product teams do not guess. They use your numbers. The engineers who do this well are rare. They think like circuit designers, work like experimentalists, and reason like data scientists. If that is you, read on. What you'll be doing: Own silicon speed characterization from first power-on through production sign-off, covering frequency, Vmin, Vmax, and timing margins across the full PVT space. Close the correlation gap. Tie pre-silicon timing analysis and critical path predictions to measured silicon, quantify where the model diverges from reality, and produce analysis that architecture and design can act on with confidence. Trace failures to their source, whether a microarchitectural bottleneck, a critical path that doesn't close under voltage, a clocking issue, or a process corner the model didn't anticipate, and drive the resolution. Own and build AI agents that work at your direction: automated test orchestration, intelligent data pipelines, and analysis flows that expand coverage and compress cycle time without sacrificing difficulty. Know where AI accelerates real work and whe
We’re building a world of health around every individual — shaping a more connected, convenient and compassionate health experience. At CVS Health®, you’ll be surrounded by passionate colleagues who care deeply, innovate with purpose, hold ourselves accountable and prioritize safety and quality in everything we do. Join us and be part of something bigger – helping to simplify health care one person, one family and one community at a time. Position Summary As a Senior Technical Product Manager, you will be responsible for driving the product delivery of our Documents Domain which is integrated with the organization's Epic electronic health record (EHR) platform and supports multiple business areas. You will own the product requirements for our document ingestion pipelines, integration with downstream applications, domain services and UX/UI for document viewer. These services are critical for ensuring our providers and care teams have access to clinical documentation that drives patient diagnosis and care coordination. You will partner with business and engineering leaders to lead a product domain and deliver high-quality products that improve healthcare delivery. What You'll Do Responsible for defining the product vision and strategic direction for your Epic Domain, ensuring continuous alignment with senior business and engineering leaders. You'll translate high-level business goals into a clear, actionable product strategy that are tied to OKRs. Partner with business stakeholders to define the product roadmap, overseeing day-to-day backlog management and prioritization to ensure alignment with your strategic vision. You will assess value and develop business cases to inform the nature and scope of new initiatives. This includes evaluating buy vs. build opportunities and identifying opportunities t
We’re building a world of health around every individual — shaping a more connected, convenient and compassionate health experience. At CVS Health®, you’ll be surrounded by passionate colleagues who care deeply, innovate with purpose, hold ourselves accountable and prioritize safety and quality in everything we do. Join us and be part of something bigger – helping to simplify health care one person, one family and one community at a time. Position Summary As a Senior Product Manager, you will lead product strategy and roadmap development for the organization's Epic electronic health record (EHR) platform and integrated clinical informatics tools. You will own the product strategy and requirements for our Revenue Cycle Management (RCM) domain, which is focused on CDI, coding, billing, collections, integrity and analytics. These are critical for ensuring the end to end workflow from accurate clinical documentation to appropriate coding and A/R completeness. You’ll apply deep Epic platform expertise, user-centric design, and agile methodologies to drive adoption, quality, and safety across enterprise informatics initiatives to improve healthcare delivery for our patients. What You'll Do Responsible for defining the product vision and strategic direction for your Epic Domain, ensuring continuous alignment with senior business and engineering leaders. You'll translate high-level business goals into a clear, actionable product strategy that are tied to OKRs. Partner with business stakeholders to define the product roadmap, overseeing day-to-day backlog management and prioritization to ensure alignment with your strategic vision. You will assess value and develop business cases to inform the nature and scope of new initiatives. This includes evaluating buy vs. build opportunities and identifying
We’re building a world of health around every individual — shaping a more connected, convenient and compassionate health experience. At CVS Health®, you’ll be surrounded by passionate colleagues who care deeply, innovate with purpose, hold ourselves accountable and prioritize safety and quality in everything we do. Join us and be part of something bigger – helping to simplify health care one person, one family and one community at a time. POSITION SUMMARY CVS Health is seeking a Senior Full Stack Engineer, Agentic AI Platform to join and lead engineering efforts for Lumina, CVS Health's enterprise knowledge and agentic AI platform. The Senior Full Stack Engineer, Agentic AI Platform will provide both technical and people leadership while driving the evolution of a platform that delivers trusted, secure, and governed AI experiences across the enterprise. As a Senior Full Stack Engineer, Agentic AI Platform, you will own the technical direction, architecture, scalability, and operational excellence of Lumina while leading a team of engineers and data scientists responsible for building and supporting the platform. This is a hands-on leadership role requiring active contribution to production code, architectural decision-making, code reviews, and engineering best practices, while simultaneously coaching and developing team members. The Senior Full Stack Engineer, Agentic AI Platform will play a critical role in advancing agentic AI capabilities, retrieval-augmented generation (RAG) systems, Model Context Protocol (MCP) integrations, enterprise search, knowledge ingestion, and AI governance. You will drive platform enhancements that improve retrieval quality, strengthen security and access controls, expand automation capabilities, and ensure the platform remains reliable, observable, and scalable as adoption accelerates across CVS
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron in Boise, Idaho has a current need for a Senior or Staff R&D Photolithography Materials Engineer . Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As an R&D Photolithography Materials Engineer at Micron Technology Inc., we are responsible for photolithography material selection and optimization for advanced memory devices. In this position, you will develop new technology and photo materials that meet device requirements and integrate new technology into manufacturing processes. This work could include photo materials for any photo processes including hardmasks and resists for I-line (365nm) through EUV (13.5nm). Additionally, you will address process and materials issues with pilot manufacturing and work on continuous improvements for manufacturability. Job Responsibilities: Lead long-term resist screening projects. Define success criteria with process owners, evaluate multiple rounds of design of experiments (DOEs) with suppliers, and identify top materials for detailed evaluation on devices in technology development. Broad knowledge and experience in photoresist chemistry with an ability to direct material optimization and development with our suppliers Work in a cleanroom, follow safety proc
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Description As an Expansion Program Integration & Readiness Engineer, you will build the future of Micron's global manufacturing by enabling the flawless delivery of strategic semiconductor expansion programs. This role uniquely positions you to bring diverse teams together, transforming ideas into operational capabilities that drive Micron's success! You will engage from early concept planning through factory startup and production ramp, influencing critical decisions to ensure that business objectives are achieved safely, efficiently, and predictably. You will collaborate with partners across Manufacturing, Facilities, Construction, Engineering, Supply Chain, Procurement, Finance, and Quality to solve complex challenges, drive continuous improvement, and build lasting business impact. This is an opportunity for a motivated leader who enjoys working across organizations, building positive relationships, and helping teams achieve ambitious goals. Responsibilities In your role as an Expansion Program Integration & Readiness Engineer, you will: Lead strategic expansion and readiness programs that enable future manufacturing growth. Partner with teams across the organization to deliver business-critical achievements and operational readiness objectives. Drive coordinated planning, risk management, issue resolution, and decision-making processes. Build alignment across multiple organizations while encouraging collaboration, tra
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Description As an Expansion Program Integration & Readiness Engineer, you will build the future of Micron's global manufacturing by enabling the flawless delivery of strategic semiconductor expansion programs. This role uniquely positions you to bring diverse teams together, transforming ideas into operational capabilities that drive Micron's success! You will engage from early concept planning through factory startup and production ramp, influencing critical decisions to ensure that business objectives are achieved safely, efficiently, and predictably. You will collaborate with partners across Manufacturing, Facilities, Construction, Engineering, Supply Chain, Procurement, Finance, and Quality to solve complex challenges, drive continuous improvement, and build lasting business impact. This is an opportunity for a motivated leader who enjoys working across organizations, building positive relationships, and helping teams achieve ambitious goals. Responsibilities In your role as an Expansion Program Integration & Readiness Engineer, you will: Lead strategic expansion and readiness programs that enable future manufacturing growth. Partner with teams across the organization to deliver business-critical achievements and operational readiness objectives. Drive coordinated planning, risk management, issue resolution, and decision-making processes. Build alignment across multiple organizations while encouraging collaboration, tra
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Ready to join a growing team!!! Micron Technology’s vision is to transform how the world uses information to enrich life and our dedication to people, innovation, tenacity, teamwork, and customer focus allows us to fulfill our mission to be a global leader in memory and storage solutions. This means conducting business with integrity, accountability, and professionalism while supporting our global community. We are the only company manufacturing today's major memory and storage technologies: DRAM, NAND and Emerging memory. We are looking for an energetic, ambitious, individual with strong work ethic and integrity to join us as the Scribe Design Senior Engineer. The Scribe Design Non-Array (SDNA) team is responsible for the design, layout, and verification of CMOS electrical test structures that enable CMOS device development, Compact modeling, Reliability modeling and Fab process monitoring. In this role you will work with a group of Engineers in India, Japan, and the US. As part of a global team, you will contribute to physical layout, floor planning and verifying through DRC and in-house verification tools. This role will allow you to work on all technology types at Micron. Responsibilities and Tasks include, but are not limited to: Proactively identify problem areas for improvement, propose, and develop innovative solutions. Continuously evaluate and implement new tools and technologies to improve the current automation flows. Demons
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. About the Role At Micron, the Senior AEBU Distributor Operations Analyst is a vital contributor to our goal of transforming how the world uses information. Based in Mexico, this role concentrates on backing Micron’s distributor operations across the Americas. You will strategically evaluate business performance, manage programs, and enhance operational excellence. In this position, you will be the crucial link between Sales, distributor teams, and internal partners in applications, product, pricing, and supply. Your work will involve supporting distributor performance, conducting Quarterly Business Reviews (QBRs), managing Market Development Funds (MDF), and leading all aspects of Strategic Customer Agreements (SCA). By using data, you will identify risks and opportunities, ensuring flawless execution of critical initiatives. Why Join This Team? Becoming a member of Micron means you will join an ambitious group committed to advancing world-class distributor operations. This position provides extensive exposure across various functions, enabling you to apply data-driven insights effectively and enhance performance throughout the Americas. Your efforts will be crucial in upholding our exceptionally high standards and reaching our business objectives! Key Responsibilities Coordinate distributor priorities, programs, commitments, issues, and actions across Americas Sales and distributor teams. Analyze POS, demand, inventory, supply, pricing, pipeline, and other business indicators to rec
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