Scale’s rapidly growing Global Public Sector team is focused on using AI to address critical challenges facing the public sector around the world. Our core work consists of: Creating custom AI applications that will impact millions of citizens Generating high-quality training data for custom LLMs Upskilling and advisory services to spread the impact of AI As a Full Stack Software Engineer (Forward Deployed), you’ll collaborate directly with public sector counterparts to quickly build full-stack, AI applications, to solve their most pressing challenges and achieve meaningful impact for citizens. At Scale, we’re not just building AI solutions—we’re enabling the public sector to transform their operations and better serve citizens through cutting-edge technology. If you’re ready to shape the future of AI in the public sector and be a founding member of our team, we’d love to hear from you. You will: Serve as the lead technical strategist for public sector engagements, converting ambiguous mission requirements into robust architectural roadmaps and guiding onsite implementation. Architect the fundamental frameworks for production-grade AI applications, setting the gold standard for how interactive UIs, backend systems, and AI models are integrated at scale to deliver reliable outcomes. Guide the evolution of cloud infrastructure, ensuring security, global scalability, and long-term system integrity across all environments. Direct the development of core platforms and shared services, ensuring they solve cross-cutting needs for diverse global client use cases. Partner with cross-functional leadership to steer the technical roadmap, mentoring senior and junior staff and ensuring all products align with a cohesive, future-proof technical architecture. Bridge the gap between the field and the core platform by turning real-world client lessons into the reusable patterns that power the entire engineering team. Ideally you’d have: Masters or Phd in Computer Science or equivale
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Why Sony Interactive Entertainment? Sony Interactive Entertainment isn’t just the Best Place to Play — it’s also the Best Place to Work. Sony Interactive Entertainment (SIE) is the company behind the PlayStation brand. As a subsidiary of Sony Group Corporation, we’re part of a proud legacy of innovation and excellence. SIE is a dynamic technology company, delivering cutting-edge hardware and network services to more than 100 million people and an entertainment leader, home to some of the most beloved and recognizable intellectual properties (IP) in the world. Our role at SIE is to create and nurture the experiences under the PlayStation brand, a name synonymous with entertainment excellence and creativity. Principal Wireless Protocol Architect/Engineer We are building a small team of versatile and enthusiastic leaders to create new products for the PlayStation community. Our team recently delivered the new PlayStation Link, PULSE Explore and PULSE Elite products, recently announced the FlexStrike and PULSE Elevate products, and are hard at work on what comes next. We need an experienced and innovative firmware engineer to help build and support our new products and features. In this role, you will be the technical point of accountability for wireless across accessories: hardware, platform software, audio, security, and product all will route protocol questions to you. You will represent the protocol and the implementation to silicon and ODM partners, evaluate combo-SoC roadmaps, drive vendor firmware defects to resolution, and design so that a supplier change is a port, not a rewrite. You will write the technical strategy documents that let a Director and a VP make an informed decision. And, grow the technical depth by being the leader that mentors senior engineers toward staff and principal, and raise the design-review bar for the whole org. Come and play with us! Responsibilities In this role, you will lead firmware development for high profile product deve
Our Trust in the East Cheshire area is highly regarded for its facilities, teaching and research. To support the A&E nursing team, we have a variety of shifts available for A&E Nurses with rates from £30.00 to £42.97 per hour. Working alongside a friendly, welcoming team of A&E Nurses and other professionals, you will be using some of the most advanced medical equipment in the country to provide constant monitoring and care for patients in a seriously ill or unstable condition. With the option of working flexible shifts, you will be working triage and treating resus patients with skilled efficiency while providing the highest standards of care As part of the A&E nursing team, you will have access to a wide range of development and support packages to ensure you are progressing your skills and your career at every opportunity. Day to day responsibilities include : Provide constant monitoring and care for patients in a seriously ill or unstable condition. Actively supporting emergency admissions and their families, communicating clinical information using a variety of methods, to ensure effective understanding. Assess and prioritise patient/client requirements, delegating effectively to others. To recognise, review and report patients/clients’ condition and any changes to it to senior members of staff within the multidisciplinary team. Responsible for adhering to the NMC professional Code of Conduct. Taking blood/fitting a canula, undertake patient observations (blood pressure, temperature, pulse, respiration rate and oxygen level) as patient need dictates throughout the shift. Treatment of resus patients and Triage Requirements of a Pulse A&E Nurse: Right to work within the UK – proof will be required Minimum of 6 months recent experience working in A&E in the last 12 months Ability to provide two professional referees with whom you have worked within 6 months to complete references to confirm your skills. Please make your applic
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Interested in changing the landscape of artificial intelligence workloads? Join our team where we are building next-generation, high-bandwidth memory products. In Micron's High Bandwidth Memory Architecture organization, we partner closely with customers to deliver memory solutions purpose-built for emerging AI systems and applications. As a Senior Member of Technical Staff or Member of Technical Staff, DRAM Design Engineer in the next-generation HBM Architecture team, you will drive the architecture and optimization 3D-stacked, high-performance memories. Apply your knowledge to optimize DRAM designs and architectures for maximum performance, power, and area (PPA). This role is ideal for experienced DRAM designers who will identify, architect, design, and simulate next-generation architectures and memory features in collaboration with experts in stack architecture, memory systems architecture, and SoC microarchitecture. Responsibilities: Identify and develop novel DRAM circuit architectures that anticipate next-generation AI workload requirements, to unlock improvements in bandwidth and energy efficiency. Collaborate with peers to identify the highest-leverage DRAM circuit bottlenecks and define architectural hypotheses. Validate architectural hypotheses through schematic-level circuit design, SPICE simulation, and tradeoff analysis, establishing PPA feasibility. Partner with layout designers to conduct floorplanning studies. Colla
Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Role Summary The SMTS acts as a technical authority in 3D NAND cell film development, setting strategic direction and leading multi-functional initiatives to drive department-wide impact by architecting solutions, accelerating innovation adoption, influencing technical standards, and mentoring engineers to elevate technical excellence. Defines technical strategy and drives cross-org adoption; leads complex problem solving across process/hardware/device interactions with no yield trade-off; builds the SME pipeline through structured mentorship. Main Responsibilities Define technical strategy; architect solutions; influence technical standards and drive process improvements; lead advanced process development, fixing, and integration. Integrate unit processes into full cell packages and validate device/process linkages via wafer-level electricals. <
Who are we? Cohere is the leading security-first enterprise AI company. We build cutting-edge foundation AI models and end-to-end products that are designed to solve real-world business problems. We’re training and deploying frontier models for enterprises who are building AI systems. We believe that our work is instrumental to the widespread adoption of AI and we are looking for folks that want to be part of that. We obsess over what we build. Each one of us is responsible for contributing to increasing the capabilities of our models and the value they drive for our customers. Cohere is a team of researchers, engineers, designers, and more, who are all passionate about their craft. We are a global technology company headquartered in Toronto with key offices in London, New York City, San Francisco, Montreal, Paris, Berlin and Seoul. Join us! Role Overview: As a Senior Member of Technical Staff specializing in web data for pre-training, you will play a pivotal role in developing the large scale web data pipeline that underpins Cohere’s advanced language models. In this role, you will work extensively with large-scale web corpora, transforming raw, noisy internet data into high-quality training data for pretraining. You will own key components of the data pipeline, including extraction, parsing, deduplication, and filtering. You will also analyze the composition and quality of web data, study its impact on downstream model performance, and collaborate closely with the broader data and evaluation teams to iterate on the training corpus. Your work will be essential to Cohere’s mission of delivering efficient and reliable language understanding and generation capabilities, driving innovation in natural language processing. If you are passionate about transforming data into the foundation of AI systems, this role offers a unique opportunity to make a meaningful impact. Please Note: We have offices in London, Paris, Toronto, San Francisco and New York but also embrace bein
Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Role Summary As a Senior Member of Technical Staff (SMTS), you are a module‑level CMP technical authority , responsible for defining CMP technical direction, leading FOAK developments, and driving cross‑functional execution across NAND nodes. As a SMTS (Senior Member of Technical Staff), you will be a part of revolutionary Next Generation NAND research & development CMP team driving Advanced NAND and CMP technology forward. The position promises ample opportunities for innovation, collaboration and testing a new dimension and scaling with Next Generation NAND. A SMTS CMP Engineer is a senior individual contributor responsible for defining, developing, and transferring advanced CMP processes for Micron NAND technologies. You will work directly with process integration and other process areas such as Wet Etch, CVD, Diffusion, Metals, Lithography & Dry Etch. You will work on state of the art and best in class CMP chambers & own the process roadmap to meet program and yield goals. Main Responsibilities Own and lead key NAND CMP process modules, translating technology challenges into executable roadmaps across current and future nodes Drive cross‑functional execution across Technology Development, Process Integration, Manufacturing, a
Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Job / Role Summary As a Technical Leadership Program (TLP) member, the SMTS defines and leads pathfinding photolithography technologies beyond current roadmaps, shaping Micron’s future technical capability. This role leads & influences development & integration strategy, mentors senior engineers, and drives innovation across development teams. Main Responsibilities Lead pathfinding initiatives for future nodes and architectures Establish long-term technology vision, defining long ‑ term photolithography process and equipment technology roadmaps. De ‑ risk novel lithography con
Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Job / Role Summary The SMTS is a senior technical leader who defines, develops, and transfers advanced dry etch processes for NAND technologies, owning key process levels/modules and translating scaling challenges into executable roadmaps across N / N+1 / N+2. The role includes FOAK development leadership, robustness/control strategy, multi-functional execution, and technical mentorship across the dry etch organization. Main Responsibilities Own key dry etch process levels/modules and translate technology challenges into executable roadmaps across multiple nodes. Lead FOAK dry etch development including recipe architecture, EPD strategy, control plans, and integration alignment. Establish tool robustness mechanisms (e.g., redundancy/controls/monitors as described in the posting) to improve manufacturability and maturity criteria. Drive multi-functional
Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Job / Role Summary The SMTS acts as a technical authority in NAND Advanced Thin Films, setting strategic direction, architecting solutions, and leading multi-functional initiatives with department-wide impact. The role drives innovation adoption, influences technical standards, leads advanced development/fixing/integration, and develops engineering capability through mentorship and knowledge building. Main Responsibilities Define technical strategy and lead multi-functional projects in structural and electrical film development. Architect solutions and promote innovative technologies across teams; influence standards and drive process improvements. Lead advanced process development, fixing, and integration; validate within and cross-module interactions and device/process linkages via wafer-level electricals
Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. This role is part of Micron’s Technical Leadership Program (TLP) —a career path for individuals who advance Micron and the industry through technical excellence, innovation, influence, and mentorship . TLP members are expected to set technical direction, lead through influence, and develop the next generation of technical leaders. Key Responsibilities: Define and lead pathfinding photolithography projects for future technology nodes and novel memory architectures. Establish long‑term photolithography technology vision and roadmaps, aligned with device scaling, yield, cost, and manufacturability goals. Drive early development and de‑risking of disruptive lithography solutions, including materials, processes, equipment, and patterning schemes. Serve as a recognized technical authority, influencing technology decisions across R&D, integration, and manufacturing organizations. Lead cross‑functional and cross‑site initiatives, ensuring alignment and execution of high‑impact technology programs. Partner with suppliers to co‑innovate next‑generation tools, materials, and metrology capabilities. Oversee advanced process development including imaging, overlay, OPC, process window optimization, and advanced process con
Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Position Overview Acts as a technical authority in 3D NAND Advanced thin film development, setting strategic direction and leading multi-functional initiatives. Drives department-wide impact by architecting solutions, accelerating innovation adoption, and influencing technical standards. Engages in global projects and mentors engineers to elevate technical excellence. Key Responsibilities Define technical strategy and lead multi-functional projects in structural and electric film development. <span
Senior Member of Technical Staff (SMTS) – Process Development, Wet, NAND — Fab 10N/X, Singapore. Apply via Workday.
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Our team develops the innovations that power AI, mobile, and computing platforms around the world. Our DRAM Engineering team brings together experts across design, verification, manufacturing, and product development to solve complex technical challenges and deliver advanced memory solutions. We are passionate about innovation, collaboration, and building technology that enables the next generation of computing. As a Semiconductor Design Engineer, you will help develop advanced DRAM and emerging memory products from concept through silicon validation. This role offers opportunities to contribute across circuit design, simulation, verification, and optimization while working closely with global engineering teams. Depending on experience, you may also lead technical projects, mentor engineers, and influence future memory design strategies. Responsibilities: Design, simulate, and optimize digital, analog, and mixed-signal circuits for DRAM and emerging memory products. Translate product requirements into circuit solutions and validate performance across operating conditions. Perform circuit verification, silicon correlation, debug, and tape-out support activities. Collaborate with design, verification, layout, CAD, product, and process teams to improve product quality and manufacturability. Contribute to design automation, AI-assisted workflows, technical reviews, and engineering protocols. Minimum Qualifications: <
Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. As a SoC Architecture and Design Engineer, you will be part of the Heterogeneous Integration Group (HIG), contributing to the architecture, design, development, and integration of next‑generation HBM SoC logic die. You will work closely with architecture, design, verification, physical design, firmware, and product teams to implement robust, high‑performance SoC solutions that meet ambitious power, performance, area, and schedule targets. This is a hands-on technical role for candidates passionate about architecture, RTL build, IP integration, debugging, and pre/post-silicon support. Key Responsibilities Architect, design and implement RTL for SoC‑level blocks and subsystems used in HBM logic die. Architect and design memory sub-systems including memory IP selection and integration, bus and protocol selection, and power/performance/area optimization. Integrate internal and third‑party IP (e.g., controllers, microcontrollers, NOC, RAS, MBIST, interfaces, adapters, buffers, PHY‑adjacent logic). Trans
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