Simulation Engineer Jobs

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Key Responsibilities Lead verification strategy, architecture, and execution across RTL, AMS (Analog Mixed-Signal), and Transistor-Level Verification (TAV) domains, driving key technical decisions throughout the product lifecycle. Define and implement verification methodologies, test plans, coverage strategies, and debug flows to ensure first-pass silicon success and high product quality. Collaborate with global cross-functional teams including design, product engineering, validation, and CAD/EDA groups to establish and deploy best-known verification practices. Develop, maintain, and enhance verification environments using SystemVerilog, UVM, SPICE/HSPICE, FineSim, Verilog, and related industry-standard tools. Perform root-cause analysis and debugging across digital, mixed-signal, and transistor-level designs, correlating simulation results with silicon behavior. Drive verification closure through functional, code, assertion, and mixed-signal coverage analysis. Evaluate, develop, and deploy innovative tools, automation frameworks, and AI-assisted solutions to improve verification efficiency, productivity, and quality. Apply strong knowledge of CMOS design fundamentals, semiconductor device behavior, circuit analysis, and mixed-signal architectures to solve complex verification challenges. Mentor and provide technical leadership to engineers while leading strategic verification initiatives across multiple teams and projects. Strong progr

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities will include, but are not limited to ESD Architecture Leadership & Strategy Define and own ESD architecture and protection strategy for high-speed I/O portfolios including: HBM (High Bandwidth Memory) / DDR / LPDDR PHY I/Os PCIe, USB, Ethernet, MIPI, and proprietary interfaces Lead ESD–I/O co‑design trade‑off decisions, balancing: Aggressive ESD targets (HBM / CDM / MM).Ultra‑low capacitance and leakage requirements Eye margin , jitter , bandwidth , return loss, and impedance matching Drive architectural choices for: Snapback clamps, rail clamps, diode steering networks. Triggered and advanced ESD devices (technology‑dependent). Domain isolation and sequencing protection for sophisticated SoCs Advanced Circuit Design, Modeling & Signoff : Perform and guide ESD circuit design and analysis at block and full‑chip level. Establish simulation methodologies for: Transient ESD stress (TLP‑equivalent behavior). Dynamic clamp triggering and current handling. I/O performance impact (cap loading, ringing, overshoot/undershoot. Own ESD modeling correlation: Work with device/modeling teams on compact models (dynamic R, triggering, CV behavior). Drive correlation between SPICE simulations, TLP/VF‑TLP, and silicon results. Act as the final technical authority for ESD Design reviews and signoff. Silicon Debug, Reliability & Qualification Ownership : Lead silicon-l

About the job Shape the power delivery that will make Graphcore’s next-generation AI compute systems reliable. As a Power Integrity Engineer, you will analyse power-delivery networks across silicon, package and PCB, turning complex behaviour into practical design recommendations. You will build PDN models, investigate parasitics, and use frequency-domain and time-domain analysis to understand stability, droop, resonances and transient response. Your work will directly inform decoupling, layout, and power and ground distribution choices. You will use electromagnetic simulation to understand resistance, inductance, coupling and impedance. You will also validate assumptions, identify technical risks, and connect simulation results with hardware measurements. You will start with clearly scoped PI problems, supported by experienced engineers when wider decisions are involved. As your capability grows, you will own larger parts of the PDN. The team and culture You will work alongside experienced PI engineers and colleagues across hardware disciplines, connecting analysis with real design decisions and measurements. You will own defined technical problems and move quickly from modelling to recommendations. Decisions are grounded in evidence, physical understanding and clear communication of uncertainty. You will contribute to design reviews, speak up when results expose risk, and take responsibility for the quality of your analysis. What we’re looking for Build, integrate and analyse PDN models for defined power rails, package structures, PCB designs or subsystems. Use frequency-domain impedance analysis and time-domain simulation to investigate voltage stability, droop, resonances and transient response. Evaluate decoupling choices and placement, considering capacitance, parasitics and the interaction between silicon, package and PCB. Use electromagnetic simulation to extract and understand resistance, inductance, coupling and impedance in power and ground structures. Che

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are seeking a Principal IO/Clocking Design Engineer to be a part of our design team working on critical high-speed circuits common to all DRAM related memory products! In this position, you will be responsible for the development, design, optimization, verification, and fan out of these high-speed circuits to all DRAM related projects at Micron. You will work on equalization and bandwidth extension to push the speed limits of the circuit and process technology, analyze resulting IO impairments, clock jitter and duty error impact to DRAM system and timing budget, and develop effective engineering solutions. Responsibilities: Innovate, design, optimize and verify high-speed IO and clocking circuits used in new DRAM products. Apply proven high-speed circuit design techniques and enhance critical performance evaluation of the IO data path and clocking path at circuit level. Develop accurate modeling, analysis and simulation methodology to capture key circuit performance metrics and their impact to product specifications at full-chip and system level. Work with Product Engineering and SI team to compare silicon performance with simulation results and support correlation activities. Collaborate with process integration and transistor modeling teams on Micron's next groundbreaking process node. Minimum Qualifications: Minimum MSEE + 10 years or BSEE + 12 years of industry experience in analog and mixed-signal circuit design. Proficiency w

About Atomic Industries Atomic Industries is reinventing how the world makes things. From cars and aerospace systems to medical devices and packaging, most physical goods begin life in a mold or are shaped by a manufacturing tool. Producing these tools has always been slow, manual, and dependent on scarce expertise, taking weeks or months. We’re changing that. At our Detroit headquarters, we combine the industrial DNA of America’s manufacturing heartland with the speed, intelligence, and precision of Silicon Valley. Our AI-driven platform tackles the hardest problems in geometry, process planning, and fabrication, collapsing production timelines from months to days and soon, minutes. We don’t just build software; we run a fully operational factory where our technology produces production-grade tooling every week, enabling tight feedback loops and rapid iteration. Backed by top-tier investors, we’re restoring speed, flexibility, and capability to the American industrial base. Our mission is to make manufacturing as agile and scalable as the digital world, and in doing so, rebuild the infrastructure of the physical economy. About the Role As an Automation Engineer at Atomic, you’ll build the systems that connect our physical factory to our software platform. You’ll work across sensors, electronics, industrial controls, robotics, machine interfaces, data infrastructure, and simulation to make our equipment observable, programmable, and increasingly autonomous. This is not a traditional plant controls role focused on maintaining an installed base of PLCs. You’ll help define the architecture, standards, and tools through which Atomic’s machines, molds, robots, and production workflows operate as one integrated system. This role is ideal for a software-capable automation generalist who enjoys building real hardware, commissioning it on the factory floor, and owning systems from first prototype through reliable production use. What You’ll Do Design, build, and commission a

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. For more than 47 years, Micron Technology, Inc. has redefined innovation with the world’s most advanced memory and semiconductor technologies. We’re an international team of visionaries and scientists, developing groundbreaking technologies that are transforming how the world uses information to enrich life for all. Become an Engineer CAD at Micron Technology in Guadalajara. Chip in to innovative memory designs impacting HBM, DRAM, and new technologies. Responsibilities: Provide day-to-day support for CAD tools, flows, and collateral, ensuring they meet the needs of HBM design teams at the Guadalajara Design Center. Collaborate closely with HBM design, layout, and verification methodology teams to propose and co-develop sophisticated capabilities, ensuring the deployment of outstanding practices and methodologies. Support all aspects of mixed-signal, transistor-level custom IC design, including logical design, custom layout, parameterized cells, automated place and route tools, physical design verification, ERC, Layout Parasitic Extraction, pre and post layout netlisting and simulation, digital and analog circuit simulation, timing and power analysis, reliability simulation and analysis, tape out, and mask generation. Minimum Qualifications: Bachelor’s or preferably a Master’s/PhD in Computer Engineering, Computer Science, or Electrical Engineering. 5+ years of direct CAD or Design experience in mixed-signal, custom IC design flows. Proven experience w

About the job Design the high-speed signal paths that let advanced AI compute systems perform at datacentre scale. As a Signal Integrity Engineer, you will shape the electrical performance of Graphcore hardware platforms. Your work will help 112Gbps and 224Gbps SERDES, DDR and processor interfaces operate within demanding system budgets. You will develop, extract and simulate PCB structures across production systems and test boards. You will define launches, via structures, transmission lines, stack-ups and low-loss materials for future designs. This role spans simulation, lab validation and practical design influence. You will work from concept through prototype bring-up, debug, validation and support for manufacture. The team and culture You will join the Hardware Engineering team, working closely with PCB, package substrate, system architecture and supplier teams. Work moves through simulation, design review, lab evidence and practical trade-offs. You will be expected to own signal integrity decisions across complex board and package interfaces. The team values careful analysis, pace and clear communication when problems need action. Decisions are made close to the engineering detail. You will challenge designs, guide constraints and help teams reach the best performance possible. What we’re looking for · Strong experience in high-speed digital circuit development, with deep signal and power integrity knowledge · Experience with high-frequency SERDES design and validation, including tens of GHz operation · Expertise using tools such as ANSYS SIWave, HFSS, Mentor HyperLynx or similar · Ability to design BGA and connector launches, via structures and transmission lines for GHz signals · Hands-on lab experience using VNAs, high-speed oscilloscopes and signal generators · Rigorous approach to design, debug and validation, with strong ownership and communication skills While we have outlined a set of requirements, we value transferable skills and diverse experiences.

About the job Shape the power delivery foundations behind advanced AI compute systems built for real-world reliability. As a Power Integrity Engineer, you will deliver robust power integrity solutions across Graphcore silicon and system designs. Your work will help advanced compute platforms operate reliably across complex packages, PCBs and hardware systems. You will develop and analyse power delivery networks across silicon, package and PCB designs. You will use simulation, measurement and lab correlation to turn power behaviour into clear design improvements. This role gives you ownership across the full system path. You will influence decoupling strategy, stack-up decisions, bring-up debug and best practice for future platforms. The team and culture You will join the Signal and Power Integrity team within Systems Engineering Hardware Motherboard. The team works across chip, package, board and system engineering to solve problems end to end. Work moves through modelling, simulation, validation and lab evidence. You will collaborate closely with hardware teams and third parties to improve power and signal performance. You will be trusted to guide technical decisions, review peer work and speak up when designs need challenge. Ownership sits close to the engineering detail. What we’re looking for · Strong understanding of power integrity principles, including PDN design and analysis · Proficiency with PI simulation tools such as PowerDC, PowerSI, HFSS/SiWave, Simplis, Spice, ADS or similar · Experience working across chip, package or board-level design · Ability to interpret simulation results and translate them into design improvements · Knowledge of electromagnetic simulation techniques and lab measurement using equipment such as VNAs and oscilloscopes · Strong analytical skills, clear communication and the ability to work cross-functionally While we have outlined a set of requirements, we value transferable skills and diverse experiences. If you meet most of our

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Staff Design Engineer in the Non-Volatile Memory Core Functional Group , you will design and optimize critical Flash memory circuits such as row/column drivers, sense amplifiers, and associated core circuitry , with focus on performance, power, area, timing, and reliability . Responsibilities Own block and subsystem-level circuit design, optimization, verification, and layout supervision . Optimize designs from base-cell to full-chip level using HSPICE, FastSPICE, NC-Verilog, and related tools. Collaborate with Logic/RTL teams to define array functionality and develop efficient Analog/Mixed-Signal (AMS) architectures combining custom circuits and digital techniques. Work with Technology and project teams on array waveforms, circuit integration, and full-chip floorplanning. Use scripting, automation, and AI/Agentic AI technologies to accelerate design, simulation, validation, and engineering productivity. Develop and maintain Micro-Architecture Specifications (MAS) and required design documentation, including ISO 26262 compliance where applicable. Provide technical guidance and mentor junior engineers . Requirements MS/PhD with 2–6 years or BS with 6–10 years of relevant semiconductor experience. Strong knowledge of analog, digital, and mixed-signal circuit design, CMOS device physics, Flash/NAND architecture, and reliability . <l

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Principal Security Firmware Engineer on Micron's enterprise SSD team, you will design and develop security features that protect next-generation storage products against evolving cybersecurity threats. You will architect and implement cryptography-based solutions — including data encryption, Root of Trust, Secure Boot, Device Attestation, and Self-Encrypting Devices (SED) — while leading the transition to post-quantum cryptography for future product generations. This role spans the full Security Development Lifecycle, from threat modeling and architecture through implementation, testing, and certification. You will work across SoC, FPGA, and simulation platforms and collaborate cross-functionally to deliver security solutions aligned with industry standards including OCP, TCG, NVMe, and PCIe. Responsibilities Design and develop security features for Micron enterprise SSDs, protecting against cybersecurity threats across the product lifecycle Architect, implement, and debug cryptography-based security solutions including data encryption, Root of Trust, Secure Boot and Update, Device Attestation, and Self-Encrypting Devices (SED) Lead the transition to post-quantum cryptography algorithms (LMS, ML-DSA, ML-KEM) for next-generation products Implement security protocols aligned with OCP, TCG, NVMe, and PCIe specifications Debug security firmware on SoC, FPGA, and simulation platforms using tools such as JTAG, memory dumps, and bus analyzers Dri

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron’s Design Engineering Group (DEG) is where bold ideas become real technology. We push the limits of memory and storage innovation, and we thrive in a collaborative environment where engineers learn, build, and solve challenges together. We are driven by curiosity, creativity, and the pursuit of better solutions every day! As a Design Engineer, you will help shape the next generation of Micron’s memory products. You’ll work closely with global design, verification, and product teams to bring innovative circuit designs from concept to silicon. Your work will directly influence product performance, quality, and reliability—and contribute to advancements that define the semiconductor industry. Responsibilities: Design, optimize, and verify block‑level circuits for DRAM projects Compare silicon performance with simulation results and support correlation activities Collaborate with process integration and modeling teams on new process node development Partner with global design groups and provide layout guidance through post‑layout simulation Minimum Qualifications: Bachelor’s degree in Electrical Engineering with 2&#43; years of semiconductor design or manufacturing experience Demonstrated experience in mixed-signal, digital, or analog IC design Experience designing regulators, charge pumps, oscillators, current references, bandgaps, or comparators Proficiency with SPICE and Verilog modeling and simulation Experience working wi

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Description: As a Design Engineer for Non-Volatile Memory Datapath Functional Group at Micron, you will support design and validation activities of Datapath and DDR high-speed interfaces of Flash Memory (non-volatile memory) products. Prior experience in Plane Datapath Design is a plus. In this highly challenging role, you will be engaged in high-speed circuits block level and sub-system level design and timing optimization and supervising their layout. You will be working with project/cross-functional teams to understand full chip floor plan and how to fit and place your circuits at full chip level. You will be also working with Application Engineering team to understand the new specs and translate them into circuit requirements. You will also work with CMOS/modeling team to define CMOS characteristics to realize and enable high-speed circuits. In addition to design activities, you will be heavily engaged in high-speed circuits functional and timing validation from base cells all the way to full-chip level using wide variety of simulation tools such as HSPICE, Fast SPICE and NC Verilog. Having 'Design/Verification &#43; AI' approach accelerates the design process. So, you should be able to adept to ‘Design &#43; AI’ approach with N

Who We Are Nuro believes self-driving vehicles are the most immediate and profound opportunity for AI to drive positive change in the physical world. Safer streets, more time for what matters, and easier access to the world around us, that’s why we’re building a universal autonomy platform: self-driving for all roads and all rides. Founded in 2016, Nuro is a physical AI company developing Level 4 autonomous driving technology for a wide range of vehicles, use cases, and markets. Powered by the Nuro Driver™, our universal autonomy platform enables the global mobility ecosystem to deploy autonomy at scale, from robotaxis and logistics fleets to personal vehicles. With years of real-world deployment experience and a flexible, partner-led business model, Nuro is working toward a future where millions of autonomous vehicles powered by our technology help make everyday life safer, easier, and more connected. Nuro has raised over $2B in capital from Uber, NVIDIA, Google, Softbank, Fidelity, T. Rowe Price, and other leading investors About the Role Nuro leverages many different bench-top systems to evaluate and regression test different aspects of the software and hardware integration layer. This performance simulation platform includes systems At Nuro, every autonomy code change, from ML model updates to radius of map around the robot to number of evaluated trajectories, must be validated for real-time performance on actual robot compute hardware before it reaches the road. You will own the infrastructure that makes this possible. Our Performance Simulation Platform is a hybrid benchmarking system: physical bench-top rigs running production robot compute (NVIDIA Thor platform), orchestrated by cloud-native infrastructure (Kubernetes, GCP), automated data pipelines feeding performance metrics into BigQuery and Grafana, pre/post simulation magic, custom tracing and profiling tools, and much much more. Engineers across the company rely on this platform daily to an

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. As a PCB Power Design Engineer, you will design and optimize power distribution systems for Tenstorrent’s next-generation AI accelerator cards, balancing performance, area, cost, and reliability. You will contribute across the full power design lifecycle, from component selection and simulation through board bring-up, validation, debugging, and production readiness. Working closely with hardware, firmware/software, thermal, mechanical, and validation teams, you will help deliver robust power architectures for high-performance AI systems. This role is hybrid, based out of Toronto, Canada. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are An electrical engineer with experience designing, analyzing, and debugging power distribution systems for high-performance or high-power products. A hands-on engineer who enjoys moving from schematics and simulations into lab bring-up, testing, troubleshooting, and design validation. A systems-oriented collaborator who can work effectively across hardware design, firmware/software, thermal, mechanical, and validation teams. A detail-oriented problem solver who balances electrical performance, power integr

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. At Micron, we are transforming how the world uses information to enrich life. The High Bandwidth Memory (HBM) Design team develops industry-leading memory solutions that enable advances in Artificial Intelligence, high-performance computing, graphics, and data-center applications. Our engineers collaborate across global teams to deliver innovative memory architectures and semiconductor technologies that power next-generation computing systems. As an HBM Design Engineer Intern, you will work alongside experienced memory engineers and gain hands-on experience in semiconductor design, simulation, verification, and analysis. This internship provides exposure to industry-standard design methodologies, EDA tools, and cross-functional collaboration throughout the product development lifecycle. You will also have opportunities to apply AI-Assisted and AI-Enabled workflows to improve engineering productivity, debug efficiency, and design quality. Responsibilities Assist with the design, simulation, analysis, and verification of HBM memory and logic circuits using industry-standard semiconductor design tools. Support RTL development, circuit implementation, timing analysis, power analysis, and functional validation activities. Develop scripts, automation solutions, and AI-Assisted workflows to improve design productivity, debug efficiency, and design-flow quality. Collaborate with Design, Verification, Physical Design, CAD, and Product Engineering teams on technical reviews, debug activities, and project deliv