Senior SoC Design Engineer β India, Bengaluru. Apply via Workday.
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Soc Verification Engineer Jobs
178 active opportunities Β· Updated for October 2026
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Explore current soc verification engineer jobs. Use filters to narrow by work mode, employment type, experience and date posted.
Senior SoC Chiplet Architect β 6 Locations. Apply via Workday.
HBM SOC Design Engineer β Richardson, TX. Apply via Workday.
HBM SoC Physical Design Engineer β Richardson, TX. Apply via Workday.
HBM SoC Physical Design Engineer β Richardson, TX. Apply via Workday.
HBM SoC RTL Design Engineer β Folsom, CA. Apply via Workday.
Senior SOC Physical Design Engineer, HBM β Richardson, TX. Apply via Workday.
HBM SoC RTL Design Engineer β Folsom, CA. Apply via Workday.
HBM SoC Physical Design Engineer β Folsom, CA. Apply via Workday.
Staff SoC DFT Engineer, HBM β 2 Locations. Apply via Workday.
Graphcore Senior Principal AI SoC Validation (Bring-up lead) Graphcore is a globally recognised leader in Artificial Intelligence computing systems. The company designs advanced semiconductors and data centre hardware that provide the specialised processing power needed to drive AI innovation, while delivering the efficiency required to support its broader adoption. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the worldβs most transformative technologies. We are opening a new AI Engineering Campus in Bengaluru which will play a central role in Graphcore's work building the future of AI computing. We are developing the next generation of AI compute, a large-scale system-on-chip (SoC) designed to power future high-performance AI systems. As the SoC Validation Lead, you will be responsible for enabling pre-production software to run reliably on new silicon quickly and efficiently, before showing that the silicon meets the highest standards of quality, reliability and functionality, ready for production deployment. You will lead a team delivering post-silicon validation across the full AI SoC, working across silicon, firmware, and platform levels. The role requires a deep technical understanding, strong hands-on debug experience, and the ability to collaborate effectively with hardware, software, and systems engineering teams. Key responsibilities Define and lead post-silicon validation strategy Develop and refine the overall post-silicon validation approach for our AI SoCs, ensuring reliable and timely delivery of validated silicon, architectural correctness, feature robustness, and at-scale system reliability. Drive cross-domain debug and issue resolution Lead investigation and resolution of complex issues spanning silicon, firmware, operating systems, and platform interactions. Ensure that fixes are effective and sustainable. Promote collaboration and shared understanding Work closely with
Intern - HBM SoC RTL Design Engineer β Folsom, CA. Apply via Workday.
Principal Engineer β ASIC SoC Design β Hyderabad - Phoenix Aquila, India. Apply via Workday.
Staff Design Engineer - SOC β Singapore. Apply via Workday.
System Software Engineer β GPU and SOC (2027 RDSS Intern) β Taiwan, Taipei. Apply via Workday.
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