Sr Design Quality Engineer Jobs

Sr Design Quality Engineer — Colorado, United States of America. Apply via Workday.

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Summary Micron is seeking a Senior Digital Design Engineer to contribute to the development of advanced DRAM digital and mixed-signal blocks. This role is responsible for RTL design, implementation, synthesis, timing analysis, power optimization, and design quality throughout the RTL-to-GDS flow. The engineer will collaborate with architecture, verification, and physical design teams to deliver high-performance, power-efficient designs that meet product specifications and PPA (Power, Performance, Area) objectives for next-generation memory products. Responsibilities Design, develop, and deliver RTL for complex DRAM digital and mixed-signal blocks, ensuring alignment with product specifications and performance targets. Perform front-end design quality checks including linting, CDC/RDC analysis, logic synthesis, timing constraint development, and timing closure activities. Collaborate with architecture, verification, and physical design teams to optimize power, performance, area (PPA), and overall design quality. Develop and maintain synthesis and timing constraints (SDC), analyze timing reports, and drive timing closure across multiple operating scenarios. Improve design methodologies, automation, and RTL-to-GDS flows to enhance development efficiency, design quality, and time-to-market. Minimum Qualifications Master’s degree in Electrical Engineering (or equivalent) with 4+ years of experience, or Bachelor’s degree with 5+ years

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Summary Micron is seeking a Senior Digital Design Engineer to contribute to the development of advanced DRAM digital and mixed-signal blocks. This role is responsible for RTL design, implementation, synthesis, timing analysis, power optimization, and design quality throughout the RTL-to-GDS flow. The engineer will collaborate with architecture, verification, and physical design teams to deliver high-performance, power-efficient designs that meet product specifications and PPA (Power, Performance, Area) objectives for next-generation memory products. Responsibilities Design, develop, and deliver RTL for complex DRAM digital and mixed-signal blocks, ensuring alignment with product specifications and performance targets. Perform front-end design quality checks including linting, CDC/RDC analysis, logic synthesis, timing constraint development, and timing closure activities. Collaborate with architecture, verification, and physical design teams to optimize power, performance, area (PPA), and overall design quality. Develop and maintain synthesis and timing constraints (SDC), analyze timing reports, and drive timing closure across multiple operating scenarios. Improve design methodologies, automation, and RTL-to-GDS flows to enhance development efficiency, design quality, and time-to-market. Minimum Qualifications Master’s degree in Electrical Engineering (or equivalent) with 4+ years of experience, or Bachelor’s degree with 5+ years

Secure Every Identity, from AI to Human Identity is the key to unlocking the potential of AI. Okta secures AI by building the trusted, neutral infrastructure that enables organizations to safely embrace this new era. This work requires a relentless drive to solve complex challenges with real-world stakes. We are looking for builders and owners who operate with speed and urgency and execute with excellence. This is an opportunity to do career-defining work. We're all in on this mission. If you are too, let's talk. We are looking for a high-impact Senior Software Engineer in Test (Sr. SET) to join our QA Core Team. In this role, you will partner closely with Infrastructure, Release Engineering, and Development teams to drive high availability, build scalable test automation, and optimize CI/CD release pipelines. You will take ownership of release-based testing, system observability, and automation services to ensure that weekly software releases are delivered seamlessly and with high quality across mission-critical systems. Key ResponsibilitiesTest Automation & System Quality Design, implement, and maintain scalable test automation frameworks for both server- and client-side systems using Java, TestNG, JUnit, and Selenium. Develop and execute comprehensive end-to-end and system test plans to validate new software changes against existing customer deployment patterns. Set up and manage automated test configurations, lab environments, and containerized test setups using Docker. Perform release-based validation, ensuring full compatibility, high availability, and uptime across weekly deployment cycles. CI/CD Pipeline Maintenance & Optimization Troubleshoot, debug, and optimize CI/CD pipelines (Jenkins, GitHub Actions, CircleCI, Buildkite) to reduce test execution times and eliminate flaky builds. Manage and optimize Maven-based build structures, dependency management, and automated release workflows. Write operational automation scripts using Python, Bash, or Gro

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. In this position, you will be joining a brilliant team to collaborate with Micron’s various design and verification teams all over the world, support the efforts of design verification flow development, optimization, and implementation and work with cross-functional team to assure the best cost, quality, reliability, time-to-market, and customer satisfaction We are seeking a talented CAD senior engineer specialized in analog and digital simulations to join our high-achieving engineering team. As a CAD senior engineer, you will play a pivotal role in optimizing and simulating complex analog and digital circuits, contributing to the development of state-of-the-art products that shape our industry. You will get a chance to develop the industry's first and unique flows to enhance productivity and reduce pre-silicon failures. Responsibilities: Work closely with memory design teams and solve their daily challenges and provide complete solutions for the future. Proactively identify problem areas for improvement, propose, and develop innovative solutions. Develop highly scalable, and clean software systems. Continuously evaluate and implement new tools and technologies to improve the current software flows. Work with EDA vendors to evaluate and integrate E

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron’s DRAM Design Engineering Group (DDEG) is where innovation meets excellence. We are advancing memory and storage technologies through collaborative engineering and creative problem-solving. Our team works at the forefront of semiconductor design, developing solutions that shape the future of memory products in a fast-paced, learning-focused environment. As a Design Verification Engineer, you will help develop next-generation memory technologies by verifying and optimizing digital and analog circuit designs. In this role, you will work closely with global multi-functional teams across the product lifecycle to deliver high-quality, manufacturable memory solutions that meet performance, reliability, cost, and customer requirements. Your work will directly contribute to bringing advanced memory products from concept to production. Responsibilities: Verify circuit functionality, reliability, power, and compliance with product specifications Drive verification planning, coverage closure, circuit debug, and design improvements Perform circuit modeling and simulation using industry-standard tools Support silicon validation, reticle experiments, and tape-out activities Partner with engineering, manufacturing, and product teams to deliver manufacturable designs Minimum Qualifications: Bachelor’s degree in Electrical Engineering or a related field 4+ years of semiconductor design, verifi

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron’s DRAM Design Engineering Group (DDEG) is where innovation meets excellence. We are advancing memory and storage technologies through collaborative engineering and creative problem-solving. Our team works at the forefront of semiconductor design, developing solutions that shape the future of memory products in a fast-paced, learning-focused environment. As a Design Verification Engineer, you will help develop next-generation memory technologies by verifying and optimizing digital and analog circuit designs. In this role, you will work closely with global multi-functional teams across the product lifecycle to deliver high-quality, manufacturable memory solutions that meet performance, reliability, cost, and customer requirements. Your work will directly contribute to bringing advanced memory products from concept to production. Responsibilities: Verify circuit functionality, reliability, power, and compliance with product specifications Drive verification planning, coverage closure, circuit debug, and design improvements Perform circuit modeling and simulation using industry-standard tools Support silicon validation, reticle experiments, and tape-out activities Partner with engineering, manufacturing, and product teams to deliver manufacturable designs Minimum Qualifications: Bachelor’s degree in Electrical Engineering or a related field 4+ years of semiconductor design, verifi

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Key Responsibilities · Lead pre-silicon readiness activities across new DRAM products, including risk assessment, DFMEA preparation, validation planning, and readiness reviews with cross-functional engineering teams. · Partner closely with Design, Verification, Component Validation, Product Engineering, Product Architecture, System Compatibility Group, and Silicon Strategy teams to identify product risks, define validation coverage, and align debug priorities. · Apply strong technical judgment to analyze circuit behavior, silicon data, validation results, failure signatures, and product-level interactions across design, test, and manufacturing flows. · Drive structured investigation and resolution of silicon findings, including root-cause analysis, experiment planning, evidence review, and alignment of mitigation or screen strategies to project milestones. · Influence product readiness decisions by connecting design intent, silicon behavior, validation results, manufacturing constraints, and customer quality expectations. · Mentor engineers, strengthen technical practices, and help capture lessons learned that improve execution, product robustness, and organizational readiness across future DRAM programs. ·Apply AI-enabled ways of working to improve engineering productivity, including use of approved AI tools for technical research, data synthesis, debug plan

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities: Lead design readiness activities for new DRAM products, including risk assessments, DFMEA development, validation planning, and readiness reviews Partner with cross-functional teams to identify product risks, define validation coverage, and prioritize debug activities Drive root-cause investigations of silicon findings through data analysis, experiment planning, evidence review, and corrective action development Influence product readiness decisions by connecting design intent, validation results, silicon behavior, manufacturing constraints, and customer quality expectations Mentor engineers and help improve technical practices, readiness processes, and organizational learning across DRAM programs Minimum Qualifications: Advanced degree in Electrical Engineering, Computer Engineering, Semiconductor Engineering, Applied Physics, Materials Science, or a related technical field, or equivalent industry experience Significant experience in semiconductor design, DRAM or memory technology, silicon validation, product engineering, device characterization, circuit debug, reliability, test development, or new product introduction Proven ability to analyze sophisticated technical problems using silicon data, validation results, circuit behavior, failure analysis

Who We Are Addepar is a global data and AI platform empowering investment professionals to turn complex financial information into actionable intelligence. Addepar unifies portfolio, market and client data in a total portfolio view and delivers AI-powered insights within investment and client workflows. More than 1,500 firms in 60 countries use Addepar to manage and advise on nearly $10 trillion in assets. Its open platform integrates with 650 software, data and consulting partners to power end-to-end investment operations across firms of all sizes and levels of complexity. Addepar supports clients worldwide with offices in New York City, Salt Lake City, São Paulo, London, Edinburgh, Geneva, Warsaw, Dubai, Pune and Singapore. The Role We are currently seeking a visionary and hands-on Senior Software Engineer with deep expertise in Java and distributed systems to lead technical initiatives within our Order Management System (OMS) team in Trading! We are building a high-performance Trading Order Lifecycle Management system designed to bridge the gap between investment intent and market execution. Our platform serves as the mission-critical link between our portfolio managers and executing brokers, ensuring every trade is executed, allocated, and reported with absolute precision, low latency, and high fault tolerance. We’re looking for a strategic technical leader who remains deeply hands-on and is passionate about solving highly complex, ambiguous engineering challenges. You will drive the architectural vision, establish high-quality engineering standards, and work closely with product and design leadership to deliver impactful business outcomes. You will champion Agile methodologies and the adoption of AI-assisted development tools across the organization to amplify engineering delivery. This role requires someone to work Eastern working hours. Applicants must be legally authorized to work in the United States for any employer without requiring current or future visa

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Facilities Construction Sr. CSA Engineer Job Description Job Description Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, encouraging the world to learn, communicate and advance faster than ever. General As a Facilities Civil, Structural and Architectural Engineer at Taiwan Micron Memory Co. Ltd., you will be responsible to provide high-quality engineering services and specifications for the planning, design, construction of CSA specific equipment and buildings components in support of Micron semiconductor manufacturing network. Responsibilities and Tasks Coordinate system design between global, Local Project Team, Operation Team, Vendors, etc. Ensure designs follow all applicable standards, codes, and regulations. Manage scope change process and documentation. Provide project procurement technical Support Ensure all project scope is implemented to Safety Standards and requirements. Review all Job plans for high risk during construction in CSA scope. Track and report progress weekly on project progress, risk, schedule, cost. Coordinate activities related to the construction, quality assurance/quality control, and testing and commissioning in CSA scope. <

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Summary At Micron Technology, we are looking for a Senior RTL Engineer to build and develop DRAM digital and mixed-signal blocks for advanced memory products. In this role, you will support the RTL lifecycle from specification and implementation to signoff. You will collaborate with multi-functional teams to develop high-quality builds that meet power, performance, and area (PPA) targets. This position is based in Boise, Idaho, within a collaborative and innovative engineering environment. Responsibilities Contribute to RTL build of digital and mixed-signal components for DRAM using RTL-to-GDS flows. Implement and document high-performance, power- and area-efficient RTL designs meeting product specifications. Perform front-end quality checks including lint, CDC/RDC, synthesis, UPF, and timing QoR. Collaborate closely with physical design and implementation teams to achieve timing closure and PPA goals. Apply power-, clock-, and implementation-aware RTL design practices to minimize silicon risk. Minimum Qualifications Master’s degree in Electrical Engineering with 4&#43; years of experience, or Bachelor’s degree with 5&#43; years of pre-silicon RTL design experience. Demonstrated experience developing RTL for complex digital IP from specification through implementation handoff. Hands-on experience with ASIC low-power design methodologies, including UPF-based power intent and CDC/RDC analysis. Strong knowledge of ASIC design flows, including RTL design, logi

The Team + The Role The Pendo for Agents team builds Pendo's AI and agent product area, a large greenfield surface where much of the architecture is being defined as the team builds. This team operates at the center of a fast-moving product space where engineering decisions shape both the customer experience and the technical foundation for future scale. As Senior Manager, Engineering, you will own technical direction for Pendo for Agents end to end and be fully accountable for delivery, engineering quality, and the talent pipeline. You will partner closely with Product, Design, Staff and Principal engineers, and adjacent Engineering leaders to make high-quality architecture decisions, guide execution, and grow a team that can move quickly without over-building. This role is based in our New York City office. What this looks like day-to-day Team leadership: Lead, coach, and manage a team of approximately four engineers today, with the role growing into ownership of two teams as the product area scales. You will support onboarding, professional development, and the growth of strong individual contributors and emerging technical leaders. Architecture ownership: Own the technical direction for the Pendo for Agents architecture end to end. You will partner with Staff and Principal engineers on build-versus-buy decisions, including when to use existing frameworks and when to build in-house. Delivery execution: Guide prioritization, planning, and execution across the team while maintaining a healthy delivery cadence. You will own delivery commitments across sprint and quarterly planning cycles and hold the team accountable to outcomes. Cross-functional partnership: Partner with Product and Design to deliver high-quality features using Agile development practices. You will align on scope, sequencing, and risk while surfacing engineering constraints early and maintaining trust under pressure. Player-coach technical leadership: Stay hands-on in architecture and technical pro

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Monitor and react to wafer quality indicators and quality events highlighted by Fab Process, Product Engineering, and Site QA teams. Proactively contain any deviated or non-conforming material from shipping out to both internal and external customers. Create technical product risk assessment reports on deviated or non-conforming material in your areas of ownership, decide on additional QA data collection requirements, and recommend final disposition of the product. Coordinate Global MRB (Material Review Board) meetings with PQRA, PE, Site QA, and Supply Chain, Finance teams to assess product quality and reliability risk and finalize disposition balancing supply chain and Q&R risks. Monitor Outgoing Quality Control (OQC) from BEOL processes and coordinate with BE Assembly and Test teams to disposition deviations assigned to FE Fabs. Assess risk, define Q&R data collection requirements, and approve planned deviations as part of Global Conversion/Change Management business process. Create SBL QRA hold criteria, maintain, and update criteria on regular cadence. Coordinate with Site QA team to identify root- cause for RMAs & deviations and drive corrective and preventive actions using systematic problem-solving methodologies such as 8D, 5 Whys, and/or Fishbone. Collaborate with Site QA team to formalize Customer Communication for all Automotive RMA’s, CSPL Inline and Electrical specification CpK performances. Lead projects to drive global compliance to manufacturing quality standards and support Automotive Zero Defects program. Design and develop automa

The Team + The Role Our Engineering Team is focused on building AI Products for our product experience (PX) platform. We build from the ground up to explore, prototype, and ship AI-native experiences that change how software teams understand and serve their users. This is not an AI layer added to existing product; it is a deliberate bet on what product intelligence looks like next. The team operates with high autonomy, moves quickly, and builds products without clear precedents. As a Sr. Software Engineer (AI), you will sit at the intersection of deep technical capability and strong product judgment. You will design and ship applied AI systems, including RAG pipelines, agentic workflows, and LLM-powered features, from prototype through production. You will make principled technical decisions, evaluate model behavior rigorously, and communicate tradeoffs clearly to engineers and non-engineers alike. This role is based in our New York office. What this looks like day-to-day Applied AI systems: Design and build AI systems including RAG pipelines, agentic workflows, and LLM-powered features. You will take work from prototype through production and ensure it can hold up in real customer environments. Technical decision-making: Make principled decisions on when to prompt, when to fine-tune, and when to use a different tool entirely. You will explain these tradeoffs clearly so the team can move quickly without sacrificing quality. Model evaluation: Instrument and evaluate model outputs rigorously by defining evaluation frameworks and catching hallucinations early. You will implement guardrails that can withstand real-world load and production use. Productionize AI ownership: Own model deployment, monitoring, latency optimization, cost management, and reliability at scale. You will help ensure AI systems are observable, efficient, and dependable in production. Full-stack product shipping: Contribute across the stack when needed because this team ships products, not just mod