Sr Staff Software Development Engineer Jobs

Join Adobe Security Engineering and help build the ML and generative AI capabilities that protect Adobe, our products, and our customers. Our team sits where cybersecurity, large-scale data, and AI meet, building models for anomaly detection, threat detection, investigation, and security analytics across some of Adobe's largest datasets. As a Staff Machine Learning Engineer, you'll design, build, and scale production ML systems spanning deep learning, behavioral modeling, embeddings, and agentic AI. You'll write code, train models, run experiments, and help shape the architecture the broader team builds on. You'll also partner closely with data, platform, and security engineers across Adobe. The Challenge Architect end-to-end ML systems for high-volume security data, turning experiments into reusable capabilities. Own the ML lifecycle, from feature engineering through training, deployment, monitoring, and retraining. Build LLM and agentic AI capabilities for security investigation, including retrieval-augmented generation. Design evaluation frameworks that measure model quality and help analysts trust and validate results. Work with data and platform engineers to scale pipelines and resolve system bottlenecks together. Mentor engineers and help guide technical direction through design reviews and hands-on collaboration. What you bring Experience running production ML systems from early experimentation through sustained operation at scale. A strong background training models with PyTorch and transformers, including behavioral modeling and anomaly detection. Comfort with distributed compute like Spark, cloud platforms like AWS, and MLOps tools like MLflow. Experience building with LLMs or generative AI, along with evaluating how they behave in production. Strong Python and SQL skills, and solid software engineering habit

The worldwide data management software market is massive (IDC forecasts it to be $138 billion by 2026). At MongoDB, we are transforming industries and empowering developers to build amazing apps that people use every day. We are the leading modern data platform and the first database provider to IPO in over 20 years. Join our team and be at the center of innovation and creativity. MongoDB is seeking a Sr. Staff Software Engineer to join the Atlas Core Data Services organization. The organization is responsible for building MongoDB Atlas, our database as a service offering and fastest growing product, along with the API Platform and Developer Tools. Atlas allows users to deploy fault-tolerant, secure, globally distributed MongoDB clusters in just minutes. The Atlas Core Data Services organization builds the software that manages the Atlas cluster infrastructure hosted on the three major cloud providers (AWS, Azure, and GCP), as well as the software that manages the MongoDB database hosted on that infrastructure. We are constantly challenged to design features that ensure Atlas clusters are secure, available, durable, and performant while running large-scale, critical workloads. The Sr. Staff Engineer in this role will drive innovation across the organization and the company, setting technical standards and direction that enable future growth and velocity. We are looking for engineers with the experience and high standards needed to lead at that scale. Our organization champions a strong culture of inclusivity, diversity, and collaboration. If you want to be a deeply technical leader on a collaborative team that applies systems expertise to build the foundational infrastructure of a popular database, join us. Let's build a faster, more reliable, and highly scalable database platform together. We are looking to speak to candidates who are based in Dublin for our hybrid working model. Responsibilities Define standards and vision for the mission-critical Atlas SaaS data

Zscaler (NASDAQ: ZS) accelerates digital transformation so customers can be more agile, efficient, resilient, and secure. The Zscaler Zero Trust Exchange platform protects thousands of customers from cyberattacks and data loss by securely connecting users, devices, and applications in any location. Distributed across 200+ public data centers globally and thousands of private sites at the edge, the SASE-based Zero Trust Exchange is the world’s largest in-line cloud security platform. We believe the future of work is Human + AI and are building an AI-native enterprise where human potential is amplified by machine intelligence to solve the world’s hardest security challenges. Driven by deep customer obsession, we are committed to the mission, outcome, and to each other. We bring these commitments to life through three core behaviors: ownership and collaboration, trust through outcomes and impact, and a challenge culture with ongoing feedback. Ready to make an impact at the company pioneering security transformation in the AI era? Join us at Zscaler. Role We are looking for a Staff Software Engineer to join our team. This is a Hybrid role, reporting to the Sr. Manager, Software Engineering in the Zscaler Digital Experience (Core Intelligence and Data) department. You will join the team responsible for building the world’s largest cloud security platform, helping us enhance services and increase our global footprint. You will play a pivotal role in enabling organizations worldwide to harness speed and agility through a cloud-first strategy, leveraging our multitenant architecture that serves over 15 million users. What you’ll do (Role Expectations) Own agentic troubleshooting framework, framing high-impact use cases, designing workflows and playbooks, and building processes for all products Evaluate and integrate state-of-the-art GenAI advances to deliver reliable and cost-efficient production features, utilizing LLMs, various machine learning models, data processing, fi

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are looking for a highly technical Senior Staff/Principal Engineer to lead the porting and enablement of critical AI workloads. You will be a primary driver in migrating compute workloads to RISC-V architectures, ensuring our hardware is optimized for real-world application performance. The ideal candidate has a strong background in DevOps, workload porting, or application enablement . While this is an individual contributor role at its core, you will have the opportunity to grow and lead a small, specialized team over time as our workload migration efforts scale. This role is remote, based in the United States or Australia. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are A Technical Catalyst: You thrive on the challenge of driving AI hardware porting to RISC-V and making complex software stacks run efficiently on new hardware. Systems Expert: You possess deep knowledge of system software, compilers, or low-level OS internals. You are an expert in ARM or x86 environments and are ready to apply those skills to the RISC-V frontier. A Project Driver: You have the technical authority to lead the implementation of a compute migration to RISC-V through

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. You will work at the hardware/software boundary to define how those hardware blocks are initialized, coordinated, and used by the runtime. You will determine how workloads are dispatched, scheduled, synchronized, and executed across the accelerator, while solving complex performance problems through implementation, bring-up, and debugging. This role is hybrid and based in Toronto, ON or Austin, TX. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are An expert C or C++ engineer with a track record of designing and delivering complex, performance-critical systems. Experienced working close to hardware in low-level, embedded, bare-metal, or accelerator environments and translating hardware specifications into reliable software behavior. Strong in runtime fundamentals, including command execution, scheduling, synchronization, memory movement, resource management, and parallelism. Skilled at debugging and optimizing systems end-to-end, especially at the hardware/software boundary. A technical leader who collaborates effectively across hardware, firmware, compiler, and systems teams and mentors other engineers. What We Need Define the runtime architect

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are looking for a Sr. Staff Design Verification Engineer to lead end-to-end verification efforts for our advanced CPU and AI compute platforms. This role is ideal for seasoned engineers with deep expertise in CPU verification who excel at driving complex test plans to closure, mentoring teams, and leveraging modern AI tools to accelerate innovation. This role is hybrid, based out of Boston, Toronto, Ottawa or Santa Clara. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are Proven track record leading end-to-end CPU verification across processor cores, caches, interconnects, interrupts, MMU/IOMMU, and cache coherency protocols, with multi-chip and emulation experience a plus. Expert in creating comprehensive test plans and building simulation testbenches using SV-UVM, C/DPI, and Cocotb. Skilled in managing high-volume regression execution, complex failure triage, and driving test plans and coverage metrics to closure. Experienced leader and mentor dedicated to guiding junior engineers and fostering verification best practices across teams. Proficient in leveraging modern AI tools like Copilot, Cursor, Claude, Gemini, and ChatGPT to optimize ver

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are looking for a Design Verification Engineer to contribute to the unit-level verification of our RISC-V CPU front end—including instruction fetch, branch prediction, and surrounding fetch control structures. As a key individual contributor within our front-end DV team, you will focus on building testbenches, generating stimulus, and developing checkers for complex microarchitectural scenarios. This role is hybrid, based out of Austin, TX or Santa Clara, CA. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are Front-End Experience: Solid background verifying CPU front-end blocks—such as instruction fetch, branch predictors (BTB, TAGE, RAS), instruction caches/TLBs, or decode—using SystemVerilog, UVM, and C++. Unit-Level Focus: Hands-on experience building clean, controllable unit testbench environments with precise stimulus and checking. Reusable Design: Pragmatic approach to building transactors, predictors, and scoreboards that can be reused across verification levels. Collaborative Problem Solver: Comfortable working alongside RTL designers to trace and fix misspeculation, redirect, and edge-case fetch bugs. What We Need Unit-Level Verifica

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is building the next generation of AI and RISC-V compute. As a Sr. Staff NPI Global Supply Planner, you will own end-to-end demand, materials, and production planning across our AI hardware product lines, including Blackhole, Galaxy, and future platforms. You will translate engineering release schedules, BOM structures, and production forecasts into executable supply and capacity plans with our contract manufacturers, while keeping planning data accurate and reliable across ERP and PLM systems. This role is hybrid, based out of Toronto, ON. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are A strategic, detail-oriented supply chain planner who can turn engineering and program ambiguity into clear, executable plans. Experienced in NPI planning within semiconductor, AI hardware, or high-tech manufacturing environments. Comfortable working across BOM structures, engineering change processes, ERP and PLM systems, and system-of-record data. A clear, collaborative communicator who can align engineering, operations, planning teams, and contract manufacturers. What We Need Lead end-to-end materials and production planning across NPI r

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are looking for a talented engineer to join our CPU design team and lead the front-end RTL physical implementation team. Drive CAD flows on multiple process technologies while working closely with core micro-architects to refine CPU core configurations and optimizing PPA. You’ll work on a CPU based on RISC-V ISA, collaborating with DV, PD, RTL and performance teams to deliver a functional, timing, and power-converged design. This role is hybrid, based out of Austin, TX or Santa Clara, CA. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are An expert in physical design practices used to optimize PPA Experienced in high-performance physical design. Proficient in RTL coding (Verilog/VHDL) and familiar with industry-standard tools for simulation and power analysis. Skilled in synthesis, place and route tools including flows and physical design methodology. Background in CPU micro-architecture. What We Need Own front‑end physical implementation and PPA definition for a high‑performance RISC‑V CPU and CPU subsystem Work closely with microarchitects and RTL designers to “make the IP better” by optimizing frequency, power, and area

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Curious about how cutting-edge hardware actually comes to life? We're looking for someone who’s excited to dive into the core of next-gen systems and help make them real. In this role, you’ll validate high-speed interfaces, solve complex system-level puzzles, and collaborate across teams to shape the future of AI/ML computing. If firmware, hardware, and hands-on debugging sound like your kind of fun — let’s chat! This role is hybrid and based in Vancouver, Canada. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are You love bringing hardware to life and enjoy the thrill of solving tricky problems across the hardware–firmware boundary. You’re hands-on in the lab and comfortable with tools like oscilloscopes, protocol analyzers, and JTAG — digging deep doesn’t scare you. You’re comfortable jumping into unfamiliar problems and figuring things out — whether it’s in the lab or in firmware. You’re curious, collaborative, and excited to work on technology that pushes the boundaries of performance. What We Need Someone to take the lead in validating our next-gen PCIe interfaces — from controller to PHY, and everything in between. A strong co

Position Summary SingleStore engineers build the real-time data platform that enables some of the world's most demanding applications. Our cloud-native database architecture enables high-performance transactional and analytical workloads at scale. As a Senior Software Engineer on the Managed Service (Helios) team, you will build and own release-defining projects at the intersection of distributed systems, cloud infrastructure, networking, and database technology. Helios runs thousands of SingleStore clusters across AWS, Azure, and GCP — autonomously deployed, scaled, secured, and healed on top of Kubernetes — operating at the frontier of multi-cloud, multi-region, multi-tenant, low-latency, always-on systems. You will work across the control plane, the data plane, the operator, networking, storage, and the customer portal, with true end-to-end ownership. Note: This role is open across multiple levels. Final leveling (Senior, Staff, or Principal) will be determined based on experience, scope of impact, and demonstrated technical leadership throughout the interview process. What you’ll do: Lead complex, cross-functional technical initiatives from conception to deployment. Work closely with product managers, designers, customers, and other engineers to ensure we deliver a high-quality experience. Drive the team's engineering standards, championing best practices in system design, code quality, testing, observability, and CI/CD pipelines to ensure we scale reliably. Solve complex, mission-critical system problems with solutions that are scalable, maintainable, and resilient. Mentor and guide more junior team members, coordinate with other stakeholders and contribute to process improvements, raising the technical bar across the team. Communicate complex technical decisions and trade-offs clearly, including their impact on system performance, reliability, and business outcomes. Partner cross-functionally with teams including Sales, Marketing, and G&A to support produc

Zscaler (NASDAQ: ZS) accelerates digital transformation so customers can be more agile, efficient, resilient, and secure. The Zscaler Zero Trust Exchange platform protects thousands of customers from cyberattacks and data loss by securely connecting users, devices, and applications in any location. Distributed across 200+ public data centers globally and thousands of private sites at the edge, the SASE-based Zero Trust Exchange is the world’s largest in-line cloud security platform. We believe the future of work is Human + AI and are building an AI-native enterprise where human potential is amplified by machine intelligence to solve the world’s hardest security challenges. Driven by deep customer obsession, we are committed to the mission, outcome, and to each other. We bring these commitments to life through three core behaviors: ownership and collaboration, trust through outcomes and impact, and a challenge culture with ongoing feedback. Ready to make an impact at the company pioneering security transformation in the AI era? Join us at Zscaler. Role We are looking for a Sr. Staff Backend Engineer to join our team. This is a Hybrid (Ramat Gan) role, reporting to the Manager, Software Engineering in the Exposure Management & Security Operations department. Avalor, now part of Zscaler, powers the data foundation behind Zscaler's Security Operations platform, ingesting, unifying, and contextualizing data from hundreds of security and business tools to power security modules that deliver actionable insights and measurable risk reduction to our customers. In this role, you'll own complex backend systems that sit at the heart of our data platform, designing and building services that ingest, process, and move massive amounts of data reliably and at scale for enterprise customers worldwide. What you’ll do (Role Expectations) Developing and maintaining high-quality, scalable backend services within a microservices architecture using Java/Spring Boot

Opportunity Overview: We are seeking a Senior Engineering Manager to lead our Review Engineering team — roughly 20+ engineers across three squads in the US and India — building the workflows and capabilities that let clinical operations staff deliver care at scale, efficiently and with high quality. Leading through dedicated technical leads on each squad, you'll own the reliability and technical direction of Review's systems while partnering closely with Product, Design, Security, Clinical Operations, and peer engineering teams on shared platforms. This is an opportunity to shape a growing, business-critical part of Cohere's platform and to grow the next generation of engineering leaders in health technology. This is a remote-first role that may require travel to Boston, MA for new hire onboarding and occasional in-person team meetings and company events. What you’ll do: Lead 20+ engineers across multiple agile squads (US and India) through dedicated technical leads Own production reliability for Review-owned systems — incident response, root-cause RCAs, and cross-functional tiger teams for major incidents Set technical vision and provide leadership across design and sprint processes, partnering with Staff Engineers Drive delivery transparency through sprint metrics, catching risk early and informing data-driven interventions Partner with Product, Design, Security, Clinical Ops, and peer engineering teams (including our Hyderabad group) on shared systems and initiatives Own hiring, leveling, and career growth for direct reports and their leads; help attract and retain top talent Build a culture that grows early-career engineers into future health-tech leaders, with a bias toward team autonomy Champion testing, quality, and security practices in a regulated (HIPAA/SOC2) environment What you’ll need: 5+ years managing software engineering teams in a fast-paced, agile environment, including 3+ years leading multiple teams through technical leads or managers Exper

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Understand the LPDRAM state machine and develop the hardware models for DRAM features and the related validation test bench. Develop memory controller models, including request scheduling and address mapping to enable new DRAM features. Develop the automation test scripts using Python to improve the overall simulation methodologies. Develop new DRAM technology changes per the spec and the state machine and the validation test bench. Develop system engineering, software engineering, system integration, or distributed system architectures. Identify system data, hardware, or software components required to meet user needs. Communicate with staff or clients to understand specific system requirements. Research, test, or verify proper functioning of software patches and fixes. Provide advice on project costs, design concepts, or design changes. Communicate project information through presentations, technical reports, or white papers. Design and conduct hardware or software tests. Establish functional or system standards to address operational requirements, quality requirements, and design constraints. Evaluate existing systems to determine effectiveness, and suggest changes to meet organizational requirements. Employer will accept a Master's degree in Electronics Engineering, Electrical Engineering, Computer Engineering, Computer Science, or related field. Position requires: 1. C/C++ or Python; 2. Debugging interfaces, including GDB and PDB; 3. LPDRAM technology; 4. Computer Architecture; 5. Memory controller

Zscaler (NASDAQ: ZS) accelerates digital transformation so customers can be more agile, efficient, resilient, and secure. The Zscaler Zero Trust Exchange platform protects thousands of customers from cyberattacks and data loss by securely connecting users, devices, and applications in any location. Distributed across 200+ public data centers globally and thousands of private sites at the edge, the SASE-based Zero Trust Exchange is the world’s largest in-line cloud security platform. We believe the future of work is Human + AI and are building an AI-native enterprise where human potential is amplified by machine intelligence to solve the world’s hardest security challenges. Driven by deep customer obsession, we are committed to the mission, outcome, and to each other. We bring these commitments to life through three core behaviors: ownership and collaboration, trust through outcomes and impact, and a challenge culture with ongoing feedback. Ready to make an impact at the company pioneering security transformation in the AI era? Join us at Zscaler. Role We are looking for a Senior Staff Rust Developer to join our Platform Convergence Team. This is a hybrid role based in San Jose, CA reporting to the Sr. Director, Software Engineering. Join us to build a new platform from the ground up that can scale hundreds of millions of users with high reliability and low latency. You will design and implement distributed system and core infrastructure components while collaborating closely with various stakeholders. What you’ll do (Role Expectations) Design and build a low-latency, high-throughput data forwarding plane using Rust, leveraging its async/await model for efficient I/O and service-oriented infrastructure Develop distributed, scalable systems with a focus on concurrency, fault tolerance, and messaging Implement and maintain gRPC-based APIs and services to integrate forwarding plane capabilities with control and orchestration layers Optimize system performance through pr