Staff Senior Pac Engineer Jobs

Altana is the network for trusted trade. Our AI-powered product network empowers governments and businesses to build a more resilient and secure global economy while keeping trade flowing. The Opportunity at Altana As a Global Public Sector Implementation Delivery Manager (IDM), you are the single-threaded technical owner of delivery for one of Altana’s most important public sector accounts or organizations. You blend enterprise architecture, hands-on deployment, and product design and development with the relationship skills to be the trusted technical voice in the room for the mission owners you serve. You lead a small, account-aligned implementation pod and are accountable for turning a closed-won account into mission outcomes: architecting the deployment, delivering it in secured and regulated environments, keeping it healthy, and finding the next place Altana can create value. You do this hip-to-hip with commercial — partnering with the Technical Account Managers (TAMs) and Program Managers who run the account — using delivery credibility to enable organic growth and inside sales without carrying the commercial number yourself. This role reports to a GPS Implementation sub-vertical lead (Trade, Resilience, or Policy) within the Implementation function, and is deployed against a named strategic account. For example, an IDM aligned to U.S. Customs and Border Protection (CBP) would report to the Trade sub-vertical lead. Your Responsibilities Own delivery outcomes for a named strategic account or account groups. Serve as the single-threaded technical owner for implementation and platform delivery to a key public sector account or organization, from post-award through sustainment. Deliver on-time against contractual commitments and hold the technical quality bar. Set and steward the account architecture. Translate mission outcomes into a coherent enterprise/solution architecture across SaaS and regulated PaaS environments. Own the deployment, integration, and data-m

OKX will be prioritising applicants who have a current right to work in Singapore, and do not require OKX's sponsorship of a visa About OKX At OKX, we believe that the future will be reshaped by crypto, and ultimately contribute to every individual's freedom. OKX is a leading crypto exchange, and the developer of OKX Wallet, giving millions access to crypto trading and decentralized crypto applications (dApps). OKX is also a trusted brand by hundreds of large institutions seeking access to crypto markets. We are safe and reliable, backed by our Proof of Reserves. Across our multiple offices globally, we are united by our core principles: We Before Me, Do the Right Thing, and Get Things Done. These shared values drive our culture, shape our processes, and foster a friendly, rewarding, and diverse environment for every OK-er. OKX is part of OKG, a group that brings the value of Blockchain to users around the world, through our leading products OKX, OKX Wallet, OKLink and more. About the Opportunity The Trading Systems team builds the mission-critical order, execution, position, and risk infrastructure that powers OKX’s global trading platform. We operate at the intersection of high performance, correctness, resilience, and scale—where every design decision matters. We are seeking a Senior C++ Software Engineer to lead the design and evolution of our trading counter and core trading systems. This role is for an engineer who combines deep systems expertise with strong ownership: someone who investigates root causes, raises the quality bar across the engineering lifecycle, and turns individual learning into reusable team capability. What You’ll Be Doing Lead the architecture, design, and development of complex, high-performance C++ trading systems. Design reliable distributed systems, including consistency, fault tolerance, disaster recovery, and resilience strategies across system boundaries. Own work end to end—from technical proposals and design reviews through framew

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Ready to join a growing team!!! Micron Technology’s vision is to transform how the world uses information to enrich life and our dedication to people, innovation, tenacity, teamwork, and customer focus allows us to fulfill our mission to be a global leader in memory and storage solutions. This means conducting business with integrity, accountability, and professionalism while supporting our global community. We are the only company manufacturing today's major memory and storage technologies: DRAM, NAND and Emerging memory. We are looking for an energetic, ambitious, individual with strong work ethic and integrity to join us as the Scribe Design Senior Engineer. The Scribe Design Non-Array (SDNA) team is responsible for the design, layout, and verification of CMOS electrical test structures that enable CMOS device development, Compact modeling, Reliability modeling and Fab process monitoring. In this role you will work with a group of Engineers in India, Japan, and the US. As part of a global team, you will contribute to physical layout, floor planning and verifying through DRC and in-house verification tools. This role will allow you to work on all technology types at Micron. Responsibilities and Tasks include, but are not limited to: Proactively identify problem areas for improvement, propose, and develop innovative solutions. Continuously evaluate and implement new tools and technologies to improve the current automation flows. Demons

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Own and drive custom analog and mixed-signal layout for critical LPDDR PHY blocks, including Datapath, bias networks, IO front ends, and reference circuits, ensuring robust operation across PVT, low noise coupling, and high matching accuracy 3-12 years of solid hands-on experience in custom analog and high-speed layout design, with proven expertise in implementing and delivering critical analog blocks and LPDDR/high-speed interfaces at advanced technology nodes Lead high-speed LPDDR (LPDDRx) interface layout execution , solving complex signal integrity challenges such as skew control, impedance matching, shielding, crosstalk mitigation, and jitter sensitivity in advanced nodes Architect and implement scalable array-based layout strategies for DQ/DQS byte lanes, CA lanes, and replica paths, ensuring strict symmetry, pitch matching, repeatability, and multi-channel scalability Drive integration of custom digital and mixed-signal blocks within the PHY (training logic, calibration engines, test/debug circuitry), ensuring optimal clocking, congestion management, and isolation from sensitive analog regions Lead layout-aware co-design with circuit teams , enabling early closure of timing, noise, IR, EM, and parasitic effects, and influencing design decisions from a layout perspective Establish robust power distribution, grounding, and isolation strategies , including guard rings, deep N-well usage, decoupling, and domain separation for

Zoox is developing fully autonomous vehicles and the supporting ecosystem required to bring the technology to market at scale. Sitting at the intersection of robotics, machine learning, and design, Zoox aims to provide the next generation of mobility-as-a-service in urban environments. We believe the transition to self-driving vehicles requires a combination of elegant vision and uncompromising execution. As a Staff Closures Engineer, you will own the closures architecture for the vehicle. You will be the subject matter expert for how doors, latches, hinges, actuators, seals, and glazing behave as a system, how that system interacts with the rest of the vehicle, and where the interdependencies between it and body, EE, firmware, manufacturing, and service will surface later in the program. This is a hands-on architecture role, not a detached one: alongside setting system direction, you will personally own a set of the most difficult parts in the system and take them from concept through sourcing, validation, and launch. Our closures are unlike conventional vehicles. They are fully automated, operate at a duty cycle closer to transit than to passenger cars, carry sensor and compute integration, and have no driver to compensate for them. The person in this role is comfortable being accountable for both the architecture and the specification. In this role, you will: Serve as the technical owner and subject matter expert for the complete closures system. Understand how every component interfaces within the system and with the rest of the vehicle, and anticipate interdependencies between closures and adjacent complex systems before they become integration failures. Set and defend the closures architecture across current and future vehicle programs - mechanism topology, load paths, sealing and water-management strategy, actuation and state-detection strategy, tolerance and dimensional strategy, and the hardware/firmware boundary - making the trade-offs explic

About Sentry Software runs the world and the pace is faster than ever. Sentry helps developers fix errors and performance issues before users notice, so teams can spend less time firefighting and more time building. Trusted by 200,000+ organizations, Sentry is today’s application monitoring standard and our team is building its AI-native future. About the Role A strong and reliable platform is essential to scaling Sentry for the future. Our Platform organization is responsible for everything that powers Sentry, from cloud infrastructure and streaming systems to storage, deployment, and security. We own the core services and technical foundations that enable every product and engineering team at Sentry to move fast and build with confidence. We’re looking for a Senior Staff Software Engineer to set technical direction across Sentry’s Platform organization and lead engineering work spanning infrastructure, streaming, and storage. Reporting directly to the VP of Platform Engineering , you’ll partner with engineering and product leaders to identify where our platform needs to evolve, make architectural decisions across team boundaries, and lead those changes through production delivery. You’ll stay hands-on through system design, prototyping, and code while helping senior and staff engineers lead work across teams. What You’ll Do Set technical direction for platform initiatives spanning multiple teams, connecting architectural decisions to product needs and business priorities. Identify and lead changes addressing system bottlenecks, reliability risks, and architectural constraints. Own cross-team initiatives from problem definition and design through implementation, rollout, and evaluation. Make tradeoffs across reliability, performance, cost, operational complexity, and delivery speed. Stay hands-on where your contribution matters most, writing code, building prototypes, and helping teams resolve difficult implementation problems. Partner with engineering and product

Employee Applicant Privacy Notice Who we are: Shape a brighter financial future with us. Together with our members, we’re changing the way people think about and interact with personal finance. We’re a next-generation financial services company and national bank using innovative, mobile-first technology to help our millions of members reach their goals. The industry is going through an unprecedented transformation, and we’re at the forefront. We’re proud to come to work every day knowing that what we do has a direct impact on people’s lives, with our core values guiding us every step of the way. Join us to invest in yourself, your career, and the financial world. About the role SoFi is seeking a Senior Staff, Fraud Strategy Analyst to assess, quantify, and mitigate fraud and operational risk associated with debit card authorization activity across SoFi's card ecosystem. This individual contributor will be responsible for conducting quantitative and qualitative risk assessments, evaluating the effectiveness of risk controls, identifying areas of potential loss or exposure, developing risk mitigation strategies, and partnering across Fraud Strategy, Fraud Operations, Product, Engineering, Data, Disputes, Compliance, Risk, and vendor teams. You will focus on debit card authorization risk across account takeover, wallet and tokenized transactions, 3DS, card-not-present, card-present, ATM activity, high-risk merchants, and override treatments. You will work closely with Fraud Strategy, Fraud Operations, Product, Engineering, Data, Disputes, Compliance, Risk, and vendor partners to move from insight to controlled execution. What you’ll do Own fraud strategy analysis and recommendations for debit card authorization controls. Analyze transaction, alert, dispute, chargeback, rule, device, profile-change, wallet, 3DS, merchant, and loss data. Develop and optimize fraud rules, thresholds, treatments, exclusions, and monitoring plans. Evaluate rule effectiveness, false po

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As an Senior / Staff RDA Process Engineer, you will play an important role in monitoring inline defectivity, identifying process anomalies, and driving defect reduction initiatives. You will learn to leverage advanced inspection and metrology tools, analyze large data sets, and collaborate with cross-functional teams to improve manufacturing outcomes. This role offers the opportunity to influence high-volume manufacturing processes, transfer new technologies into production, and contribute to yield and quality improvements across global operations. Responsibilities: Analyze process flows, defect data, and inline signals to identify anomalies, drive corrective actions, and improve defect performance Support experimentation, baseline health monitoring, and defect reduction initiatives Utilize inspection and metrology tools to detect process issues early and identify sources of variation Partner with global manufacturing, process integration, process development, and yield teams to develop and deploy best-known methods Drive continuous improvement through data analysis, root cause investigations, and process optimization Minimum Qualifications: Masters’s degree in Electrical Engineering, Chemical Engineering, Materials Science and Engineering, or a related technical field Strong analytical, problem-solving, and communication skills Ability to investigate process anomalies, perform root cause analysis, and

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. ROLE Lead first-silicon bring-up, characterization, debug, and validation of advanced 3D NAND products. Establish whether silicon meets design intent and datasheet requirements, correlate simulation with measurements, and resolve issues that could affect product qualification, reliability, yield, or SSD/system integration. This role provides a unique opportunity to develop end-to-end expertise across advanced NAND products, spanning circuit design concepts, mixed-signal simulations, first-silicon bring-up, silicon debug, product qualification, and manufacturing readiness. Engineers gain broad exposure to analog, mixed-signal, digital, firmware, memory-array, and system-level behavior while working closely with design, verification, firmware, product, and system teams. RESPONSIBILITIES • Own validation strategies, coverage, and test plans for assigned NAND circuits and functions; define expected behavior, operating corners, and pass/fail criteria from product specifications and design intent. • Lead first-silicon bring-up, characterization, debug, and simulation-to-silicon correlation across voltage, temperature, process, timing, and workload conditions. • Characterize and debug NAND subsystems including reference and bias generation circuits, bandgap references, oscillators, voltage regulators, charge pumps, sensing and page-buffer paths, high-voltage program/er

At Snowflake, we are powering the era of the agentic enterprise. To usher in this new era, we seek AI-native thinkers across every function who are energized by the opportunity to reinvent how they work. You don’t just use tools; you possess an innate curiosity, treating AI as a high-trust collaborator that is core to how you solve problems and accelerate your impact. We look for low-ego individuals who thrive in dynamic and fast-moving environments and move with an experimental mindset — who rapidly test emerging capabilities to discover simpler, more powerful ways to deliver results. At Snowflake, your role isn't just to execute a function, but to help redefine the future of how work gets done. We are looking for talented systems developers and researchers to join the Snowflake AI Research team and advance the state of the art in LLM inference systems and optimization . Our mission is to build the next generation of high-performance and intelligent inference systems. We optimize not only how fast and efficiently models run, but also how quickly inference systems can adapt to new models, architectures, hardware, and workloads. Our work spans the full inference stack—from distributed serving and runtime systems to GPU kernels and model-system co-design. We explore techniques such as adaptive parallelism, speculative and parallel decoding, disaggregated inference, scheduling and batching, KV-cache optimization, model swapping, quantization, and GPU kernel optimization to push the frontier of latency, throughput, scalability, and cost. Beyond optimizing individual models, we are building intelligent and adaptive inference systems that can automate performance optimization—rapidly profiling new models and workloads, identifying bottlenecks, selecting effective execution strategies, and adapting system configurations with minimal manual tuning. We embrace AI-native engineering , using AI not only as the workload we optimize, but also as a tool to accelerate system devel

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Summary Department Introduction The Operations Central Team drives manufacturing execution, capacity planning, and capital optimization across Micron’s global manufacturing network! The team partners closely with Supply Chain, Finance, Engineering, Procurement, Production, and Planning organizations to improve operational efficiency, enable cost savings, and support strategic business objectives through data-driven decision making. Position Overview As a Global Planning Modeling Engineer, you will serve as a key contact for the manufacturing network, evaluating and presenting the capital impacts of process and technology changes to Manufacturing and R&D leaders! This role is responsible for capacity modeling, capital planning, financial analysis, and process optimization. Responsibilities Optimize installed equipment capacity and lead site-level and tool-level studies to improve throughput and manufacturing efficiency. Manage, audit, and validate Probe capacity models and systems to determine network capital requirements. Perform financial analyses for capital equipment investments, including metrics optimization, process flexibility, capacit

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Senior/Staff/Principal Engineer and Member of the Technical Staff in the Procurement and Operations Central Teams (PROCT) and Advanced Development Team (ADT), you will primarily focus in the early maturity phase of new products as they transition from technology development centers to our high-volume manufacturing sites. Your contributions to our team will support innovation and enable improvements in product yield, quality and cost reduction that are vital to enable our manufacturing strategy. We are looking for outstanding candidates experienced with semiconductor process development/optimization, hardware and supplier management, and an understanding of NAND & DRAM integration to contribute and grow with our organization. Good organization skills and the ability to work independently or in teams is a must and because this role is essential to the success of Micron's products it will require international travel to Micron manufacturing and technology development sites. Responsibilities Collaborate with Technology Development (TD) on future technology requirements and model of record requirements to ensure manufacturing roadmap is aligned with the forward technology path Partner with TD and Manufacturing on supplier engagement to ensure resources meet Micron's strategic objectives. Collaborate with Manufacturing as new products are introduced to improve performance and enable customer qualification. Connect with corporate EHSS and site Process Hazard Analysis engine

At Render, we’re building the modern cloud platform for developers creating AI-native, full-stack, multi-service applications. Our mission is to eliminate the tradeoff between the power of hyperscalers and the simplicity of developer-friendly platforms—so teams can ship fast, scale reliably, and focus on their product, not infrastructure. Unlike complex hyperscalers or ephemeral edge/serverless solutions, Render offers a developer-first experience with persistent compute, dynamic autoscaling, built-in orchestration, and observability, allowing teams to launch, scale, and manage real-world applications without writing infrastructure code or managing servers. Whether you're building LLM-powered applications, scalable SaaS products, or async processing pipelines, Render empowers teams to move fast and scale confidently from MVP to millions of users. Our platform is trusted by over 7 million developers worldwide and continues to grow rapidly. In February 2026, we raised an additional $100M in Series C financing, bringing our total funding to $260M, to accelerate our vision of making cloud infrastructure both powerful and intuitive—designed for the speed of modern AI development. We’re a diverse and talented team that values craft, velocity, and user experience. If you’re excited to help shape the future of the intelligent cloud and empower developers everywhere, we’d love to hear from you. Applying to Render We're seeking candidates who possess high integrity, humility, and an insatiable drive to learn. Through reasoned discussions and continuous feedback, we strive to improve both individually and collectively. We foster an environment of mutual trust and respect, empowering effective debate to achieve the best outcomes for our customers and team. We especially encourage members of underrepresented groups in the tech community to apply and understand that not all successful candidates will meet each requirement listed. Our interview process is unique to each role, and

Adobe Risk Platform (ARP) is Adobe's centralized, adaptive system for detecting, preventing, and mitigating fraud and abuse across products and services, delivering robust security without degrading customer experience. It protects surfaces like Commerce, Stock, and Firefly with real-time risk decisions. As a Sr Staff Engineer on ARP, you'll set the architectural direction for risk mitigation across Adobe. You'll define the standards, patterns, and long-term technical strategy that let ARP and Adobe stay ahead of fraud and abuse as it evolves. What you'll do Architect systems built for the next three to five years of risk mitigation, while delivering impact iteratively and solving today's most important priorities along the way. Push the platform to the forefront of AI and ML to strengthen fraud and abuse detection. Lay the foundational building blocks of the Risk Platform that future risk-mitigation capability builds on, including the platform's shift toward event-driven, continuously-reasoning risk intelligence. Set architectural standards for risk-decisioning services that other teams across Adobe adopt. Share architectural thinking broadly, through design docs that become org-wide standards, white papers, tech talks, or cross-org design reviews. Simplify complex, interlinked systems into designs other teams can build on with confidence. Mentor senior and staff engineers across teams, growing the next generation of technical leaders. What you need to succeed Bachelor's or advanced degree in Computer Science or related field, or equivalent experience; Master's preferred. 12+ years architecting high-scale, highly performant platforms, and leading the technical teams that build them. Deep understanding of AI and ML, both to strengthen fraud detection and to counter AI-powered attacks. D

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. The Heterogeneous Integration Group (HIG) sits within the Technology and Products Group (TPG). We are developing High Bandwidth Memory (HBM) solutions for AI and ML applications! We stack multiple DRAM chips on a high-speed memory controller using TSV (Through Silicon Via) technology, dramatically increasing memory density and bandwidth. Our designs span custom digital and RTL2GDS flows, and we are targeting the lowest power per bit in the industry. Micron’s High Bandwidth Memory (HBM) Design Verification team is responsible for ensuring the functionality, performance, and quality of next‑generation memory products that enable advanced computing applications. As a Senior Design Verification Engineer, you will collaborate closely with design, architecture, and product engineering teams to verify complex, high‑density DRAM circuits and deliver robust, production‑ready designs. This role combines deep technical verification expertise with cross‑functional collaboration in a global environment. You will be challenged by the complexity and difficulty of verifying high density memory chips (up to 32Gb) with huge scale of circuit capability (over 4M transistors), ultra-high speed designs, sophisticated functionality which includes next Generation DDR/LPDDR (ex: DDR5, LPDDR5) and advanced low power and power management technologies. You will be responsible to evaluate the functionality and performance of the Full-chip and block-level circuit designs using different verification tools, techniques, and strategies. In addition, you will also n