Test And Evaluation Lab Tech Jobs

Aerodynamics Engineer (Aero-Stability & Control Analyst) Company: The Boeing Company Boeing Defense, Space & Security (BDS) is hiring an Experienced or Senior Aerodynamics Engineer to perform propulsion system qualification support and analysis in the St. Louis, MO region ! Position Responsibilities: Performs aerodynamic/aerothermodynamics design and analysis of flight vehicles to ensure that the vehicle meets requirements Key contributor to developing new and improving existing technologies, tools and processes to enhance technology readiness, improve vehicle performance and reduce cycle time and cost Conducts, coordinates and/or develops test requirements to meet test objectives using established processes Assesses the impact of proposed regulations to determine the effect on cost, performance, producibility, maintainability and safety Supports certification and qualification processes of the aerodynamic/ aero thermal characteristics of flight vehicles Assists in training others Works under general supervision Basic Qualifications (Required Skills and Experience): Bachelor of Science degree in Engineering, Engineering Technology (including Manufacturing Technology), Computer Science, Data Science, Mathematics, Physics, Chemistry or non-US equivalent qualifications directly related to the work statement 5+ years work-related experience with a Bachelors degree OR an equivalent combination of work-related experience and technical education. Preferred Qualifications (Desired Skills and Experience): (Level 4) 9+ years work-related experience w

Associate Software Engineer Company: The Boeing Company The Boeing Company has an exciting opportunity for an Associate Software Engineer to support the ADaPS organization in Huntsville, AL. ADaPS (an organization of over 100 software engineers) supports programs across the entire portfolio of Boeing products including Space Launch Systems (SLS), Satellite Efforts, and Advanced Missile Defense efforts including Patriot Advanced Capability (PAC3) and Integrated Fires Protection Capability 2nd Interceptor (IFPC – 2). ADaPS specializes in implementing rapid prototyping and development programs using small, adaptable agile teams. Position Responsibilities: Assists with the development and fielding of flight software for seeker systems Assists with the design and development of test software for seeker software Assists with the development and integration of Weapons Open System Architecture Framework Domains into missile and weapons systems Assists with the development firmware and its integration with hardware/software Works in small agile teams composed of diverse engineering skills Use your talents to tackle complex problems on a variety of programs Develops technical products, plans, documentation, and briefings in support of program requirements Assists with review, analysis and translation of customer requirements into initial design of software products Supports development, documentation and maintenance of architectures, requirements, algorithms, interfaces and designs for software products Security Clearance: This position requires the ability to obtain a U.S. Security Clearance for which the U.S. Government requires

Become a part of our caring community As a Project Management Lead, in a Shared Services capacity supporting the Insurance organization, you will manage all aspects of cross-functional, varying degrees of complexity programs and/or projects to deliver sustainable business outcomes on time and within budget. Your business outcomes focus fosters flexibility in how to achieve the desired results in the most efficient way possible. You will utilize structured and organized ways of working to consistently deliver high quality results yet embrace business agility to adapt plans when necessary. Working in a team-based environment, you will use influencing skills to hold others accountable for their parts while also offering suggestions for continual improvement. Your expertise will enable you to participate and contribute to the Project Management and Change Management Centers of Excellence. Location: remote The Project Management Lead will work closely with business owners/project sponsors to understand the scope of a project, create a charter with defined milestones to develop an implementation approach and project plan. The candidate will secure resources by identifying impacted stakeholders, facilitate meetings, and coordinate the activities to achieve business objectives within established timeframes. As a business partner in the implementation of new initiatives, the Project Management Lead is responsible for managing all phases of the project life cycle and includes feasibility (business case), design (planning), build (oversee delivery of planned work), test (quality), deploy (transitional activities), and close (archive documented knowledge). Apply internal processes and enforce project standards (such as but not limited to Charter, RACI Matrix, Status Reports, Project Plan, Risk/Issues Tracking, etc.) </

Abbott is a global healthcare leader that helps people live more fully at all stages of life. Our portfolio of life-changing technologies spans the spectrum of healthcare, with leading businesses and products in diagnostics, medical devices, nutritionals and branded generic medicines. Our 122,000 colleagues serve people in more than 160 countries. JOB DESCRIPTION: Position Overview The Product Development and Automation Senior Scientist provides services of a technical nature to support the development, implementation, and maintenance of automation, IT, and software systems used in the clinical laboratory. The Product Development and Automation Senior Scientist will perform moderate and highly complex analytical processes to support feasibility and validation studies. This includes wet lab testing for feasibility, verification and validation of lab automation, workflow, and software. This role will also be responsible for performing user acceptance testing (UAT), and validation of Laboratory information system (LIS) system changes and upgrades. This role will collaborate with end users and LIS developers to address needed improvements to current modules, design requirements for new test systems, validation, and implementation of the changes. Once resources are identified, can get a project off the ground and running with minimal support from management. Can make new processes, systems, validation methods or projects successful. Essential Duties Include, but are not limited to, the following: Assist in UAT testing Edit and review controlled documents within the laboratory document control system to support changes or implementation of software and process changes. Contributes ideas and insights to new technologies, testing methodologies, applications, techniques or procedures that are creative and practical. Provides input

This is where your work makes a difference. At Baxter, we believe every person—regardless of who they are or where they are from—deserves a chance to live a healthy life. It was our founding belief in 1931 and continues to be our guiding principle. We are redefining healthcare delivery to make a greater impact today, tomorrow, and beyond. Our Baxter colleagues are united by our Mission to Save and Sustain Lives. Together, our community is driven by a culture of courage, trust, and collaboration. Every individual is empowered to take ownership and make a meaningful impact. We strive for efficient and effective operations, and we hold each other accountable for delivering exceptional results. Here, you will find more than just a job—you will find purpose and pride. BUSINESS TITLE Inspector, Final QA DEPARTMENT Quality JOB TITLE Inspector, Final QA REPORTS TO Manager, Operations Quality JOB CODE 10-Step-USA01-Inspector-300483 VERIFIED BY Human Resources GRADE/FLSA HNE REVISION DATE 2/23/2021 I. SUMMARY: This document outlines the employment prerequisites and job responsibilities for the Inspector, Final QA position II. ESSENTIAL FUNCTIONS: • Perform the inspection of DHR documentation for devices and modules either on paper in order to ensure test procedures have been completed and release specifications are within specifications for final device acceptance and release. • Perform internal inspection of devices to ensure all visual aspects of the device or module, including approved labels, are met prior to release of device or module. • Verify that all customer facing device and packing labels are accurate and match the serial number being inspected. • Approves the release of the device and module in the a

About Graphcore Graphcore is a global leader in artificial intelligence computing systems. We design advanced semiconductors, software, and data center systems that provide the specialized processing power needed to advance AI while improving the efficiency required for broad adoption. As part of SoftBank Group, Graphcore belongs to a family of companies developing transformative technologies. Our U.S. engineering teams contribute to the hardware and software platforms that support the next generation of AI systems. The Opportunity We are looking for a recent graduate or early-career engineer to join the BMC Engineering team as a Graduate Firmware Engineer. You will develop low-level and embedded firmware that supports the operation, control, monitoring, and validation of advanced compute systems. You will work with experienced firmware, hardware, systems, and software engineers throughout the development lifecycle. The role combines hands-on implementation with automated testing, lab-based debugging, hardware bring-up, and analysis of interactions between firmware and the underlying platform. Start: September, 2027 Location: Austin, Texas, USA What You Will Do Design, implement, test, and maintain system and embedded firmware in C, C++, or Python. Take ownership of defined firmware features and deliver them from requirements and design through implementation, validation, and documentation. Develop and debug firmware in a Linux-based engineering environment using appropriate diagnostic tools and techniques. Create automated tests and scripts that improve firmware validation, test coverage, and engineering efficiency. Contribute to continuous integration and delivery workflows for firmware development and testing. Plan and conduct engineering experiments, analyze test data, and communicate findings clearly. Support lab setup, system configuration, hardware bring-up, and firmware validation on development platforms. Investigate firmware behavior and hardware-software

Job Details: Job Description: Intel Corporation is the world's largest semiconductor company and a global leader in computing innovation. Our Quantum Computing Group represents Intel's bold venture into the next frontier of computing technology, leveraging our decades of semiconductor manufacturing expertise to develop silicon-based quantum processors. We're pioneering spin qubit technology in silicon quantum dots, combining cutting-edge quantum physics with Intel's unmatched manufacturing capabilities to create the world's first commercially viable quantum computers. Our collaborative approach spans Intel's research divisions and partnerships with leading academic institutions worldwide. We are seeking an exceptional Quantum Packaging Modeling Engineer to join our pioneering quantum computing team in Oregon. In this role you will be responsible for thermal modeling and simulation of various packaging solutions from silicon redistribution layers to IC substrates within a multidisciplinary team. You'll play a crucial role in advancing Intel's silicon quantum dot technology while contributing to the development of scalable quantum systems that will revolutionize computing. Key Responsibilities - Thermal modeling and simulation of packaging hardware to understand how heat flows from silicon test chips through various heat spreader hardware - Manage the overall integration of the packaging hardware and enable co-design between relevant stakeholders - Work closely with mechanical designers to define heat spreaders for optimal performance - Deliver and disseminate design milestones to stakeholders - Communicate designs in presentations and relevant documentation - Stay current with the latest developments in packaging technology and design techniques by attending conferences and rea

Job Details: Job Description: Join Intel's Silicon and Platform Engineering Group (SPE) as an Exempt Tech Contract Employee, The Role and Impact :As a Power Integrity Engineer, you will play a pivotal role in ensuring Intel's platforms and products meet the highest standards of performance and reliability. This position offers you the opportunity to work on cutting-edge technologies, designing and optimizing power delivery networks for complex high-speed platforms, boards, packages, and silicon. Your contributions will directly impact Intel's ability to deliver industry-leading solutions to its customers, driving innovation in power integrity and enhancing the performance and functionality of our silicon and systems. Join us to tackle exciting challenges and create impactful solutions that push technological boundaries. The primary responsibilities for this role will include, but are not limited to: Develop and analyze power delivery networks, including 2D and 3D model extraction and noise analysis across die/C4 bumps, silicon, package, sockets, and boards. Define power grid specifications and power and area targets to achieve optimal balance between power integrity and performance. Design test structures, electrical analysis methodologies, and verification plans to address power integrity challenges. Perform measurements to characterize power noise profiles across frequency, ground bounce, and other critical metrics, verifying power delivery networks post-design. Correlate measurements back to presilicon analysis and estimations for improved accuracy. Apply expertise in power integrity design and tradeoffs to guide simulations of power networks and physical implementations for packages and platforms. Ensure on-die power noise meets system-on-chip (SoC) functionality an

About the Team The Technology Vertical team builds within Core Products. The team’s mission is to transform every major function in a technology company with AI to drive higher economic output, while people remain owners of the outcomes: setting intent, applying judgment and craft, directing iteration, and owning the result. About the Role As a Product Manager on the Technology Vertical team, you will shape how knowledge workers use AI in their daily work. You’ll craft enterprise products at the intersection of novel research capabilities and genuine enterprise needs, driving the full feedback loop from research, to product, to OpenAI’s own enterprise functions, to the broader Technology Vertical. This role is based in San Francisco, CA. We use a hybrid work model of three days in the office per week and offer relocation assistance to new employees. In this role, you will: Own the product roadmap for a line of business within tech verticals, using OpenAI’s organization to test, refine, and scale new workflows. Develop the ecosystem strategy across technology partners in your line of business You might thrive in this role if you: Have built enterprise products for non-developer knowledge workers and understand the needs of both individual contributors and organizational buyers. Can turn complex workflows, integrations, and permission requirements into clear product decisions. Are comfortable developing a strategy while working closely with engineers, customers, and cross-functional partners to ship and learn. Bring strong judgment about which vertical-specific needs should become reusable capabilities across a broader product. About OpenAI OpenAI is an AI research and deployment company dedicated to ensuring that general-purpose artificial intelligence benefits all of humanity. We push the boundaries of the capabilities of AI systems and seek to safely deploy them to the world through our products. AI is an extremely powerful tool that must be created with safety and

At Snowflake, we are powering the era of the agentic enterprise. To usher in this new era, we seek AI-native thinkers across every function who are energized by the opportunity to reinvent how they work. You don’t just use tools; you possess an innate curiosity, treating AI as a high-trust collaborator that is core to how you solve problems and accelerate your impact. We look for low-ego individuals who thrive in dynamic and fast-moving environments and move with an experimental mindset — who rapidly test emerging capabilities to discover simpler, more powerful ways to deliver results. At Snowflake, your role isn't just to execute a function, but to help redefine the future of how work gets done. The Commercial Account Executive is responsible for building Commercial-level client relationships within the Victoria market. Individuals who excel at this job have the ability to prospect, develop, and close business in a timely manner while focusing on the clients' requirements. The Commercial AE must have the confidence and ability to negotiate and close agreements with clients and support new customers through our onboarding process. This role is a unique opportunity to contribute in a meaningful way to high visibility, high impact projects at a very exciting time for the company. Snowflake is an innovative, high-growth, customer-focused company in a large and growing market. If you are an energetic, self-managed professional with experience managing a complex sales process and possess excellent presentation and listening skills, organisation and contact management capabilities, we'd love to hear from you. AS A COMMERCIAL ACCOUNT EXECUTIVE, YOU WILL: Achieve sales quotas for allocated accounts on a quarterly and annual basis by developing a sales strategy across the Melbourne territory with a target prospect list and a regional sales plan Develop marketing plans with the marketing team to drive revenue growth across the AI Data Cloud Be the trusted advisor to the custo

Experienced Engineering Technical Specialist Company: The Boeing Company Boeing Defense, Space & Security (BDS) is seeking Experienced Engineering Technical Specialists (Level 3) to join the team in Berkeley, MO. This position supports Risk Managed Framework compliance across multiple avionics test labs as well as the administration of embedded PCs and host PCs on avionics test benches. The Lab Infrastructure team is responsible for the design, modification, and troubleshooting of all test benches used in the avionics' lab to support systems integration testing on the F-15. Position Responsibilities Build and configure embedded PCs and host PCs on test benches Support RHEL 9 Installation, configuration, patching and maintenance of Linux server environments Support containerization Provide active directory management and file server management Troubleshoot user problems related to hardware, software, or processes Conduct monthly OS patching and anti-virus updates Create user accounts and reset passwords Run backups on workstations and servers Maintain compliance with Risk Managed Framework and NISPOM rules Keep facility signage up to date Maintain lab access list Travel may be required up to 10% of the time; domestically and/or internationally depending on business needs. This position requires an active U.S. Secret Security Clearance (U.S. Citizenship Required). (A U.S. Security Clearance that has been active in the past 24 months is considered active) Basic Qualifications (Required Skills/Experience) <ul

NVIDIA Architecture Modeling group is looking for Architects, Functional Modeling Engineers, and Simulation experts to join various architecture efforts across GPU/ SOC Architecture teams. A key part of NVIDIA's strength is to innovate in parallel computing fields, delivering the highest performance in the world for high-performance computing. We are constantly looking for ways to improve our SoC and Systems architecture and maintain our leadership. In this position, you will be working with other world-class architects on modeling, analysis and validation of chip & system architectures and features that advance the state of art in performance and efficiency. What you'll be doing: Modeling and analysis of SoC & Systems algorithms and features, across datacenter, automotive, and client products Build and deliver platforms for SOC's that enable left shift for the SW teams aligned with project milestones Work closely with the SOC architects and guide modeling teams to deliver high-quality functional models that involve SOC&#43;GPU use cases Collaborate with our EDA partners to align on customer-facing technologies Develop tests, test plans, and testing infrastructure for new architectures/features and code coverage analysis and reporting Ensure alignment between the various modeling teams at NVIDIA, GPU modeling teams, and modeling teams overseas What we need to see: Master’s or PhD in Computer Science, Electrical Engineering, Computer Engineering, or a related relevant field (or equivalent experience) with 5&#43; years of relevant work experience. Strong programming ability: C&#43;&#43;, C along with a good understanding of build systems (CMAKE, make) , toolchains (GCC, MSVC) and libraries (STL, BOOST) Computer Architecture background with experience in modelling wit

The Silicon Co-Design Group (SCG) sits at the crossroads of architecture, design, marketing, operations, and productization. Our work spans early architecture through final product delivery across Datacenter, Gaming, Robotics, Automotive, and Embedded markets. We work closely across functions to deliver chips that change what is possible. System Integration sits at the intersection of all of them. It is the layer where every architecture, design, software, and manufacturing decision meets reality. When something breaks late in a program, it usually breaks here first. We are hiring a Senior Manager to lead this team in the US and partner closely with teams globally. Your work will sit on the critical path of every NVIDIA silicon program, and the bar you set for system integration is the bar we ship to! The two hardest, highest-leverage problems in this seat: Find critical silicon issues earlier — often before software is production-ready. Left-shifting post-silicon coverage is the highest-value thing System Integration can do. Standing up wide-area testing as a repeatable capability is a core part of the role. Keep programs on milestone when upstream dependencies slip. Validation plans collide with reality every program! The team needs new strategies, not just contingency plans, to keep moving when software, firmware, or methodology slip. You will design and run those strategies. What you’ll be doing: Plan and execute post-silicon feature integration, PVT validation, and wide-area testing across NVIDIA’s GPU, SoC, and CPU programs. Build wide-area and in-system test as a repeatable capability that shifts post-silicon coverage left, so issues surface before we are production-ready. Lead resolution of the most complex system-level issues, RMAs, and HW/SW interaction problems with creative workarounds and focused lab experimentation. Deve

At NVIDIA, we push the boundaries of computing innovation. Our ASIC Verification Engineers focus on developing the world’s top SoCs and GPUs. Joining us as a Senior ASIC Verification Engineer - GPU means working on modern technology powering consumer graphics and AI applications. This position is ideal for those passionate about technology and eager to impact computing’s future. What you'll be doing: As a key member of our ASIC Verification team, you will verify the design and implementation of the industry's leading GPUs. You will be responsible for verifying the ASIC build, architecture, golden models, and micro-architecture using advanced verification methodologies such as UVM or equivalent. Understand the design and implementation of your unit/cluster/chip, define the verification scope, develop the verification infrastructure, and verify the correctness of the design. Collaborate with architects, designers, and pre- and post-silicon verification teams to accomplish your task. What we need to see: Bachelor's Degree in EE, CS, or CE or equivalent experience. 5&#43; years of relevant experience. Experience in verification using random stimulus along with functional coverage and assertion-based verification methodologies. Experience with design and verification tools (VCS or equivalent simulation tools, debug tools like Verdi, Indago, GDB). Expertise in System Verilog or similar HVL. Strong debugging and analytical skills. Perl and C/C&#43;&#43; programming language experience desirable. Strong communication skills and the ability & desire to work as a great teammate are huge pluses. Experience in crafting test bench environments for unit and system level verification. #LI-Hybrid Your base salary will be det

NVIDIA's accelerated computing platforms move data at speeds that push the limits of what silicon and physics allow. Whether a high-speed interface trains reliably, maintains accurate margins, and survives every platform topology it will ever see is a question we answer ourselves. This role does that work. The Silicon Co-Design Group leads the boundary between what was designed and what was built. When a GPU, CPU, or SoC ships with interfaces that work at scale, this team is the reason. Most engineers debug within a layer. You will own the full stack. When an interface fails to train, the link margin is unexpectedly tight, or a customer reports a critical silicon issue, you trace the problem through protocol behavior, signal integrity, firmware, platform topology, and silicon marginalities. You then confirm that the fix works. Your methodology shapes how NVIDIA validates high-speed interfaces across generations. Your decisions affect yield, production ramp, and field quality. This is not a coordination role. The engineers who do it well hold protocol depth and system breadth simultaneously, never lose the thread across hardware, firmware, and software, and have the judgment to know when to go deeper and when to act. They are rare. Should that describe you, read on. What you'll be doing: Own post-silicon bring-up, characterization, validation, and debug of PCIe, NVLink, C2C, and other HSIO interfaces across NVIDIA GPUs, CPUs, and SoCs from first power-on through production readiness. Close the hardest failures. Drive root cause across protocol behavior, signal integrity, firmware and driver interactions, platform topology, and silicon marginalities and own every fix through to confirmation. Define validation strategy. Set test coverage, debug priorities, margining methodology, and stress criteria f