Transportation Outbound Strategy Manager Jobs

GitLab is the intelligent orchestration platform for DevSecOps. GitLab enables organizations to increase developer productivity, improve operational efficiency, reduce security and compliance risk, and accelerate digital transformation. More than 50 million registered users and more than 50% of the Fortune 100* trust GitLab to ship better, more secure software faster. The same principles built into our products are reflected in how our team works: we embrace AI as a core productivity multiplier, with all team members expected to incorporate AI into their daily workflows to drive efficiency, innovation, and impact. GitLab is where careers accelerate, innovation flourishes, and every voice is valued. Our high-performance culture is driven by our values and continuous knowledge exchange, enabling our team members to reach their full potential while collaborating with industry leaders to solve complex problems. Co-create the future with us as we build technology that transforms how the world develops software. * Fortune 500® is a registered trademark of Fortune Media IP Limited, used under license. Claim based on GitLab data. Fortune 100 refers to the top 20% ranked companies in the 2025 Fortune 500 list, published in June 2025. Fortune and Fortune Media IP Limited are not affiliated with, and do not endorse products or services of GitLab. An overview of this role Support Engineering at GitLab isn’t just a title - you will be embedded within the Engineering department and will truly operate in an environment where Support and Engineering meet. You’ll interact with customers daily as they encounter the difficult edge cases of running GitLab in complex environments. In the space of a day, you might be doing behind the scenes work of a Linux administrator troubleshooting performance problems by using strace on a particular process, interacting with the Product team to ensure that steps in a bug report are reproducible, or interacting with the Engineering team itself b

GitLab is the intelligent orchestration platform for DevSecOps. GitLab enables organizations to increase developer productivity, improve operational efficiency, reduce security and compliance risk, and accelerate digital transformation. More than 50 million registered users and more than 50% of the Fortune 100* trust GitLab to ship better, more secure software faster. The same principles built into our products are reflected in how our team works: we embrace AI as a core productivity multiplier, with all team members expected to incorporate AI into their daily workflows to drive efficiency, innovation, and impact. GitLab is where careers accelerate, innovation flourishes, and every voice is valued. Our high-performance culture is driven by our values and continuous knowledge exchange, enabling our team members to reach their full potential while collaborating with industry leaders to solve complex problems. Co-create the future with us as we build technology that transforms how the world develops software. * Fortune 500® is a registered trademark of Fortune Media IP Limited, used under license. Claim based on GitLab data. Fortune 100 refers to the top 20% ranked companies in the 2025 Fortune 500 list, published in June 2025. Fortune and Fortune Media IP Limited are not affiliated with, and do not endorse products or services of GitLab. An overview of this role As a Customer Success Architect, you'll serve as a trusted strategic advisor and technical authority to some of GitLab's most complex and high-value Enterprise and Government customers across Singapore. In this role, you will be driving and shaping how our largest customers adopt GitLab's intelligent DevSecOps platform to achieve their business goals and realise meaningful, long-term outcomes. You will be working closely with customers after the sale to turn pre-sales command plans into clear success plans, guide them through their customer journey, and drive adoption, utilization, and technical maturity.

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a SoC Physical Design Engineer in the Heterogeneous Integration Group (HIG), you will drive the implementation of advanced HBM SoC logic/base die designs from netlist to GDSII. You will work closely with RTL design, verification, DFT, IP providers, packaging/assembly, and manufacturing teams to deliver best‑in‑class PPA (performance, power, area) and robust signoff collateral for tape-out. This is a hands‑on role with opportunities to own blocks or top‑level integration across multiple product generations. You will also work on efforts to enable and integrate AI-driven tools and AI-enabled workflows into the team's methodologies. Key Responsibilities Own physical implementation for SoC blocks and/or top-level, including floor-planning, placement, CTS, routing, and physical optimization to meet PPA targets. Drive timing closure (setup/hold) across multi-mode/multi-corner (MMMC) scenarios; partner with RTL, architecture, and STA/signoff to converge designs. Integrate and implement complex IP (e.g., controllers, microcontrollers, NOC, interfaces, MBIST/DFT logic, buffers, PHY‑adjacent logic) with focus on robust physical integration and timing/power integrity. Perform and/or coordinate physical signoff, including DRC/LVS, IR drop/EM, and timing signoff, addressing violations efficiently. Partner with DFT teams to ensure scan/MBIST requirements are physically realizable and do not compromise PPA or schedule. Work with packaging, assembly, test, probe, and manufacturing coll

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Global Facilities (GFAC) Cost Program Manager – Japan, you will play a critical role in leading Facilities capital planning, cost performance, and business processes supporting both the Micron F15 site and its expansion programs. This position functions as a main integration point linking Facilities, Procurement, Finance and Central Planning to ensure capital investments, business priorities and site objectives remain aligned. This role will drive capital governance, business planning, portfolio performance, cost optimization, cashflow forecasting, and executive decision support across the facility's capital portfolio. The role demands robust program management capabilities, critical thinking, plus skills in converting complex financial and operational data into actionable insights for leadership decision-making. Responsibilities Lead all aspects of Facilities capital programs & business processes, providing mentorship and resolution of complex issues and gaps to support F15 expansion program and future site operational growth in cost. Serve as the primary integration point across Site Leadership, Facilities & Construction, Procurement, Finance, and the centralized group to align capital investment priorities, approvals, and business objectives. Manage capital budgets, cashflow forecasts, and spend transparency while driving Business Plan performance through forecast accuracy, spending compliance, cost optimization, and risk mi

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron is seeking a Director to lead the Process Hazard Analysis (PHA) organization within the Technology Products Group. This role sits at the intersection of technology innovation, process safety, sustainability, process engineering, facilities systems, supplier engagement, and global manufacturing. The Director will lead a team of domain experts responsible for hazard analysis of new tools, chemistries, and facilities systems, as well as incident investigation and root cause analysis. The PHA team enables Technology Development by delivering a robust, risk-based process safety program that supports innovation while protecting people, operations, and the environment. The organization also develops process safety practices and standards that can be transferred and scaled across Micron's global manufacturing network. The successful candidate will combine technical depth, strategic leadership, and operational excellence to build interpersonal capability, influence across functions, and ensure process safety remains a competitive advantage as Micron advances its technology roadmap! The Process Hazard Analysis (PHA) organization within Technology Products Group plays a critical role in enabling safe and sustainable technology innovation using AI. We partner across engineering, facilities, EHS, manufacturing, and supplier organizations to assess risk, develop process safety standards, and support the deployment of next-generation technologies. Our team helps ensure that innovation advances responsibly while protecting

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a SoC Design Engineer, you will be part of the Heterogeneous Integration Group (HIG), contributing to the design, development, and integration of next‑generation HBM SoC logic die. You will work closely with architecture, verification, physical design, firmware, and product teams to implement robust, high‑performance SoC solutions that meet ambitious power, performance, area, and schedule targets. You will also work to enable and integrate AI-driven tools and AI-enabled workflows into the team's methodologies. Key Responsibilities Design and implement RTL for SoC‑level blocks and subsystems used in HBM logic die. Integrate internal and third‑party IP (e.g., controllers, microcontrollers, NOC, RAS, MBIST, interfaces, adapters, buffers, PHY‑adjacent logic). Collaborate with SoC architects to translate architectural and micro‑architectural specifications into high‑quality RTL implementations. Participate in SoC‑level integration activities, including clocking, reset, power intent, and configuration infrastructure. Assist with pre‑silicon validation and post‑silicon bring‑up, including root‑cause analysis of silicon issues. Contribute to design documentation, block specifications, and design reviews. Collaborate multi-functionally with Product Engineering, Test, Probe, Process Integration, and Manufacturing to ensure robust and manufacturable builds. Minimum Qualifications Bachelor’s or master’s degree in electrical engineering,

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron’s DRAM Design Engineering Group (DDEG) is where bold ideas become real technology. We push the limits of memory and storage innovation, and we thrive in a collaborative environment where engineers learn, build, and solve challenges together. We are driven by curiosity, creativity, and the pursuit of better solutions every day! We are seeking a Principal or Member of Technical Staff (MTS) in Analog Design to join our DRAM IP Design team. As a Principal/ MTS, you will help shape the next generation of Micron's memory products, while working closely with global design, verification, and product teams to bring innovative circuit designs from concept to silicon. Your work will directly influence product performance, quality, and reliability—and contribute to advancements that define the semiconductor industry. Responsibilities: Design, optimize, and verify block‑level analog and mixed-signal circuits for DRAM projects. Work with the internal data science team and EDA vendors to leverage Agentic- AI and improve AI-assisted design flow and circuits optimization. Propose, evaluate and implement new or improved circuit topology to further enhance PPAC of the circuit block. Improve design verification scope and coverage to increase circuit robustness to enhance mass production yield. Partner with global design groups and provide layout guidance through post‑layout simulation. Com

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. At Micron, we build the memory and storage that powers everything from massive data centers to the devices people carry every day. Our DRAM IP Design team shapes the circuits at the heart of these products, carrying innovative designs from concept all the way to silicon. We work across global design, verification, and product teams, and the work we do here helps define where the semiconductor industry goes next! As a Principal Analog Design Engineer, you'll help shape the next generation of Micron's memory products, bringing circuit designs to life and directly influencing their performance, quality, and reliability. You'll partner with design, verification, and product teams around the world, operating with the independence and technical depth expected of a principal engineer. It's a role where your circuit decisions show up in silicon that ships at scale. Responsibilities: Design, optimize, and verify block-level analog and mixed-signal circuits for DRAM Propose, evaluate, and implement new or improved circuit topologies to enhance block PPAC Work with the internal data science team and EDA vendors to leverage agentic AI and AI-assisted design flows for circuit optimization Expand verification coverage to strengthen robustness and mass-production yield Partner with global design groups, guide layout through post-layout simulation, support silicon-to-simulation correlation, and operate independently to define solutions and methods Minimum Qualifications:

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We are seeking a Principal IO/Clocking Design Engineer to be a part of our design team working on critical high-speed circuits common to all DRAM related memory products! In this position, you will be responsible for the development, design, optimization, verification, and fan out of these high-speed circuits to all DRAM related projects at Micron. You will work on equalization and bandwidth extension to push the speed limits of the circuit and process technology, analyze resulting IO impairments, clock jitter and duty error impact to DRAM system and timing budget, and develop effective engineering solutions. Responsibilities: Innovate, design, optimize and verify high-speed IO and clocking circuits used in new DRAM products. Apply proven high-speed circuit design techniques and enhance critical performance evaluation of the IO data path and clocking path at circuit level. Develop accurate modeling, analysis and simulation methodology to capture key circuit performance metrics and their impact to product specifications at full-chip and system level. Work with Product Engineering and SI team to compare silicon performance with simulation results and support correlation activities. Collaborate with process integration and transistor modeling teams on Micron's next groundbreaking process node. Minimum Qualifications: Minimum MSEE + 10 years or BSEE + 12 years of industry experience in analog and mixed-signal circuit design. Proficiency w

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. 職務概要 F15 DXチームは、Fab15のHVM領域におけるデジタル化・自動化を推進し、サイクルタイム短縮、ライン安定化、FabPace改善を目的としたソリューション開発を担当します。製造現場の課題を分析し、データ駆動型の改善策を実装することで、Fabの競争力強化に貢献します。 職務内容 製造KPI（サイクルタイム、スループット等）の分析と改善策提案 自動化アプリケーションの開発（例：Lot Priority Auto Upgrade、FQ Postpone） データ可視化ダッシュボードの設計・構築（例：In-Time Delivery、Photo DBR） API開発およびUI設計による業務効率化 DX関連プロジェクトの要件定義、設計、UAT、導入 OMT DXチームとの連携によるFab全体のオートメーション推進 推奨Skill SQL/Python/Power BI/Streamlit/Tableau/Omelekでのダッシュボード構築 Job Summary The F15 DX team drives digitalization and automation initiatives in Fab15’s HVM area, focusing on cycle time reduction, line stability, and FabPace improvement. The team analyzes manufacturing challenges and implements data-driven solutions to strengthen Fab competitiveness. Key Responsibilities Analyze manufacturing KPIs (cycle time, throughput) and propose improvement actions Develop automation applications (e.g., Lot Priority Auto Upgrade, FQ Postpone) Design and build data visualization dashboards (e.g., In-Time Delivery, Photo DBR) Develop APIs and user interfaces to streamline operations Define requirements, design, conduct UAT, and deploy DX projects Collaborate with the OMT DX team to drive automation across Fab operations Recommended Skills Dashboard development using SQL / Python / Power BI / Streamlit / Tableau/Omlek Using AI: Experience in utilizing AI for work process improvements

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Responsibilities Lead and develop a Custom layout team for Micron’s global NAND layout needs. Lead the development of analog and custom layout to achieve project schedules and achievements. Offer leadership in developing the team's technical capabilities and fostering a positive, inclusive culture. Successfully collaborating with engineering teams across India, US, Japan, and Italy to ensure the layout project’s completion. Coordinate and prioritize logistics and resources across multiple projects. Coordinate with TD, Design, CAD, and layout teams to ensure timely, quality delivery. Drive innovation for future memory generations in a dynamic work environment. Lead all aspects of team performance and growth. Hiring and retention management. As part of Micron's core NAND leadership in India, help drive the success of NAND operations. Proficiency in Cadence VLE/VXL and Calibre DRC/LVS is required. Demonstrates strong motivation and enthusiasm, maintains attention to detail, and applies a systematic and methodical approach in IC layout design & planning. Prior experience with NAND or any other non-volatile memory is preferred, though it is not mandatory. Proven ability to leverage AI‑assisted (vibe) coding techniques to improve efficiency or automate design and analysis methodologies Leverage AI tools to automate the tools and workflow Applying Artificial Intellige

To provide strategic leadership for high-impact transformational initiatives that accelerate Copper Business growth, profitability, operational excellence, sustainability, circular economy, digital transformation, and enterprise value creation. The role converts leadership vision into actionable strategies, identifies growth opportunities, secures cross-functional buy-in, develops investment-linked business cases where required, governs program execution, and ensures implementation at site with measurable business impact. Source: Adani Group | Job ID: 55107

To provide strategic leadership for high-impact transformational initiatives that accelerate Copper Business growth, profitability, operational excellence, sustainability, circular economy, digital transformation, and enterprise value creation. The role converts leadership vision into actionable strategies, identifies growth opportunities, secures cross-functional buy-in, develops investment-linked business cases where required, governs program execution, and ensures implementation at site with measurable business impact. Source: Adani Group | Job ID: 55107

We believe that the way people interact with their finances will drastically improve in the next few years. We’re dedicated to empowering this transformation by building the tools and experiences that thousands of developers use to create their own products. Plaid powers the tools millions of people rely on to live a healthier financial life. We work with thousands of companies like Venmo, SoFi, several of the Fortune 500, and many of the largest banks to make it easy for people to connect their financial accounts to the apps and services they want to use. Plaid’s network covers 12,000 financial institutions across the US, Canada, UK and Europe. Founded in 2013, the company is headquartered in San Francisco with offices in New York, Washington D.C., London and Amsterdam. About the team The GL Accounting team is responsible for ensuring accurate and timely financial reporting across Plaid’s global operations. We manage general ledger accounting, accruals, fixed assets, prepaids, intercompany, consolidations, international statutory reporting, treasury operations, and AP and T&E, and we partner cross-functionally with Procurement and Legal to drive cost allocation across the business. Team Mission: We drive operational excellence, enable financial transparency, and support Plaid’s growth through accurate reporting, strong controls, and scalable, AI-enabled processes. Role description As the Accounting Manager, you will lead a team of accountants across core GL functions. You will oversee the Accounts Payable & T&E processes, run month-end close, ensure compliance with US GAAP and SOX, drive automation and efficiency with AI and collaborate cross-functionally to support Plaid’s financial operations and scale. Responsibilities Accounting Operations: Lead AP and T&E operations, ensuring expense accuracy and timely accruals Oversee a timely, accurate and efficient month-end close process. Compliance, Audit & Risk Management: Maintain strong internal co

GitLab is the intelligent orchestration platform for DevSecOps. GitLab enables organizations to increase developer productivity, improve operational efficiency, reduce security and compliance risk, and accelerate digital transformation. More than 50 million registered users and more than 50% of the Fortune 100* trust GitLab to ship better, more secure software faster. The same principles built into our products are reflected in how our team works: we embrace AI as a core productivity multiplier, with all team members expected to incorporate AI into their daily workflows to drive efficiency, innovation, and impact. GitLab is where careers accelerate, innovation flourishes, and every voice is valued. Our high-performance culture is driven by our values and continuous knowledge exchange, enabling our team members to reach their full potential while collaborating with industry leaders to solve complex problems. Co-create the future with us as we build technology that transforms how the world develops software. * Fortune 500® is a registered trademark of Fortune Media IP Limited, used under license. Claim based on GitLab data. Fortune 100 refers to the top 20% ranked companies in the 2025 Fortune 500 list, published in June 2025. Fortune and Fortune Media IP Limited are not affiliated with, and do not endorse products or services of GitLab. An overview of this role As a Solutions Architect in GitLab's Southern Europe team with particular focus on France, you'll be a trusted advisor to GitLab prospects and customers, helping them understand how GitLab's DevSecOps platform addresses both technical requirements and business objectives across the entire software development lifecycle. You'll guide organizations through their digital transformation journeys, from planning through monitoring, using your technical expertise, understanding of cloud and modern software development practices, and strong customer empathy. Reporting to a regional Solutions Architect manager and