Verification Director Jobs

Physical Verification Engineer — 3 Locations. Apply via Workday.

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We are seeking a Verification Lead for our next-generation AI hardware. You’ll guide a top-tier team of Verification Engineers, shaping test strategies to validate functionality and performance of our AI core. This role requires expertise in AI-specific data types, common AI data-movement compute patterns, and on-chip network validation, combined with strong leadership and collaboration skills. This role is hybrid, based out Toronto, ON. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are A Seasoned Verification Leader: An experienced ASIC/SoC lead with proven track record of leading teams through complex tape-outs. An AI Hardware Specialist: An expert in the nuances of high-performance compute, specifically focused on AI/ML architectures and the intricacies of tensor-based operations. A Systems Architect at Heart: A strategist who views verification through a system-level lens, ensuring that hardware, software, and on-chip networks (NoC) harmonize perfectly. A Technical Mentor: A hands-on guide proficient in UVM, SystemVerilog, and cocotb, dedicated to elevating team capabilities and driving rigorous coverage-driven methodologies. What We

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is seeking a CPU Verification Fellow to lead verification strategy and execution for next-generation RISC-V high-performance processors. This role requires deep CPU verification expertise, strong microarchitecture understanding, and the ability to guide large engineering teams from early design through tapeout and post-silicon validation. The ideal candidate has verified complex out-of-order, speculative, superscalar CPUs and can define scalable methodology across simulation, formal verification, emulation, FPGA, and silicon bring-up. This role is hybrid, based out of Santa Clara, CA or Austin, TX. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are You have deep experience verifying high-performance superscalar CPUs, ideally including out-of-order and speculative processors. You have strong knowledge of RISC-V architecture, including ISA compliance, privileged architecture, virtual memory, atomics, vector extensions, and memory model behavior. You are highly proficient in SystemVerilog, UVM, constrained-random verification, assertions, functional coverage, and advanced debug methodologies. You have hands-on experience with CPU refere

About the Team: OpenAI’s Hardware organization develops AI-native silicon and system-level solutions for the unique demands of advanced AI workloads. Building on efforts like Jalapeño, the team is developing future generations of AI-native silicon and tightly integrated systems to power the next generation of frontier models. By co-designing chips, systems, tools, and methodologies, the team helps deliver faster, more efficient, and production-ready hardware for OpenAI’s supercomputing platform. About the Role OpenAI is developing custom silicon to power the next generation of frontier AI models. We’re looking for experienced Design Verification (DV) Engineers to ensure functional correctness and robust design for our cutting-edge ML accelerators. You will play a key role in verifying complex hardware systems—ranging from individual IP blocks to subsystems and full SoC—working closely with architecture, RTL, software, and systems teams to deliver reliable silicon at scale. In this role you will: Own the verification of one or more of: custom IP blocks, subsystems (compute, interconnect, memory, etc.), or full-chip SoC-level functionality. Define verification plans based on architecture and microarchitecture specs. Develop constrained-random, directed, and system-level testbenches using SystemVerilog/UVM or equivalent methodologies. Build and maintain stimulus generators, checkers, monitors, and scoreboards to ensure high coverage and correctness. Drive bug triage, root cause analysis, and work closely with design teams on resolution. Contribute to regression infrastructure, coverage analysis, and closure for both block- and top-level environments. You might thrive in this role if you have: BS/MS in EE/CE/CS or equivalent with 3+ years of experience in hardware verification. Proven success verifying complex IP or SoC designs in industry-standard flows Proficient in SystemVerilog, UVM, and common simulation and debug tools (e.g., VCS, Questa, Verdi). Strong knowledge

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. We’re part of a global organization that brings together top engineers to design and verify Micron’s leading‑edge memory technologies. We thrive on solving complex circuit and system‑level challenges, and we work closely across regions to push what’s possible in memory design! In this role, you’ll play a key part in shaping verification strategies for Micron’s DRAM products. You’ll collaborate with teams across design, product engineering, test, process integration, and more to ensure our memory products deliver outstanding performance, quality, and reliability. Your work directly influences manufacturability, time‑to‑market, and customer success. Responsibilities: Contribute to the design and drive the verification of memory circuits from gate‑level to full chip implementations Develop and execute verification plans for advanced DRAM builds Lead circuit‑ and system‑level verification using industry‑standard tools and methodologies Drive verification of memory arrays, control logic, address decode, data paths, and internal test logic Analyze layout‑extracted parasitics and guide critical circuit reviews Minimum Qualifications: Bachelor’s degree in Electrical Engineering or Computer Engineering 5+ years of experience in verification or related design roles Strong background in semiconductor circuit design, modeling, and verification Strong understanding of DRAM/memory

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Summary: As a Design Verification Engineer Intern at Micron, you will collaborate with highly innovative design and verification teams to support the development of advanced DRAM and emerging memory technologies. This role offers hands-on exposure to high-density memory products, complex verification methodologies, automation tools, and industry-leading semiconductor design practices. You will work within a global engineering environment while learning from experienced engineers and contributing to world-class memory solutions. Responsibilities Support verification activities while developing an understanding of chip-level and block-level functionality for advanced memory products. Assist in developing and maintaining digital and analog verification environments for DRAM technologies. Create test patterns, execute regressions, and help improve functional coverage of memory features and architectures. Analyze verification failures, support debugging efforts, and collaborate with engineers to identify root causes. Participate in automation, scripting, AI-assisted engineering solutions, and verification flow improvements while collaborating with global teams. Minimum Qualifications Currently pursuing the final year of a Bachelor's degree or a Master's degree in Electronics Engineering, Electrical Engineering, or a related field, with enrollment in an accredited university program. Basic understanding of digital logic

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Own and execute functional verification for block‑level and full‑chip designs from specification through tape‑out Develop, execute, and maintain verification plans , test strategies, and coverage models based on design specifications Architect, develop, and maintain SystemVerilog / UVM‑based testbenches , test vectors, and assertions Run directed and constrained‑random simulations and debug functional failures to root cause Drive coverage closure (functional, code, and assertion coverage) and identify verification gaps Work closely with design engineers to understand RTL, review specifications, and resolve design issues Provide verification status updates , summaries, and risk assessments to project stakeholders Collaborate with cross‑functional teams including design, validation, product engineering, and methodology teams across global sites Contribute to the development and improvement of verification tools, flows, and methodologies Provide verification support to design projects by simulating, analyzing and debugging pre-silicon full chip designs. Develop Test cases/Stimulus to increase the functional coverage for all DRAM and emerging memory architectures and features. Participate in developing verification methodology and verification environments for advanced DRAM and emerging memory products. Co-w

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Responsibilities will include, but are not limited to: Depending on the expertise, the below set of responsibilities can be interpreted for fastspice(Primesim/Finesim) or Verilog (Xcelium/VCS) based verification. Guide and set the direction for the verification effort within your areas of expertise in any project that the team undertakes. Provide verification support to design projects by simulating, analyzing and debugging pre-silicon full chip designs. Develop Test cases/Stimulus to increase the functional coverage for all DRAM and emerging memory architectures and features. Participate in developing verification methodology and verification environments for advanced DRAM and emerging memory products. Co-work with international colleagues on developing new verification flows to take on the challenges in DRAM and emerging memory design. Develop and maintain test benches and test vectors using simulation tools and run regressions for coverage analysis and improvements. Enhancing the efficiency of design and verification through leveraging Artificial Intelligence. Your Experience and Qualification: Common Familiarity with DRAM operation Familiarity with Claude Code Schematic analysis Digital Design and Verification Expertise of the following area: System Verilog UVM</l

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Job Summary As a Design Verification Engineer at Micron Technology, Inc., you’ll play a central role in validating complex memory architectures, ensuring speed, reliability, and innovation come together flawlessly. You’ll dive deep into advanced DRAM design, work on high‑density chips, and guide verification strategy from concept to silicon. Responsibilities Verify DRAM and emerging memory architectures through pattern development, regressions, and functional coverage Build and maintain digital and mixed‑signal test benches, vectors, and flows Debug failures, support design teams, track issues, and drive closure Collaborate with global teams Self-motived and team work spirit Minimum Qualifications Bachelor’s degree in Electrical or Computer Engineering or equivalent professional experience Understa

Design Verification Quality Engineer — Boise, ID - Main Site. Apply via Workday.

Job Details: Job Description: The Role and Impact As a Sr Deep Learning Hardware Verification Engineer, you will play a pivotal role in shaping the future of AI hardware by validating and optimizing next-generation NPU silicon solutions. In this role you will join the NPU Hardware Pre-Silicon Validation team working closely with design engineers, model engineers and AI architects to validate components of the next generation NPU IP portfolio, your contributions will directly shape Intel's advancements in AI technologies. Your responsibilities will include: • Functional Verification of complex digital design block(s) on the latest generations of Intel's NPU AI accelerators. • Architect, development and implementation of verification environments from initial planning through the validation lifecycle to review and signoff. • Development of test plans and test cases. • Implementation of random test generators, high level transactional models, bus functional models (BFMs), functional/formal constraints, checkers and scoreboards, coverpoints/covergroups and SVA properties. • Implementation of software based testcases for functional and performance based testing of the NPU AI accelerators. • Collaborate with cross-functional teams to analyses and address next-generation AI requirements, influencing the AI product roadmap. Leixlip is the primary location for this position, however, we offer some flexibility to support your work/life balance arrangements. Business group The Artificial Intelligence and Deep Learning team drives innovation in AI hardware development, aligning with Intel's mission to deliver world-class solutions in the AI domain. With a focus on building state-of-the-art hardware that supports cutting-edge AI models, the team collaborates across Intel to en

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. In this position, you will be joining a brilliant team to collaborate with Micron’s various design and verification teams all over the world, support the efforts of design verification flow development, optimization, and implementation and work with cross-functional team to assure the best cost, quality, reliability, time-to-market, and customer satisfaction As Memory Design Group CAD Engineer at Micron Technology, Inc., you will be working in a collaborative, production support role evaluating, developing enhancing and debugging both in-house and commercial Electronic Design Automation (EDA) tools and flows for the physical layout and design of CMOS integrated circuits. You will work closely with the Design, Layout teams, supporting their use of electronic design automation tools and methodologies to increase design and layout productivity and work efficiency. Responsibilities : Develop tools, flows, and methodologies to increase the productivity and reliability of our Memory designs Integrate commercial EDA (Electronic Design Automation) tools into design flows Provide training, documentation, and support to end users on new tools and method. Work closely with design, layout, verification and process teams. Undertake independent research and development of ne

At NVIDIA, we push the boundaries of computing innovation. Our ASIC Verification Engineers focus on developing the world’s top SoCs and GPUs. Joining us as a Senior ASIC Verification Engineer - GPU means working on modern technology powering consumer graphics and AI applications. This position is ideal for those passionate about technology and eager to impact computing’s future. What you'll be doing: As a key member of our ASIC Verification team, you will verify the design and implementation of the industry's leading GPUs. You will be responsible for verifying the ASIC build, architecture, golden models, and micro-architecture using advanced verification methodologies such as UVM or equivalent. Understand the design and implementation of your unit/cluster/chip, define the verification scope, develop the verification infrastructure, and verify the correctness of the design. Collaborate with architects, designers, and pre- and post-silicon verification teams to accomplish your task. What we need to see: Bachelor's Degree in EE, CS, or CE or equivalent experience. 5&#43; years of relevant experience. Experience in verification using random stimulus along with functional coverage and assertion-based verification methodologies. Experience with design and verification tools (VCS or equivalent simulation tools, debug tools like Verdi, Indago, GDB). Expertise in System Verilog or similar HVL. Strong debugging and analytical skills. Perl and C/C&#43;&#43; programming language experience desirable. Strong communication skills and the ability & desire to work as a great teammate are huge pluses. Experience in crafting test bench environments for unit and system level verification. #LI-Hybrid Your base salary will be det

Job Details: Job Description: Do Something Wonderful At Intel, we put silicon at the center of the world’s most meaningful innovations. From personal computing and AI to cloud-scale data centers and edge platforms, our processors power technologies that touch billions of lives. If you’re passionate about building world-class silicon at massive scale, we want to build the future with you. The Team You’ll join Intel’s All Cores Engineering (ACE) organization, the team responsible for designing and delivering Intel’s industry‑leading CPU cores. Within ACE, the Atom group focuses on high‑efficiency, performance‑per‑watt optimized cores that enable everything from client platforms to emerging edge and scalable solutions. This is a hands‑on senior engineering role with direct impact on next‑generation CPU silicon. What You’ll Do As a Senior CPU Design Verification Engineer you will play a critical role in ensuring architectural correctness, functional robustness, and power‑efficient performance of Intel’s Atom CPU designs before first silicon. Key responsibilities include but not limited to the following: Lead pre‑silicon functional verification of complex CPU and SoC logic to ensure full compliance with architectural and microarchitectural specifications. Develop and execute verification plans, testbenches, and SystemVerilog/UVM environments, ensuring comprehensive functional and coverage closure. Define, run, and analyze system‑level simulations to uncover functional, performance, power, and corner‑case issues. Debug and root‑cause complex RTL, microarchitecture, and integration issues; drive issues to resolution with design teams. Collaborate cross‑functionally with CPU architects, RTL de

Job Details: Job Description: The world is transforming and so is Intel. Here at Intel, we believe the world needs technology that can enrich the lives of every person on Earth. The E-Core CPU team is a CPU Core development team in Guadalajara, Mexico. We believe that developing these technologies takes a team of exceptionally talented individuals who work together to visualize, innovate, and make the future of computing possible. If you are excited about advanced development of breakthrough technologies for future-generation CPU cores, we welcome you to join us, to do something wonderful. The focus of this role is to be part of a team of pre-silicon verification engineers to verify new and existing features for Intel's next generation CPU IP resulting in bug free final design. You will be responsible for exhaustively validating the RTL implementation of new architecture and microarchitecture capabilities using a combination of standalone and top-level test environments as well as formal verification. This team is responsible to ensure the highest quality of Intel's CPU designs, in a dynamic cross-team environment. Role responsibilities include although not limited to: Developing pre-Si validation test plans and test scenarios to prove the correctness of the design. Development of components for a simulation-based environment: bus functional models, trackers, checkers, scoreboards, and test benches. Performing and debugging digital simulations and driving to closure of bugs. Development of functional coverage and achieving coverage goals. Working closely with design engineers, micro-architects, and other team members to ensure high quality of test plans, functional coverage, and tests. Deliver high-quality output against