Verification Director Jobs

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We’re looking for a hands-on RTL Design Engineer to own the microarchitecture and RTL implementation of the Power Management Subsystem/Interrupt Controllers/AXI Interconnect/Cache Controller . You’ll collaborate with cross-functional teams—architecture, firmware, software, DV, and PD—to define, design, and optimize power management solutions for next-generation RISC-V/ARM-based SoCs. This role is hybrid, based out of Bangalore, India. We welcome candidates at various experience levels. During the interview process, you will beevaluated and offered a level that aligns with your experience, which may differ from the one in this posting. Who You Are 5–10 years of experience in ASIC/SOC/IP design, with hands-on experience in microarchitecture and RTL development Skilled in Verilog/SystemVerilog and comfortable working across design, debug, and analysis Design and develop microarchitectures for a set of highly configurable IPs Microarchitecture and RTL coding ensuring optimal performance, power, area Work with verification teams on assertions, test plans, debug, coverage, etc. Deep understanding of power management concepts—clocking, reset, DVFS, and low-power modes Familiar with RISC-V or ARM-based SoCs and standard bus protocols (AXI, AHB, APB, CHI) Awareness of functional safety (ISO 26262) practices in hardware design What We Need Abil

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. For more than 45 years, Micron Technology, Inc. has been at the forefront of innovation, delivering the world’s most advanced memory and semiconductor technologies. Our distributed team of engineers, scientists, and visionaries is developing groundbreaking solutions that redefine how the world uses information to enrich life for all. We are seeking a Layout Design Engineering Manager to join Micron’s High Bandwidth Memory (HBM) organization in Guadalajara, Mexico. In this leadership role, you will guide a distributed team focused on developing complex analog, mixed‑signal, and custom layouts powering next‑generation AI and high‑performance computing solutions. Responsibilities Manage a team responsible for crafting and developing critical layouts for analog circuits, mixed-signal components, and custom blocks, including support for full-chip-level integration. Oversee layout verification activities, including LVS, DRC, Antenna checks, documentation, and quality reviews. Ensure timely and high‑quality delivery of block‑level layouts that meet all project requirements. Coordinate planning, area/time estimation, scheduling, task delegation, and execution for multiple concurrent projects. Mentor and guide layout engineers of all levels. Perform detailed reviews of sub‑block‑level layouts. Collaborate with global engineering teams to drive successful project execution and alignment across Micron’s worldwide footprint. </

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. For more than 45 years, Micron Technology, Inc. has redefined innovation with the world’s most advanced memory and semiconductor technologies. We’re an international team of visionaries and scientists, developing groundbreaking technologies that are transforming how the world uses information to enrich life. We are looking for Layout Design engineer at our Micron Technology’s DPG-IPDEV Team in Bangalore, India. DPG-IPDEV team is responsible for developing world-class analog and mixed signal IPs used in every cutting edge DRAM chip produced in Micron . As a Layout Design engineer, you will be working for intensive applications such as artificial intelligence and high-performance computing solution, High Bandwidth Memory. As a Layout Design Engineer you will be collaborating with peer teams crossing Micron global footprint, in a multiple projects-based environment. Role and Responsibilities • Responsible for Design and development of critical analog, mixed-signal, custom digital block, and full chip level integration support. • Perform layout verification like LVS/DRC/Antenna, quality check and support documentation. • Responsible for timely delivery of block-level layouts with acceptable quality. • Demonstrate leadership qualities in planning, area/time estimation, scheduling, and execution to meet project sche

Our vision is to transform how the world uses information to enrich life for all. Join an inclusive team passionate about one thing: using their expertise in the relentless pursuit of innovation for customers and partners. The solutions we build help make everything from virtual reality experiences to breakthroughs in neural networks possible. We do it all while committing to integrity, sustainability, and giving back to our communities. Because doing so can fuel the very innovation we are pursuing. As a Layout Technologist, you will drive the tactical planning and execution of tool move-in through collaboration with operations, logistics and relevant vendors. You will ensure that layout drawing is matched with factory site location and seamless workflow and communication in getting tools in to the designated location within the schedules for supporting factory ramp Main Responsibilities : Conduct site assessments in collaboration with key stakeholders (e.g. Tool Owners, Facilities teams) prior to equipment move-in to ensure plans are feasible and executable on-site. Perform move path assessments, including First-Of-A-Kind (FOAK) equipment, to ensure safe, feasible, and executable movement within the fab . Execute datum marking and verification activities to ensure alignment with layout and installation requirements. <span

Who we are At Twilio, we’re shaping the future of communications, all from the comfort of our homes. We deliver innovative solutions to hundreds of thousands of businesses and empower millions of developers worldwide to craft personalized customer experiences. Our dedication to remote-first work , and strong culture of connection and global inclusion means that no matter your location, you’re part of a vibrant team with diverse experiences making a global impact each day. As we continue to revolutionize how the world interacts, we’re acquiring new skills and experiences that make work feel truly rewarding. Your career at Twilio is in your hands. . Hiring and how we work We use Artificial Intelligence (AI) to help make our hiring process efficient. That said, every hiring decision is made by real Twilions! Also, while we are a remote-first company, you may be asked to report in person on an ad-hoc basis for team gatherings, functional off-sites or customer meetings. . See yourself at Twilio Join the team as Twilio’s next Principal Engineer. About the job The Compliance Experiences team sits at the heart of the Twilio platform, owning two critical domains: Phone Numbers and Compliance (KYC). In 2026, "getting a phone number" is no longer a simple API call; it requires sophisticated orchestration across global phone number inventory, real-time identity verification, regulatory compliance, and operational tooling at massive scale. Twilio’s KYC Platform, the gateway to accessing all of Twilio’s communication APIs, enables customers to securely provision and operate communication services globally while navigating complex, constantly evolving regulatory requirements. As a Principal Engineer (P5), you will own the technical strategy for a platform that processes millions of requests. You will be expected to pioneer AI-driven development workflows using LLMs and agentic agents to accelerate code generation, automate arch

Who we are At Twilio, we’re shaping the future of communications, all from the comfort of our homes. We deliver innovative solutions to hundreds of thousands of businesses and empower millions of developers worldwide to craft personalized customer experiences. Our dedication to remote-first work , and strong culture of connection and global inclusion means that no matter your location, you’re part of a vibrant team with diverse experiences making a global impact each day. As we continue to revolutionize how the world interacts, we’re acquiring new skills and experiences that make work feel truly rewarding. Your career at Twilio is in your hands. . Hiring and how we work We use Artificial Intelligence (AI) to help make our hiring process efficient. That said, every hiring decision is made by real Twilions! Also, while we are a remote-first company, you may be asked to report in person on an ad-hoc basis for team gatherings, functional off-sites or customer meetings. . See yourself at Twilio Join the team as Twilio’s next Staff Software Engineer. About the job The Compliance Experiences team sits at the heart of the Twilio platform, owning two critical domains: Phone Numbers and Compliance (KYC). In 2026, "getting a phone number" is no longer a simple API call; it requires sophisticated orchestration across global phone number inventory, real-time identity verification, regulatory compliance, and operational tooling at massive scale. Twilio’s KYC Platform, the gateway to accessing all of Twilio’s communication APIs, enables customers to securely provision and operate communication services globally while navigating complex, constantly evolving regulatory requirements. As a Staff Software Engineer (P4), you will be a key technical leader for a platform that processes millions of requests. You will build innovative solutions while working closely with Twilio partners to ensure alignment. You will lead the

About Pinterest: Millions of people around the world come to our platform to find creative ideas, dream about new possibilities and plan for memories that will last a lifetime. At Pinterest, we’re on a mission to bring everyone the inspiration to create a life they love, and that starts with the people behind the product. Discover a career where you ignite innovation for millions, transform passion into growth opportunities, celebrate each other’s unique experiences and embrace the flexibility to do your best work. Creating a career you love? It’s Possible. At Pinterest, AI isn't just a feature, it's a powerful partner that augments our creativity and amplifies our impact, and we’re looking for candidates who are excited to be a part of that. To get a complete picture of your experience and abilities, we’ll explore your foundational skills and how you collaborate with AI. Through our interview process, what matters most is that you can always explain your approach, showing us not just what you know, but how you think. You can read more about our AI interview philosophy and how we use AI in our recruiting process here . About tvScientific tvScientific is the first and only CTV advertising platform purpose-built for performance marketers. We leverage massive data and cutting-edge science to automate and optimize TV advertising to drive business outcomes. Our solution combines media buying, optimization, measurement, and attribution in one, efficient platform. Our platform is built by industry leaders with a long history in programmatic advertising, digital media, and ad verification who have now purpose-built a CTV performance platform advertisers can trust to grow their business. We are seeking a Site Reliability Engineer to help operate, scale, and continuously improve a cloud-native platform built on AWS, Kubernetes/EKS, and ArgoCD-driven GitOps workflows. This role will contribute to improving the reliability, scalability, automation, observability, and oper

About us Graphcore is one of the world’s leading innovators in Artificial Intelligence compute. It is developing hardware, software, and systems infrastructure that will unlock the next generation of AI breakthroughs and power the widespread adoption of AI solutions across every industry. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. Together, they share a bold vision: to enable Artificial Super Intelligence and ensure its benefits are accessible to everyone. Graphcore’s teams are drawn from diverse backgrounds and bring a broad range of skills and perspectives. A melting pot of AI research specialists, silicon designers, software engineers, and systems architects, Graphcore enjoys a culture of continuous learning and constant innovation. Job Summary Reporting to the Validation leadership team, the Senior Execution and Quality Validation Engineer will be responsible for executing validation plans, developing automation solutions, and improving product quality across Graphcore silicon and platform technologies. Working closely with architecture, design, verification, firmware, software, systems engineering, and validation teams, the successful candidate will contribute to scalable validation methodologies, improve test coverage and execution efficiency, and help ensure products meet high standards of functionality, reliability, and performance before customer deployment. The role requires strong technical skills, attention to detail, and a passion for improving validation quality through effective execution, automation, and continuous improvement. The Team The Validation Execution and Quality team sits within the Validation organisation and is responsible for improving validation effectiveness, test execution efficiency, product quality, and release readiness across Graphcore silicon and platform products. The team develops validation methodologies, automation

About Pinterest: Millions of people around the world come to our platform to find creative ideas, dream about new possibilities and plan for memories that will last a lifetime. At Pinterest, we’re on a mission to bring everyone the inspiration to create a life they love, and that starts with the people behind the product. Discover a career where you ignite innovation for millions, transform passion into growth opportunities, celebrate each other’s unique experiences and embrace the flexibility to do your best work. Creating a career you love? It’s Possible. At Pinterest, AI isn't just a feature, it's a powerful partner that augments our creativity and amplifies our impact, and we’re looking for candidates who are excited to be a part of that. To get a complete picture of your experience and abilities, we’ll explore your foundational skills and how you collaborate with AI. Through our interview process, what matters most is that you can always explain your approach, showing us not just what you know, but how you think. You can read more about our AI interview philosophy and how we use AI in our recruiting process here . About tvScientific tvScientific is the first and only CTV advertising platform purpose-built for performance marketers. We leverage massive data and cutting-edge science to automate and optimize TV advertising to drive business outcomes. Our solution combines media buying, optimization, measurement, and attribution in one, efficient platform. Our platform is built by industry leaders with a long history in programmatic advertising, digital media, and ad verification who have now purpose-built a CTV performance platform advertisers can trust to grow their business. tvScientific is looking for an SDET Engineer for its Web Platform with strong expertise in web and API testing. This role requires a balance of manual testing excellence and automation skills, with a focus on validating end-to-end user flows across frontend, backend services, and APIs.

About us Graphcore is one of the world’s leading innovators in Artificial Intelligence compute. It is developing hardware, software, and systems infrastructure that will unlock the next generation of AI breakthroughs and power the widespread adoption of AI solutions across every industry. As part of the SoftBank Group, Graphcore is a member of an elite family of companies responsible for some of the world’s most transformative technologies. Together, they share a bold vision: to enable Artificial Super Intelligence and ensure its benefits are accessible to everyone. Graphcore’s teams are drawn from diverse backgrounds and bring a broad range of skills and perspectives. A melting pot of AI research specialists, silicon designers, software engineers, and systems architects, Graphcore enjoys a culture of continuous learning and constant innovation. Job Summary Reporting to the Validation leadership team, the Principal Execution and Quality Validation Engineer will be responsible for driving validation execution, automation, product quality, and release readiness across Graphcore silicon and platform technologies. The role combines deep expertise in hardware validation, test automation, and quality engineering with a strong focus on execution excellence. Working closely with architecture, design, verification, firmware, software, systems engineering, and validation teams, the successful candidate will develop scalable validation methodologies, improve test coverage and execution efficiency, and ensure products meet the highest standards of functionality, reliability, and performance before customer deployment. As a recognized technical leader within the validation organisation, this role will influence validation strategies, automation roadmaps, and quality practices across multiple projects and engineering disciplines. The Team The Validation Execution and Quality team sits within the Validation organisation and is responsible for improving validation effectiveness, te

We believe that the way people interact with their finances will drastically improve in the next few years. We’re dedicated to empowering this transformation by building the tools and experiences that thousands of developers use to create their own products. Plaid powers the tools millions of people rely on to live a healthier financial life. We work with thousands of companies like Venmo, SoFi, several of the Fortune 500, and many of the largest banks to make it easy for people to connect their financial accounts to the apps and services they want to use. Plaid’s network covers 12,000 financial institutions across the US, Canada, UK and Europe. Founded in 2013, the company is headquartered in San Francisco with offices in New York, Seattle, Washington D.C., Raleigh, London, and Amsterdam. AI and intelligent systems are driving the fifth paradigm shift, following previous technological revolutions like mainframes, personal computers, the internet, and mobile devices. We believe, in the foreseeable future, AI will revolutionize the FinTech industry - from how consumers understand and manage their finances, to how developers build applications and how all companies operate. The fintech industry landscape will undergo a fundamental reshape. Plaid in the FinTech AI Ecosystem Plaid is uniquely positioned to become the financial data and insights backbone for AI applications and platforms in this evolving ecosystem. We believe consumers should be able to understand and manage their financial life through conversational AI interfaces using natural language. We believe consumers should have peace of mind with a trustworthy consent and authorization manager when agents shop for them. We believe identity verification and financial fraud prevention in AI-powered products should feel seamless and embedded for the end users. The list goes on. The most important AI companies, major fintechs, and customer agent platforms are actively trying to integrate Plaid into AI-powered produ

Help secure the future of banking through enterprise-scale cryptographic innovation. The Role Capco is seeking an experienced Cryptography Engineer. This newly created role will sit within a Crypto Certification team, responsible for validating and certifying enterprise data protection solutions and new cryptographic use cases before enterprise adoption. Working at the intersection of cloud, cybersecurity, and financial services, you will collaborate closely with Crypto Requirements, Security Architecture, and Crypto Engineering teams to design, test, validate, and document cryptographic solutions that protect critical banking and payments infrastructure. This role offers the opportunity to influence the future of enterprise encryption, certificate management, and post-quantum cryptography initiatives. What You’ll Do Automation Design and Development Design, develop, test, and deploy automated solutions and workflows for cryptographic services and operations, including: Certificate lifecycle management (issuance, renewal, revocation, and compliance monitoring). Symmetric and asymmetric key generation, distribution, rotation, escrow, and retirement. Integration with enterprise-approved key management and certificate management platforms. Cryptographic Service Integration Develop APIs, automation frameworks, and reusable tools that enable seamless integration of cryptographic services (encryption, decryption, digital signing, verification, and key management) into enterprise applications, infrastructure platforms, and CI/CD pipelines. Cryptographic Solution Certification Evaluate, validate, and certify cryptographic products, platforms, and integrations to ensure they meet enterprise security, risk, compliance, and operational requirements. Develop certification standards, test plans, and implementation guidance to support enterprise adoption of approved cryptographic solutions. Tooling and Software Development Develop and maintain high-quality, secure, and mai

This is Adyen Adyen provides payments, data, and financial products in a single solution for customers like Meta, Uber, H&M, and Microsoft - making us the financial technology platform of choice. At Adyen, everything we do is engineered for ambition. For our teams, we create an environment with opportunities for our people to succeed, backed by the culture and support to ensure they are enabled to truly own their careers. We are motivated individuals who tackle unique technical challenges at scale and solve them as a team. Together, we deliver innovative and ethical solutions that help businesses achieve their ambitions faster. CDD Risk Analyst, Onboarding We are looking for a CDD Risk Analyst, Onboarding to be part of our APAC CDD team to support our regional growth. You will be based in Singapore working closely with Sales, Account Management, Compliance, Risk, Regulatory and Finance. In this role you will be responsible for reviewing potential, new and existing merchants from a risk, regulatory and compliance perspective. As a highly regulated company we need to adhere to various rules and regulations and make sure we grow our business with a healthy portfolio of merchants. As a first line team, we balance compliance with merchant focus and operate in a time-sensitive environment. CDD/ EDD verification, AML risk knowledge, a good understanding of payments setups and a detail-oriented attitude towards producing quality reviews is what characterizes the team. What you’ll do Perform risk assessments for prospective, new and existing merchants, navigating high-risk profiles and industries Evaluation of merchant’s due diligence, owning risk decisions and mitigation as the first line of defence Investigate and resolve blockers to merchant go live and payouts relating to CDD matters Act as Subject Matter Expert to internal stakeholders on KYC matters related to new and existing merchants Ensuring compliance and quality adherence with evolving

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. Department Introduction The Non-Volatile NAND Design Engineering group is responsible for the design and optimization of analog, digital and mixed-signal circuits enabling advanced NAND Flash memory products. Close collaboration with cross-functional teams ensures scalable, manufacturable, and reliable solutions across technology nodes. Position Overview As a Design Engineer in the NVE Design Engineering Core group at Micron Semiconductor Italia, you will contribute to the development of memory products that are best-in-class, using your specialized knowledge and Micron proprietary methods of designing and analyzing core and mixed circuits used in the development of memory products. Responsibilities Responsibilities include, but not limited to: • Design, simulate, and optimize NAND core circuit blocks, balancing performance, power, area, and reliability trade-offs. • Translate product and system requirements into circuit implementations, evaluating feasibility and functionality across use cases. • Perform comprehensive circuit verification (DC, AC, transient, noise, Monte Carlo, PVT corners) at block and chip level. • Collaborate with cross-functional teams to improve power efficiency, manufacturabil

Our vision is to transform how the world uses information to enrich life for all . Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. As a Design Engineer – Design for Test (DFT) in the NVEG organization at Micron Semiconductor Italia, you will be responsible for the integration, optimization, and validation of DFT architectures for advanced NAND Flash memory products. In this role, you will work closely with multi-functional teams to improve testability, product quality, cost efficiency, and time‑to‑market, bringing to bear innovative DFT strategies across digital logic, custom circuits, firmware, and silicon validation. Responsibilities include, but not limited to: • Define, implement, and optimize DFT architectures and test strategies for NAND designs, covering both digital and custom circuit blocks. • Analyze testability and coverage, ensuring compliance with quality, reliability, and manufacturability requirements. • Develop and validate test sequences, NAND test algorithms, and verification methodologies at block and chip level. • Collaborate with multi-functional teams and Product Engineering to support DFT integration, silicon bring-up, debug, and production ramp. • Document DFT architectures, methodologies, and results, contributing to continuous improvement of test quality and efficiency. Min Qualifications • M.S. or Ph.D. in Electrical Engineering, Electronics, or a related field. • Strong understanding of digital design, verification, and test/DFT principles. • Proficiency in programming languages such as C/C&#43;&#43; and Python. • Hands-on experience with simulation and validation methodologies f