Ai Platform Engineer in United States

Replit is the agentic software creation platform that enables anyone to build applications using natural language. With millions of users worldwide, Replit is democratizing software development by removing traditional barriers to application creation. About this role: Accelerate engineering velocity and reduce friction in the Replit development experience by stewarding our codebases, tooling, and developer workflows. You will directly impact every engineer who ships code at Replit. By focusing on developer experience, you will act as a force multiplier across all product development teams, enabling faster feature delivery, happier developers, and reduced operational overhead. The role combines the technical depth needed to navigate a complex, polyglot codebase with the product mindset to understand how infrastructure decisions impact developer productivity and ultimately customer value delivery. You will also partner closely with the AI team on our internal AI platform — which already generates more than 60% of all merged PRs at Replit — to improve the Agent's output and help shape strategy around the Agent's default stack. This is an early hire in this area, so you will have agency and have an accelerated career path as the team undoubtedly grows. You will: Maintain and evolve our codebase structure — a complex TypeScript monorepo, Go services, npm packages, and internal Agentic tooling. Own the build and test pipelines and optimize them to minimize build times and improve developer iteration speed. Drive code generation and type-safe interfaces across service boundaries (e.g., GraphQL, Protocol Buffers, gRPC, OpenAPI). Set the standards for code quality using automation tools such as TypeScript, ESLint, Prettier, and Go linters/formatters — building custom rules and plugins to enforce Replit-specific requirements. Streamline development setup and the onboarding experience. Work with platform teams to improve deployment processes, infrastructure integrations, and e

Replit is the agentic software creation platform that enables anyone to build applications using natural language. With millions of users worldwide, Replit is democratizing software development by removing traditional barriers to application creation. About the Role We are seeking a mid-level Infrastructure Vulnerability Management Engineer with a strong background in Cloud Security, DevSecOps, and Infrastructure-as-Code (IaC). In this role, you will bridge the gap between security, compliance, DevOps, and Platform engineering teams. You will identify infrastructure misconfigurations, secure multi-cloud environments, and manage continuous vulnerability lifecycles across cloud workloads, containers, and data repositories to satisfy strict regulatory compliance frameworks. You will also serve as a technical infrastructure responder during security incidents, deploying real-time cloud or network countermeasures to protect our production ecosystem. What You'll Do Core Responsibilities Infrastructure Scanning & Triage: Perform continuous security scanning across our cloud posture and workloads. Review, validate, and prioritize flaws and misconfigurations based on CVSS scores, real-world exploitability, and infrastructure network exposure. Posture Management & Visibility : Own and optimize Cloud Security Posture Management (CSPM), Kubernetes Security Posture Management (KSPM), and Data Security Posture Management (DSPM) tools to ensure uniform compliance, prevent data leakage, and maintain hardened baselines. Infrastructure-as-Code (IaC) Security: Configure, tune, and embed automated IaC security scanning tools into CI/CD pipelines to identify architectural risks (e.g., overly permissive IAM, public S3 buckets/Cloud Storage) before they are deployed to production. Workload & Container Security: Manage the continuous vulnerability scanning lifecycle for container images, registries, and Virtual Machines (VMs), partnering with SRE and Platform teams to build aut

About Pinterest: Millions of people around the world come to our platform to find creative ideas, dream about new possibilities and plan for memories that will last a lifetime. At Pinterest, we’re on a mission to bring everyone the inspiration to create a life they love, and that starts with the people behind the product. Discover a career where you ignite innovation for millions, transform passion into growth opportunities, celebrate each other’s unique experiences and embrace the flexibility to do your best work. Creating a career you love? It’s Possible. At Pinterest, AI isn't just a feature, it's a powerful partner that augments our creativity and amplifies our impact, and we’re looking for candidates who are excited to be a part of that. To get a complete picture of your experience and abilities, we’ll explore your foundational skills and how you collaborate with AI. Through our interview process, what matters most is that you can always explain your approach, showing us not just what you know, but how you think. You can read more about our AI interview philosophy and how we use AI in our recruiting process here . Job Title: Staff Software Engineer, Edge Team. Intro : The Edge team owns the systems (including CDN, TLS, DNS, ingress/egress proxy fleet, and rate limiting) that connect 600M+ users to Pinterest. We're looking for a Staff Software Engineer to lead our efforts to manage automation traffic (such as bots and crawlers) at the Edge, while shaping the future of our rate limiting platform.. What you’ll do: Build Edge systems that combine in-house implementation, open-source software like Envoy proxy, and multiple CDN & DNS providers. Balance what to build, what to leverage from the community, and what to orchestrate across vendors. Drive automation traffic management efforts in the Edge space, designing solutions to manage bots and crawlers at scale. Design and implement request processing logic in Envoy to support Edge capabi

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is looking for a mid- to senior-level Physical Design Engineer who will contribute to the physical design of high-performance chips for industry-leading AI/ML architectures, spanning implementation from synthesis through tapeout. You will partner with front-end and physical design engineers to optimize floorplanning, timing, power, performance, and area across multiple IPs. Along the way, you will build end-to-end ASIC expertise while learning from experienced engineers across the chip development process. This role is hybrid , based out of Austin, TX, Fort Collins, CO, or Santa Clara, CA . We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are An engineer excited to work on high-performance designs for industry-leading AI/ML architectures. A collaborative problem solver who enjoys working with experienced engineers across ASIC disciplines. Grounded in logic design fundamentals and gate- and transistor-level implementation. Curious about how early architectural and RTL decisions shape physical implementation and final chip quality. What We Need A BS, MS, or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a relat

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is looking for a mid- to senior-level Physical Design Engineer with a strong background in static timing analysis (STA). In this role, you will help converge multi-million-gate designs on advanced process nodes and partner with cross-functional teams through final signoff and tapeout. This role is hybrid , based out of Austin, TX, Fort Collins, CO, or Santa Clara, CA . We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are A physical design engineer with 8+ years of experience in STA, timing closure, and advanced-node design implementation. Experienced with timing flows, constraints, clocking, CDC, RDC, derates, uncertainties, guardbanding, and final signoff. Skilled in writing and debugging SDC constraints, creating ECOs, developing closure strategies, and analyzing worst-case corners. A strong collaborator and communicator who can drive results across distributed, cross-functional engineering teams. What We Need Drive timing convergence across blocks, partitions, sections, and top-level designs; generate and validate timing models and publish results. Analyze timing violations, develop and propagate fixes, debug timing-flow issues, and

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is seeking an experienced Field Application Engineer to champion our revolutionary RISC-V CPU and AI accelerator IP products with customers worldwide. You will own end-to-end technical engagements, translating complex architectural advantages into customer wins while shaping our product roadmap through direct market feedback. If you combine deep technical expertise with exceptional customer engagement skills and want to drive the adoption of next-generation compute IP, join our team. This role is hybrid, based out of the United States or Canada near one of our main office locations. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are A customer-focused engineer with proven success in CPU/GPU/NPU IP sales engagements. Technical expert who can articulate complex architectural benefits and conduct deep-dive analyses. Self-driven professional who independently manages multiple customer relationships from discovery to win. Strategic thinker who identifies customer pain points and positions solutions effectively. What We Need 7+ years in the semiconductor industry with a degree in EE or related field including customer-facing roles i

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is seeking talented Physical Design Engineers to implement high-performance partitions for an industry-leading AI SOC. You'll own the complete implementation flow from synthesis to tapeout, working alongside world-class engineers to push the boundaries of performance, power, and area. If you're passionate about crafting silicon that powers the future of AI computing and thrive on solving complex design challenges, we want you on our team. This role is hybrid, based out of Austin,TX or Santa Clara, CA or Fort Collins, CO. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who you are Experienced with synthesis and place-and-route flows, especially using Synopsys Design Compiler / Fusion Compiler and IC Compiler II. Comfortable in a small, cross-functional physical design team, owning a block or subsystem and partnering on tapeout milestones with clear communication and accountability. Ideally bring extra depth in areas such as UPF/multi-voltage power domains, SoC interface IP integration (e.g. I3C, UART), signoff breadth (DRC/LVS, EM/IR, LEC/Formality), multi-clock/CDC-aware implementation, PLL/DLL integration, and DFT-aware physical implementati

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We’re looking for a Timing Engineer to join our silicon team. In this role, you’ll drive static timing analysis and closure for complex, high-performance designs. You’ll collaborate closely with logic, DFT, and physical design teams to debug constraints, optimize paths, and ensure our chips meet performance targets across corners and modes. This role is hybrid , based out of Austin, TX, Fort Collins, CO, or Santa Clara, CA . We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are Experienced in STA and passionate about enabling silicon to meet aggressive performance goals. Analytical and detail-oriented, with a strong understanding of timing paths, constraints, and optimization strategies. A collaborative team player who works well across logic, DFT, and physical design boundaries. Resourceful and self-driven, capable of developing scripts and methodologies that improve timing closure workflows. What We Need 7+ years of industry experience and a proven record of successful tapeouts. Deep knowledge of STA tools and techniques, including noise, crosstalk, and OCV analysis. Proficiency in writing and debugging SDC constraints, creating ECOs, and

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is seeking a talented Physical Design Engineer to implement high-performance blocks for our industry-leading CPU and AI/ML architectures. You'll own the complete implementation flow from synthesis to tapeout, working alongside world-class engineers to push the boundaries of performance, power, and area. If you're passionate about crafting silicon that powers the future of AI computing and thrive on solving complex design challenges, we want you on our team. This role is hybrid, based out of Austin, TX or Santa Clara, CA or Fort Collins, CO. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are A hands-on engineer with deep expertise in SOC/ASIC physical design and a track record of successful tapeouts. Passionate about optimizing PPA through innovative implementation techniques and close RTL collaboration. Strong problem solver who excels at debugging complex issues across design hierarchies. Collaborative team player who thrives in fast-paced, technically challenging environments. What We Need BS/MS/PhD in EE/ECE/CE/CS with proven experience in synthesis, PnR, and timing closure on taped-out designs. Expertise with industry-stan

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. We’re looking for a Field Sales Engineer who’s wired for AI/ML, fluent in real-world problem-solving, and excited to build with the people actually using what we make. You will collaborate closely with the sales team and enterprise customers, leveraging your deep technical knowledge in AI to drive the adoption of our products and solutions. This is a customer-facing role that requires both technical expertise and excellent communication skills to convey complex technical concepts to non-technical stakeholders. This role is remote based out of North America with preference near one of our main hubs Santa Clara, CA; Boston, MA; or Toronto,ON. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are You’ve lived in the AI/ML trenches, whether as a field engineer, a solutions architect, or the one tapped in when things needed to “just work.” You speak both machine and human. Whether it’s a researcher or a skeptical executive, you know how to break things down and bring them to life. You’re fired up about generative models, LLMs, and the edge of what’s possible when software meets purpose-built silicon. Work directly with customers in pre-sales

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities. Tenstorrent is seeking a Signal Integrity Engineer to join our growing team. The ideal candidate will have a wealth of exposure designing high speed interconnects, breakout design, material trade-offs and verification. A background in electrical engineering, electronics or relevant fields is required. Must love all things high speed! This role is hybrid, based out of Santa Clara, CA or Austin, TX or Toronto, ON. We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting. Who You Are You have a Bachelor’s degree in Electrical Engineering (or equivalent) and 5+ years working in high-speed digital design with a focus in high-speed PCB or package design at 10Gbps and above (e.g. 100GbE, GDDR6, PCIe Gen5+). You’re comfortable working with high-speed performance metrics such as ICR, ERL, COM, NEXT, and FEXT as well as knowledge of high-speed connector technologies, including NPO, CPO, and emerging standards. You are proficient with PCB ECAD tools (ideally Cadence Allegro). You communicate clearly (written and verbal), think critically, and love solving complex signal integrity problems. You’re enthusiastic about all things high speed and enjoy collaborating acro

Job Title Senior Software Engineer - Image Reconstruction (C++/CUDA) Job Description Build the GPU-native engine that turns raw CT physics into life-saving images inside Philips scanners worldwide , wringing maximum performance from constrained hardware at the frontier of C&#43;&#43;, CUDA, and AI alongside world-class physicists. Your role: Help r e-architect an entire CT image-reconstruction pipeline, from raw detector physics to the final clinical image, as a fully GPU-native, massively scalable platform in C&#43;&#43; and CUDA. Work shoulder-to-shoulder with physicists, algorithm architects, and platform engineers, translating complex signal and image-processing models into high-performance GPU implementations that balance image quality against compute cost. Collaborate with CT platform teams around the globe to design, build, test, and deploy an industry-leading reconstruction software platform. Push the frontier of performance engineering and applied AI by profiling, parallelizing, optimizing memory use across caches and shared memory, and pioneering learned models that replace expensive physics with fast, accurate equivalents. This hybrid role is based in Cleveland, OH, with three flexible days in the office and two remote days each week . Regular travel is not typically </sp

ABOUT BASETEN Baseten powers mission-critical inference for the world's most dynamic AI companies, like Cursor, Notion, OpenEvidence, Abridge, Clay, Gamma and Writer. By uniting applied AI research, flexible infrastructure, and seamless developer tooling, we enable companies operating at the frontier of AI to bring cutting-edge models into production. We're growing quickly and recently raised our $1.5B Series F , led by Altimeter Capital, Conviction Partners, and Spark Capital. Join us and help build the platform engineers turn to to ship AI products. THE ROLE Baseten is seeking talented and experienced Software Engineers to join our Platform team within the Infrastructure organization. As a senior member of Baseten's Platform Team, you will own the systems that let every engineer at Baseten prove their code works before it reaches production. Our product runs mission-critical AI inference for customers who measure downtime in dollars per second, which means our internal bar for correctness, performance, and failure tolerance has to be exceptional. Your focus is the full testing stack: fast and reliable unit test tooling, integration harnesses that spin up realistic environments on demand, load and performance testing for GPU-backed inference workloads, and resilience testing that deliberately breaks things so our customers never have to find out what happens when a node dies mid-request. This is a builder role with org-wide leverage. You won't be writing tests for other teams — you'll be building the frameworks, harnesses, and feedback loops that make writing good tests the path of least resistance, and you'll set the standards for what "well-tested" means at Baseten. RESPONSIBILITIES Own Baseten's testing strategy end to end — define the standards, the tiers, and the tooling that engineering teams build against. Build and maintain unit, integration, load and performance testing frameworks Design end to end test infrastructure that provisions realistic dependencies

ABOUT BASETEN Baseten powers mission-critical inference for the world's most dynamic AI companies, like Cursor, Notion, OpenEvidence, Abridge, Clay, Gamma and Writer. By uniting applied AI research, flexible infrastructure, and seamless developer tooling, we enable companies operating at the frontier of AI to bring cutting-edge models into production. We're growing quickly and recently raised our $1.5B Series F , led by Altimeter Capital, Conviction Partners, and Spark Capital. Join us and help build the platform engineers turn to to ship AI products. THE ROLE Baseten’s Inference Stack team builds the distributed runtime that powers large-scale LLM inference across our platform. We operate at the intersection of distributed systems, model performance, infrastructure, and developer experience. We enable customers to deploy and operate cutting-edge LLM models with industry-leading performance, scalability, reliability, and ease of use. As a Software Engineer on the Inference Stack team, you’ll work across the stack - from the developer experience customers use to deploy models, the libraries used for features like tool calling and reasoning, all the way down to the systems we use to orchestrate deployments in Kubernetes and route traffic efficiently. This is an ideal role for engineers who enjoy owning systems in production, solving hard integration problems, and making complex infrastructure simple and reliable for users. EXAMPLE INITIATIVES Blog Posts https://www.baseten.co/blog/nvidia-dynamo-day-baseten-inference-stack/ https://www.baseten.co/blog/how-baseten-achieved-2x-faster-inference-with-nvidia-dynamo/ https://www.baseten.co/blog/how-baseten-multi-cloud-capacity-management-mcm-powers-cloud-self-hosted-and-hybr/#comparing-deployment-options-cloud-vs-self-hosted-vs-hybrid RESPONSIBILITIES Develop infrastructure and orchestration systems for deploying and managing large-scale distributed LLM inference Work across the stack, from customer-facing features to low-le

🚀 About WRITER WRITER is where the world's leading enterprises orchestrate AI-powered work. Our vision is to expand human capacity through superintelligence. And we're proving it's possible – through powerful, trustworthy AI that unites IT and business teams together to unlock enterprise-wide transformation. With WRITER's end-to-end platform, hundreds of companies like Mars, Marriott, Uber, and Vanguard are building and deploying AI agents that are grounded in their company's data and fueled by WRITER's enterprise-grade LLMs. Valued at $1.9B and backed by industry-leading investors including Premji Invest, Radical Ventures, and ICONIQ Growth, WRITER is rapidly cementing its position as the leader in enterprise generative AI. Founded in 2020 with office hubs in San Francisco, New York City, Seattle, Austin, Chicago, and London, our team thinks big and moves fast, and we're looking for smart, hardworking builders and scalers to join us on our journey to create a better future of work with AI. 📐 About the role Join WRITER's security team as a staff detection and response engineer and help protect the AI infrastructure that's transforming how the world works. You'll build sophisticated detection systems that identify attacks targeting our AI platform, training data, and model deployments while creating automated response capabilities that scale with our explosive growth. This isn't just traditional security work – you're defending cutting-edge AI/AGI systems against adversaries who are evolving their tactics as fast as AI itself advances. This role combines hands-on security engineering with strategic thinking to stay ahead of novel threats that don't exist in textbooks yet. You'll be the operational arm of our security function, translating threat intelligence into real-time detections, coordinating incident response across multiple teams, and hunting for sophisticated attacks across GPU clusters and distributed training environments. If you're excited by the challen